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powerpc/85xx: Fix e6500 L2 cache stash IDs

PATCH New Scott Wood 2 participants 2 messages Mar 27, 2014 – Apr 23, 2014 PowerPC

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Scott Wood

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#0 lore raw

PATCH 1/1 powerpc/85xx: Fix e6500 L2 cache stash IDs

The value written to L2CSR1 didn't match the value written to the device tree.

Signed-off-by Scott Wood <[email protected]>
---
 arch/powerpc/cpu/mpc85xx/fdt.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)
arch/powerpc/cpu/mpc85xx/fdt.c +8 -4
index 33bc900..31e63f7 100644
@@ -275,12 +275,16 @@ static inline void ft_fixup_l2cache(void *blob)
 			u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
 #if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
 			/* Only initialize every eighth thread */
-			if (reg && !((*reg) % 8))
+			if (reg && !((*reg) % 8)) {
+				fdt_setprop_cell(blob, l2_off, "cache-stash-id",
+						 (*reg / 4) + 32 + 1);
+			}
 #else
-			if (reg)
-#endif
+			if (reg) {
 				fdt_setprop_cell(blob, l2_off, "cache-stash-id",
-					 (*reg * 2) + 32 + 1);
+						 (*reg * 2) + 32 + 1);
+			}
+#endif
 #endif
 
 			fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
Signature · 1 line
1.8.3.2
#1 lore raw

PATCH 1/1 powerpc/85xx: Fix e6500 L2 cache stash IDs

Quoted 5 lines · Scott Wood

The value written to L2CSR1 didn't match the value written to the device tree.

Signed-off-by Scott Wood <[email protected]>

---

Applied to u-boot-mpc85xx/master, thanks.

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