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mpc85xx: Add deep sleep support on T1040QDS

PATCH New Tang Yuantian 2 participants 6 messages Apr 17, 2014 – Apr 23, 2014 PowerPC

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Tang Yuantian

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#0 lore raw

PATCH 1/2 mpc85xx: Add deep sleep support on T1040QDS

From: Tang Yuantian <[email protected]>

Add deep sleep support on T1040QDS platform.

Signed-off-by Tang Yuantian <[email protected]>
---
 board/freescale/t1040qds/t1040qds.c | 12 ++++++++++++
 include/configs/T1040QDS.h          |  4 ++++
 2 files changed, 16 insertions(+)
board/freescale/t1040qds/t1040qds.c +12 -0
index 3dec447..f1d7cde 100644
@@ -18,6 +18,7 @@
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
 #include <fm_eth.h>
+#include <asm/mpc85xx_gpio.h>
 
 #include "../common/qixis.h"
 #include "t1040qds.h"

@@ -245,3 +246,14 @@ int board_need_mem_reset(void)
 {
 	return 1;
 }
+
+#ifdef CONFIG_DEEP_SLEEP
+void board_mem_sleep_setup(void)
+{
+	/* does not provide HW signals for power management */
+	QIXIS_WRITE(pwr_ctl[1], (QIXIS_READ(pwr_ctl[1]) & ~0x2));
+	/* Disable MCKE isolation */
+	gpio_set_value(2, 0);
+	udelay(1);
+}
+#endif
include/configs/T1040QDS.h +4 -0
index 030ea7e..745a2f2 100644
@@ -43,6 +43,10 @@
 #define CONFIG_SYS_BOOK3E_HV		/* Category E.HV supported */
 #define CONFIG_MP			/* support multiple processors */
 
+/* support deep sleep */
+#define CONFIG_DEEP_SLEEP
+#define CONFIG_SILENT_CONSOLE
+
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
Signature · 1 line
1.8.5
author
#1 lore raw

PATCH 1/1 mpc85xx: Add deep sleep support on T104xRDB

From: Tang Yuantian <[email protected]>

Add deep sleep support on T104xRDB platforms.

Signed-off-by Tang Yuantian <[email protected]>
---
 board/freescale/t104xrdb/t104xrdb.c | 10 ++++++++++
 include/configs/T104xRDB.h          |  4 ++++
 2 files changed, 14 insertions(+)
board/freescale/t104xrdb/t104xrdb.c +10 -0
index b48133a..fb5b849 100644
@@ -17,6 +17,7 @@
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
 #include <fm_eth.h>
+#include <asm/mpc85xx_gpio.h>
 
 #include "t104xrdb.h"
 #include "cpld.h"

@@ -104,3 +105,12 @@ void ft_board_setup(void *blob, bd_t *bd)
 	fdt_fixup_fman_ethernet(blob);
 #endif
 }
+
+#ifdef CONFIG_DEEP_SLEEP
+void board_mem_sleep_setup(void)
+{
+	/* Disable MCKE isolation */
+	gpio_set_value(2, 0);
+	udelay(1);
+}
+#endif
include/configs/T104xRDB.h +4 -0
index eaaf37d..0159b97 100644
@@ -25,6 +25,10 @@
 #define CONFIG_SYS_BOOK3E_HV		/* Category E.HV supported */
 #define CONFIG_MP			/* support multiple processors */
 
+/* support deep sleep */
+#define CONFIG_DEEP_SLEEP
+#define CONFIG_SILENT_CONSOLE
+
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
Signature · 1 line
1.8.5
author
#3 lore raw

PATCH v4 1/1 mpc85xx/t104x: Add deep sleep framework support

In reply to Tang Yuantian

From: Tang Yuantian <[email protected]>

When T104x soc wakes up from deep sleep, control is passed to the primary core that starts executing uboot. After re-initialized some IP blocks, like DDRC, kernel will take responsibility to continue to restore environment it leaves before.

Signed-off-by Tang Yuantian <[email protected]>

---
based on: git://git.denx.de/u-boot-mpc85xx.git
branch: next
tested on: t1040qds and t1040rdb platforms.

v4:
- refactor the framework. In the new patch, the entry is placed just after DDRC's initialization when resume.
v3:
- fix out-of-tree compile warning
v2:
- added explaination for CONFIG_DEEP_SLEEP
- fixed some issues

 README                              |  4 +++
 arch/powerpc/cpu/mpc85xx/cpu_init.c |  8 ++++++
 arch/powerpc/lib/board.c            | 16 ++++++++++++
 drivers/ddr/fsl/mpc85xx_ddr_gen3.c  | 52 ++++++++++++++++++++++++++++++++++---
 include/fsl_ddr_sdram.h             |  4 +++
 5 files changed, 80 insertions(+), 4 deletions(-)
README +4 -0
index 83a1b25..31e37cb 100644
@@ -431,6 +431,10 @@ The following options need to be configured:
 		This CONFIG is defined when the CPC is configured as SRAM at the
 		time of U-boot entry and is required to be re-initialized.
 
+		CONFIG_DEEP_SLEEP
+		Inidcates this SoC supports deep sleep feature. If deep sleep is
+		supported, core will start to execute uboot when wakes up.
+
 - Generic CPU options:
 		CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
arch/powerpc/cpu/mpc85xx/cpu_init.c +8 -0
index 941c20e..867abb6 100644
@@ -350,6 +350,7 @@ void cpu_init_f (void)
 	extern void m8560_cpm_reset (void);
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
 #endif
 #if defined(CONFIG_SECURE_BOOT)
 	struct law_entry law;

@@ -414,6 +415,13 @@ void cpu_init_f (void)
 	in_be32(&gur->dcsrcr);
 #endif
 
+#ifdef CONFIG_SYS_DCSRBAR_PHYS
+#ifdef CONFIG_DEEP_SLEEP
+	/* disable the console if boot from deep sleep */
+	if (in_be32(&gur->scrtsr[0]) & (1 << 3))
+		gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
+#endif
+#endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_A007212
 	fsl_erratum_a007212_workaround();
 #endif
arch/powerpc/lib/board.c +16 -0
index f86c6f3..8b03d3a 100644
@@ -343,6 +343,13 @@ void board_init_f(ulong bootflag)
 #ifdef CONFIG_PRAM
 	ulong reg;
 #endif
+#ifdef CONFIG_DEEP_SLEEP
+	const ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	struct ccsr_scfg *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
+	u32 start_addr;
+	typedef void (*func_t)(void);
+	func_t kernel_resume;
+#endif
 
 	/* Pointer is writable since we allocated a register for it */
 	gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);

@@ -360,6 +367,15 @@ void board_init_f(ulong bootflag)
 		if ((*init_fnc_ptr) () != 0)
 			hang();
 
+#ifdef CONFIG_DEEP_SLEEP
+	/* Jump to kernel in deep sleep case */
+	if (in_be32(&gur->scrtsr[0]) & (1 << 3)) {
+		start_addr = in_be32(&scfg->sparecr[1]);
+		kernel_resume = (func_t)start_addr;
+		kernel_resume();
+	}
+#endif
+
 #ifdef CONFIG_POST
 	post_bootmode_init();
 	post_run(NULL, POST_ROM | post_bootmode_get(NULL));
drivers/ddr/fsl/mpc85xx_ddr_gen3.c +48 -4

87 lines not on this page · raw message

include/fsl_ddr_sdram.h +4 -0
index e39b716..e8a2db9 100644
@@ -406,6 +406,10 @@ static int __board_need_mem_reset(void)
 int board_need_mem_reset(void)
 	__attribute__((weak, alias("__board_need_mem_reset")));
 
+void __weak board_mem_sleep_setup(void)
+{
+}
+
 /*
  * The 85xx boards have a common prototype for fixed_sdram so put the
  * declaration here.
Signature · 1 line
1.8.5
#4 lore raw

PATCH v4 1/1 mpc85xx/t104x: Add deep sleep framework support

Quoted 13 lines · Tang Yuantian

From: Tang Yuantian <[email protected]>

When T104x soc wakes up from deep sleep, control is passed to the primary core that starts executing uboot. After re-initialized some IP blocks, like DDRC, kernel will take responsibility to continue to restore environment it leaves before.

Signed-off-by Tang Yuantian <[email protected]>

---
based on: git://git.denx.de/u-boot-mpc85xx.git
branch: next
tested on: t1040qds and t1040rdb platforms.

Quoted 8 lines

v4:
- refactor the framework. In the new patch, the entry is placed just after DDRC's initialization when resume.
v3:
- fix out-of-tree compile warning
v2:
- added explaination for CONFIG_DEEP_SLEEP
- fixed some issues

Applied to u-boot-mpc85xx/master, thanks.

York