Skip to contentSkip to conversation

ARM: dts: exynos4: clean up arm-pmu node

PATCH Superseded Chanho Park 2 participants 2 messages Apr 25, 2014 – Apr 29, 2014

Subsystems (2)

v2 of 3 Superseded Latest is v3 →

lore
Share & tools
lore
#0 lore raw

PATCH v2 1/1 ARM: dts: exynos4: clean up arm-pmu node

This patch cleans a arm-pmu node up for exynos4. Only exynos4412 series boards have four pmu interrupts. Rest of exynos4 boards, except 4412, have only two pmu interrupts. Thus, we can define two interrupts in the exynos4.dtsi and extends the interrupts only exynos4412.dtsi.

Cc Chanwoo Choi <[email protected]>
Cc Tomasz Figa <[email protected]>

---
Changes from v1:
- Remove duplicated properties in exynos4412.dtsi(Comment from Tomasz Figa)

 arch/arm/boot/dts/exynos4.dtsi    | 6 ++++++
 arch/arm/boot/dts/exynos4210.dtsi | 6 ------
 arch/arm/boot/dts/exynos4412.dtsi | 4 ++++
 arch/arm/boot/dts/exynos4x12.dtsi | 6 ------
 4 files changed, 10 insertions(+), 12 deletions(-)
arch/arm/boot/dts/exynos4.dtsi +6 -0
index 0401f4d..b43dc24 100644
@@ -105,6 +105,12 @@
 		reg = <0x10440000 0x1000>;
 	};
 
+	pmu {
+		compatible = "arm,cortex-a9-pmu";
+		interrupt-parent = <&combiner>;
+		interrupts = <2 2>, <3 2>;
+	};
+
 	sys_reg: syscon at 10010000 {
 		compatible = "samsung,exynos4-sysreg", "syscon";
 		reg = <0x10010000 0x400>;
arch/arm/boot/dts/exynos4210.dtsi +0 -6
index cb0e768d..e19c154 100644
@@ -75,12 +75,6 @@
 		#clock-cells = <1>;
 	};
 
-	pmu {
-		compatible = "arm,cortex-a9-pmu";
-		interrupt-parent = <&combiner>;
-		interrupts = <2 2>, <3 2>;
-	};
-
 	pinctrl_0: pinctrl at 11400000 {
 		compatible = "samsung,exynos4210-pinctrl";
 		reg = <0x11400000 0x1000>;
arch/arm/boot/dts/exynos4412.dtsi +4 -0
index a40b6e2..7b75762 100644
@@ -26,6 +26,10 @@
 		samsung,combiner-nr = <20>;
 	};
 
+	pmu {
+		interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
+	};
+
 	gic: interrupt-controller at 10490000 {
 		cpu-offset = <0x4000>;
 	};
arch/arm/boot/dts/exynos4x12.dtsi +0 -6
index c4a9306..b730a74 100644
@@ -31,12 +31,6 @@
 		mshc0 = &mshc_0;
 	};
 
-	pmu {
-		compatible = "arm,cortex-a9-pmu";
-		interrupt-parent = <&combiner>;
-		interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
-	};
-
 	pd_isp: isp-power-domain at 10023CA0 {
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x10023CA0 0x20>;
Signature · 1 line
1.8.3.2
#1 lore raw

PATCH v2 1/1 ARM: dts: exynos4: clean up arm-pmu node

Quoted 9 lines · Chanho Park

This patch cleans a arm-pmu node up for exynos4. Only exynos4412 series boards have four pmu interrupts. Rest of exynos4 boards, except 4412, have only two pmu interrupts. Thus, we can define two interrupts in the exynos4.dtsi and extends the interrupts only exynos4412.dtsi.

Cc Chanwoo Choi <[email protected]>
Cc Tomasz Figa <[email protected]>

---

Tested on Exynos4210 based Origen and Exynos4412 based Origenquad boards.

Quoted 76 lines

Changes from v1:
- Remove duplicated properties in exynos4412.dtsi(Comment from Tomasz Figa)

 arch/arm/boot/dts/exynos4.dtsi    | 6 ++++++
 arch/arm/boot/dts/exynos4210.dtsi | 6 ------
 arch/arm/boot/dts/exynos4412.dtsi | 4 ++++
 arch/arm/boot/dts/exynos4x12.dtsi | 6 ------
 4 files changed, 10 insertions(+), 12 deletions(-)
arch/arm/boot/dts/exynos4.dtsi +6 -0
index 0401f4d..b43dc24 100644
@@ -105,6 +105,12 @@
 		reg = <0x10440000 0x1000>;
 	};
 
+	pmu {
+		compatible = "arm,cortex-a9-pmu";
+		interrupt-parent = <&combiner>;
+		interrupts = <2 2>, <3 2>;
+	};
+
 	sys_reg: syscon at 10010000 {
 		compatible = "samsung,exynos4-sysreg", "syscon";
 		reg = <0x10010000 0x400>;
arch/arm/boot/dts/exynos4210.dtsi +0 -6
index cb0e768d..e19c154 100644
@@ -75,12 +75,6 @@
 		#clock-cells = <1>;
 	};
 
-	pmu {
-		compatible = "arm,cortex-a9-pmu";
-		interrupt-parent = <&combiner>;
-		interrupts = <2 2>, <3 2>;
-	};
-
 	pinctrl_0: pinctrl at 11400000 {
 		compatible = "samsung,exynos4210-pinctrl";
 		reg = <0x11400000 0x1000>;
arch/arm/boot/dts/exynos4412.dtsi +4 -0
index a40b6e2..7b75762 100644
@@ -26,6 +26,10 @@
 		samsung,combiner-nr = <20>;
 	};
 
+	pmu {
+		interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
+	};
+
 	gic: interrupt-controller at 10490000 {
 		cpu-offset = <0x4000>;
 	};
arch/arm/boot/dts/exynos4x12.dtsi +0 -6
index c4a9306..b730a74 100644
@@ -31,12 +31,6 @@
 		mshc0 = &mshc_0;
 	};
 
-	pmu {
-		compatible = "arm,cortex-a9-pmu";
-		interrupt-parent = <&combiner>;
-		interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
-	};
-
 	pd_isp: isp-power-domain at 10023CA0 {
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x10023CA0 0x20>;
Signature · 1 line
Tushar Behera