dma: mmp_pdma: fly-by transfers and external DMA requests support

Fly-by transfer mode cuts down the number of bus transactions by letting the slave drive or latch the memory data bus during memory transactions

instead of performing a dedicated transaction to read data from or write

data to the slave.

Support for fly-by mode by adding a new flag field to struct dma_slave_config.

Signed-off-by Laurent Pinchart <[email protected]>

---
 include/linux/dmaengine.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

include/linux/dmaengine.h +12 -0

index c5c92d5..ae99153 100644
@@ -304,6 +304,17 @@ enum dma_slave_buswidth {
 };
 
 /**
+ * enum dma_slave_flags - DMA slave configuration flags
+ * @DMA_SLAVE_FLAG_FLY_BY - perform DMA transfers for the slave in fly-by mode.
+ *   Instead of performing a bus transaction to read (write) data from (to) the
+ *   slave, let the slave drive (latch) the memory bus data signals during the
+ *   memory write (read) transaction.
+ */
+enum dma_slave_flags {
+	DMA_SLAVE_FLAG_FLY_BY = (1 << 0),
+};
+
+/**
  * struct dma_slave_config - dma slave channel runtime config
  * @direction: whether the data shall go in or out on this slave
  * channel, right now. DMA_MEM_TO_DEV and DMA_DEV_TO_MEM are

@@ -333,6 +344,7 @@ enum dma_slave_buswidth {
  * @slave_id: Slave requester id. Only valid for slave channels. The dma
  * slave peripheral will have unique id as dma requester which need to be
  * pass as slave config.
+ * @flags: DMA slave flags, a combination of enum dma_slave_flags flags.
  *
  * This struct is passed in as configuration data to a DMA engine
  * in order to set up a certain channel for DMA transport at runtime.

Quoted 2 lines

Fly-by transfer mode cuts down the number of bus transactions by letting the slave drive or latch the memory data bus during memory transactions

?? ^^^^^^^^^^^

Quoted 1 line

instead of performing a dedicated transaction to read data from or write

/ ^^^^

Quoted 41 lines

data to the slave.

Support for fly-by mode by adding a new flag field to struct dma_slave_config.

Signed-off-by Laurent Pinchart <[email protected]>

---
 include/linux/dmaengine.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

include/linux/dmaengine.h +12 -0

index c5c92d5..ae99153 100644
@@ -304,6 +304,17 @@ enum dma_slave_buswidth {
 };
 
 /**
+ * enum dma_slave_flags - DMA slave configuration flags
+ * @DMA_SLAVE_FLAG_FLY_BY - perform DMA transfers for the slave in fly-by mode.
+ *   Instead of performing a bus transaction to read (write) data from (to) the
+ *   slave, let the slave drive (latch) the memory bus data signals during the
+ *   memory write (read) transaction.
+ */
+enum dma_slave_flags {
+	DMA_SLAVE_FLAG_FLY_BY = (1 << 0),
+};
+
+/**
  * struct dma_slave_config - dma slave channel runtime config
  * @direction: whether the data shall go in or out on this slave
  * channel, right now. DMA_MEM_TO_DEV and DMA_DEV_TO_MEM are

@@ -333,6 +344,7 @@ enum dma_slave_buswidth {
  * @slave_id: Slave requester id. Only valid for slave channels. The dma
  * slave peripheral will have unique id as dma requester which need to be
  * pass as slave config.
+ * @flags: DMA slave flags, a combination of enum dma_slave_flags flags.
  *
  * This struct is passed in as configuration data to a DMA engine
  * in order to set up a certain channel for DMA transport at runtime.

include/linux/dmaengine.h struct dma_slave_config { · line 377

Quoted 5 lines

include/linux/dmaengine.h +1 -0

@@ -361,6 +373,7 @@ struct dma_slave_config {
 	u32 dst_maxburst;
 	bool device_fc;
 	unsigned int slave_id;
+	u32 flags;
 };

I am not sure about this. Should we have a generic flag for this or just add a bool for fly_by mode?

Suggestions?

Signature · 1 line

~Vinod

Fly-by transfer mode cuts down the number of bus transactions by letting the slave drive or latch the memory data bus during memory transactions instead of performing a dedicated transaction to read data from or write data to the slave.

Support for fly-by mode by adding a new flag field to struct dma_slave_config.

Signed-off-by Laurent Pinchart <[email protected]>

---
  include/linux/dmaengine.h | 13 +++++++++++++
  1 file changed, 13 insertions(+)

include/linux/dmaengine.h +0 -0

index c5c92d5..ae99153 100644

The property is optional and defaults to 32. Document it as such.

As the physical channel and virtual channel point to each other, pchan->phy->vchan is always equal to pchan. Simplify the code accordingly.

Use sizeof(*var) instead of sizeof(type) when calling devm_k*alloc(). This avoids using the wrong type as was done to allocate the physical channels array.

The MMP/PXA DMA engine supports transfer initiation by external chips through DMA request (DREQ) signals. Support them by clearing pending DMA requests for the associated source when starting a channel.

The request ID to DREQ index mapping depends on the hardware and is passed through platform data or DT.

Cc devicetree at vger.kernel.org

Signed-off-by Laurent Pinchart <[email protected]>

---
 Documentation/devicetree/bindings/dma/mmp-dma.txt |  2 +
 drivers/dma/mmp_pdma.c                            | 96 ++++++++++++++++++++---
 include/linux/platform_data/mmp_dma.h             |  2 +
 3 files changed, 87 insertions(+), 13 deletions(-)

Documentation/devicetree/bindings/dma/mmp-dma.txt +0 -0

index 7a802f6..edb9ff3 100644

drivers/dma/mmp_pdma.c +83 -13

index 849bf75..4546a1c 100644
@@ -27,6 +27,7 @@
 
 #define DCSR		0x0000
 #define DALGN		0x00a0
+#define DRQSR(n)	(0x00e0 + ((n) << 2))
 #define DINT		0x00f0
 #define DDADR		0x0200
 #define DSADR		0x0204

@@ -50,6 +51,9 @@
 #define DCSR_CMPST	BIT(10)	/* The Descriptor Compare Status */
 #define DCSR_EORINTR	BIT(9)	/* The end of Receive */
 
+#define DRQSR_CLR	BIT(8)	/* Clear Pending Requests */
+#define DRQSR_REQPEND	0x1f	/* Requests Pending */
+
 #define DRCMR(n)	((((n) < 64) ? 0x0100 : 0x1100) + (((n) & 0x3f) << 2))
 #define DRCMR_MAPVLD	BIT(7)	/* Map Valid (read / write) */
 #define DRCMR_CHLNUM	0x1f	/* mask for Channel Number (read / write) */

@@ -108,6 +112,7 @@ struct mmp_pdma_chan {
 	u32 dcmd;
 	u32 drcmr;
 	u32 dev_addr;
+	int drq;
 
 	/* list for desc */
 	spinlock_t desc_lock;		/* Descriptor list lock */

@@ -127,6 +132,8 @@ struct mmp_pdma_phy {
 
 struct mmp_pdma_device {
 	int				dma_channels;
+	unsigned int			num_dreq;
+	const u32			*dreq;
 	void __iomem			*base;
 	struct device			*dev;
 	struct dma_device		device;

@@ -167,6 +174,9 @@ static void enable_chan(struct mmp_pdma_phy *phy)
 		dalgn &= ~(1 << phy->idx);
 	writel(dalgn, phy->base + DALGN);
 
+	if (phy->vchan->drq != -1)
+		writel(DRQSR_CLR, phy->base + DRQSR(phy->vchan->drq));
+
 	reg = (phy->idx << 2) + DCSR;
 	writel(readl(phy->base + reg) | DCSR_RUN, phy->base + reg);
 }

@@ -685,6 +695,22 @@ fail:
 	return NULL;
 }
 
+static void mmp_pdma_set_drcmr(struct mmp_pdma_chan *chan, unsigned int drmcr)
+{
+	struct mmp_pdma_device *pdev = to_mmp_pdma_dev(cchan->chan.device);
+	unsigned int i;
+
+	chan->drcmr = drmcr;
+	chan->drq = -1;
+
+	for (i = 0; i < pdev->num_dreq; ++i) {
+		if (pdev->dreq[i] == drmcr) {
+			chan->drq = i;
+			break;
+		}
+	}
+}
+
 static int mmp_pdma_control(struct dma_chan *dchan, enum dma_ctrl_cmd cmd,
 			    unsigned long arg)
 {

@@ -745,7 +771,7 @@ static int mmp_pdma_control(struct dma_chan *dchan, enum dma_ctrl_cmd cmd,
 		 * be removed.
 		 */
 		if (cfg->slave_id)
-			chan->drcmr = cfg->slave_id;
+			mmp_pdma_set_drcmr(chan, cfg->slave_id);
 		break;
 	default:
 		return -ENOSYS;

@@ -909,16 +935,64 @@ static struct dma_chan *mmp_pdma_dma_xlate(struct of_phandle_args *dma_spec,
 	if (!chan)
 		return NULL;
 
-	to_mmp_pdma_chan(chan)->drcmr = dma_spec->args[0];
+	mmp_pdma_set_drcmr(to_mmp_pdma_chan(chan), dma_spec->args[0]);
 
 	return chan;
 }
 
+static int mmap_pdma_parse_platform_data(struct mmp_pdma_device *pdev)
+{
+	struct device_node *np = pdev->dev->of_node;
+	struct property *prop;
+
+	/* Default values: 32 channels, no external DREQ. */
+	pdev->dma_channels = 32;
+	pdev->num_dreq = 0;
+
+	if (!IS_ENABLED(CONFIG_OF) || !np) {
+		struct mmp_dma_platdata *pdata = dev_get_platdata(pdev->dev);
+
+		if (!pdata)
+			return 0;
+
+		if (pdata->dma_channels)
+			pdev->dma_channels = pdata->dma_channels;
+		if (pdata->num_dreq) {
+			pdev->num_dreq = pdata->num_dreq;
+			pdev->dreq = pdata->dreq;
+		}
+
+		return 0;
+	}
+
+	of_property_read_u32(np, "#dma-channels", &pdev->dma_channels);
+
+	prop = of_find_property(np, "marvell,dreq");
+	if (prop) {
+		unsigned int num_dreq = prop->length / sizeof(unsigned long);
+		u32 *dreq;
+
+		dreq = devm_kcalloc(pdev->dev, num_dreq, sizeof(*pdreq),
+				    GFP_KERNEL);
+		if (dreq == NULL)
+			return -ENOMEM;
+
+		ret = of_property_read_u32_array(np, "marvell,dreq", dreq,
+						 num_dreq);
+		if (ret < 0)
+			return ret;
+
+		pdev->num_dreq = num_dreq;
+		pdev->dreq = dreq;
+	}
+
+	return 0;
+}
+
 static int mmp_pdma_probe(struct platform_device *op)
 {
 	struct mmp_pdma_device *pdev;
 	const struct of_device_id *of_id;
-	struct mmp_dma_platdata *pdata = dev_get_platdata(&op->dev);
 	struct resource *iores;
 	int i, ret, irq = 0;
 	int dma_channels = 0, irq_num = 0;

@@ -936,15 +1010,11 @@ static int mmp_pdma_probe(struct platform_device *op)
 	if (IS_ERR(pdev->base))
 		return PTR_ERR(pdev->base);
 
-	of_id = of_match_device(mmp_pdma_dt_ids, pdev->dev);
-	if (of_id)
-		of_property_read_u32(pdev->dev->of_node, "#dma-channels",
-				     &dma_channels);
-	else if (pdata && pdata->dma_channels)
-		dma_channels = pdata->dma_channels;
-	else
-		dma_channels = 32;	/* default 32 channel */
-	pdev->dma_channels = dma_channels;
+	ret = mmp_pdma_parse_platform_data(pdev);
+	if (ret < 0)
+		return ret;
+
+	dma_channels = pdev->dma_channels;
 
 	for (i = 0; i < dma_channels; i++) {
 		if (platform_get_irq(op, i) > 0)

@@ -1038,7 +1108,7 @@ bool mmp_pdma_filter_fn(struct dma_chan *chan, void *param)
 	if (chan->device->dev->driver != &mmp_pdma_driver.driver)
 		return false;
 
-	c->drcmr = *(unsigned int *)param;
+	mmp_pdma_set_drcmr(c, *(unsigned int *)param);
 
 	return true;
 }

include/linux/platform_data/mmp_dma.h +2 -0

index 2a330ec..32595b8 100644
@@ -14,6 +14,8 @@
 
 struct mmp_dma_platdata {
 	int dma_channels;
+	unsigned int num_dreq;
+	const u32 *dreq;
 };
 
 #endif /* MMP_DMA_H */

Signature · 6 lines

1.8.3.2

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