mfd: add basic sun6i A31 PRCM support
Subsystems (7)
v5 cover mfd: add basic sun6i A31 PRCM support
Hello,
This patch series adds support for some functions provided by the PRCM (Power/Reset/Clock Management) unit:
- AR100, AHB0 and APB0 clocks
- APB0 reset controller
Best Regards,
Boris
Changes since v4:
- remove merged patch from the series
- move the MFD_SUN6I_PRCM option selection out of the clk support commit
Changes since v3:
- split clk drivers into 3 different drivers: ar100, apb0 and apb0_gates
- fix indentation
- add comments to the clk drivers
- select the MFD_SUN6I_PRCM when compiling for SUN6I arch
Changes since v2:
- use devm_ioremap_resource instead of devm_request_and_ioremap
- remove unnecessary header inclusions
- remove info trace when the probe succeed
- rename apb0_timer01 clk into apb0_timer
Changes since v1:
- fix prcm and prcm-clks DT documentation
- remove unneeded iounmap and kfree calls from sunxi_reset_remove function
- rework the AR100 clk implementation
Boris BREZILLON (5):
mfd: add support for sun6i PRCM (Power/Reset/Clock Management) unit
mfd: sun6i-prcm: document DT bindings
clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support
clk: sunxi: document PRCM clock compatible strings
ARM: sunxi: select MFD_SUN6I_PRCM when sun6i arch support is enabled
Documentation/devicetree/bindings/clock/sunxi.txt | 3 + .../devicetree/bindings/mfd/sun6i-prcm.txt | 59 ++++++ arch/arm/mach-sunxi/Kconfig | 1 + drivers/clk/sunxi/Makefile | 2 + drivers/clk/sunxi/clk-sun6i-apb0-gates.c | 99 +++++++++ drivers/clk/sunxi/clk-sun6i-apb0.c | 77 +++++++ drivers/clk/sunxi/clk-sun6i-ar100.c | 233 +++++++++++++++++++++ drivers/mfd/Kconfig | 8 + drivers/mfd/Makefile | 1 + drivers/mfd/sun6i-prcm.c | 134 ++++++++++++ 10 files changed, 617 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/sun6i-prcm.txt create mode 100644 drivers/clk/sunxi/clk-sun6i-apb0-gates.c create mode 100644 drivers/clk/sunxi/clk-sun6i-apb0.c create mode 100644 drivers/clk/sunxi/clk-sun6i-ar100.c create mode 100644 drivers/mfd/sun6i-prcm.c
Signature · 1 line
1.8.3.2
PATCH v5 1/5 mfd: add support for sun6i PRCM (Power/Reset/Clock Management) unit
The PRCM (Power/Reset/Clock Management) block exposes several subdevices in different subsystems (clk, reset ...)
Add basic support for the PRCM unit with clk (AR100, AHB0, and APB0 clks) and reset controller subdevices.
Other subdevices might be added later (if needed).
--- drivers/mfd/Kconfig | 8 +++ drivers/mfd/Makefile | 1 + drivers/mfd/sun6i-prcm.c | 134 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 143 insertions(+) create mode 100644 drivers/mfd/sun6i-prcm.c
drivers/mfd/Kconfig +8 -0
@@ -731,6 +731,14 @@ config MFD_STA2X11 select MFD_CORE select REGMAP_MMIO +config MFD_SUN6I_PRCM + bool "Allwinner A31 PRCM controller" + depends on ARCH_SUNXI + select MFD_CORE + help + Support for the PRCM (Power/Reset/Clock Management) unit available + in A31 SoC. + config MFD_SYSCON bool "System Controller Register R/W Based on Regmap" select REGMAP_MMIO
drivers/mfd/Makefile +1 -0
@@ -29,6 +29,7 @@ obj-$(CONFIG_MFD_STA2X11) += sta2x11-mfd.o obj-$(CONFIG_MFD_STMPE) += stmpe.o obj-$(CONFIG_STMPE_I2C) += stmpe-i2c.o obj-$(CONFIG_STMPE_SPI) += stmpe-spi.o +obj-$(CONFIG_MFD_SUN6I_PRCM) += sun6i-prcm.o obj-$(CONFIG_MFD_TC3589X) += tc3589x.o obj-$(CONFIG_MFD_T7L66XB) += t7l66xb.o tmio_core.o obj-$(CONFIG_MFD_TC6387XB) += tc6387xb.o tmio_core.o
drivers/mfd/sun6i-prcm.c new file +134 -0
134 lines not on this page · raw message
Signature · 1 line
1.8.3.2
PATCH v5 2/5 mfd: sun6i-prcm: document DT bindings
In reply to Boris BREZILLONDocument DT bindings of the PRCM (Power/Reset/Clock Management) unit.
--- .../devicetree/bindings/mfd/sun6i-prcm.txt | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/sun6i-prcm.txt
Documentation/devicetree/bindings/mfd/sun6i-prcm.txt new file +59 -0
@@ -0,0 +1,59 @@ +* Allwinner PRCM (Power/Reset/Clock Management) Multi-Functional Device + +PRCM is an MFD device exposing several Power Management related devices +(like clks and reset controllers). + +Required properties: + - compatible: "allwinner,sun6i-a31-prcm" + - reg: The PRCM registers range + +The prcm node may contain several subdevices definitions: + - see Documentation/devicetree/clk/sunxi.txt for clock devices + - see Documentation/devicetree/reset/allwinner,sunxi-clock-reset.txt for reset + controller devices + + +Example: + + prcm: prcm at 01f01400 { + compatible = "allwinner,sun6i-a31-prcm"; + reg = <0x01f01400 0x200>; + + /* Put subdevices here */ + ar100: ar100_clk { + compatible = "allwinner,sun6i-a31-ar100-clk"; + #clock-cells = <0>; + clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>; + }; + + ahb0: ahb0_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&ar100_div>; + clock-output-names = "ahb0"; + }; + + apb0: apb0_clk { + compatible = "allwinner,sun6i-a31-apb0-clk"; + #clock-cells = <0>; + clocks = <&ahb0>; + clock-output-names = "apb0"; + }; + + apb0_gates: apb0_gates_clk { + compatible = "allwinner,sun6i-a31-apb0-gates-clk"; + #clock-cells = <1>; + clocks = <&apb0>; + clock-output-names = "apb0_pio", "apb0_ir", + "apb0_timer01", "apb0_p2wi", + "apb0_uart", "apb0_1wire", + "apb0_i2c"; + }; + + apb0_rst: apb0_rst { + compatible = "allwinner,sun6i-a31-clock-reset"; + #reset-cells = <1>; + }; + };
Signature · 1 line
1.8.3.2
PATCH v5 3/5 clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support
In reply to Boris BREZILLONThe PRCM (Power/Reset/Clock Management) unit provides several clock devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0 clk and gates: used to clk peripherals connected to the APB0 bus
Add support for these clks in a separate driver so that they can be probed as platform devices instead of registered during early init. This is needed to be able to probe PRCM MFD subdevices.
--- drivers/clk/sunxi/Makefile | 2 + drivers/clk/sunxi/clk-sun6i-apb0-gates.c | 99 +++++++++++++ drivers/clk/sunxi/clk-sun6i-apb0.c | 77 ++++++++++ drivers/clk/sunxi/clk-sun6i-ar100.c | 233 +++++++++++++++++++++++++++++++ 4 files changed, 411 insertions(+) create mode 100644 drivers/clk/sunxi/clk-sun6i-apb0-gates.c create mode 100644 drivers/clk/sunxi/clk-sun6i-apb0.c create mode 100644 drivers/clk/sunxi/clk-sun6i-ar100.c
drivers/clk/sunxi/Makefile +2 -0
@@ -3,3 +3,5 @@ # obj-y += clk-sunxi.o clk-factors.o + +obj-$(CONFIG_MFD_SUN6I_PRCM) += clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o
drivers/clk/sunxi/clk-sun6i-apb0-gates.c new file +99 -0
99 lines not on this page · raw message
drivers/clk/sunxi/clk-sun6i-apb0.c new file +77 -0
77 lines not on this page · raw message
drivers/clk/sunxi/clk-sun6i-ar100.c new file +233 -0
233 lines not on this page · raw message
Signature · 1 line
1.8.3.2
PATCH v5 4/5 clk: sunxi: document PRCM clock compatible strings
In reply to Boris BREZILLONDocument new compatible strings for clock provided by the PRCM (Power/Reset/Clock Management) unit.
--- Documentation/devicetree/bindings/clock/sunxi.txt | 3 +++ 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/clock/sunxi.txt +3 -0
@@ -20,12 +20,15 @@ Required properties: "allwinner,sun5i-a13-ahb-gates-clk" - for the AHB gates on A13 "allwinner,sun5i-a10s-ahb-gates-clk" - for the AHB gates on A10s "allwinner,sun7i-a20-ahb-gates-clk" - for the AHB gates on A20 + "allwinner,sun6i-a31-ar100-clk" - for the AR100 on A31 "allwinner,sun6i-a31-ahb1-mux-clk" - for the AHB1 multiplexer on A31 "allwinner,sun6i-a31-ahb1-gates-clk" - for the AHB1 gates on A31 "allwinner,sun4i-a10-apb0-clk" - for the APB0 clock + "allwinner,sun6i-a31-apb0-clk" - for the APB0 clock on A31 "allwinner,sun4i-a10-apb0-gates-clk" - for the APB0 gates on A10 "allwinner,sun5i-a13-apb0-gates-clk" - for the APB0 gates on A13 "allwinner,sun5i-a10s-apb0-gates-clk" - for the APB0 gates on A10s + "allwinner,sun6i-a31-apb0-gates-clk" - for the APB0 gates on A31 "allwinner,sun7i-a20-apb0-gates-clk" - for the APB0 gates on A20 "allwinner,sun4i-a10-apb1-clk" - for the APB1 clock "allwinner,sun4i-a10-apb1-mux-clk" - for the APB1 clock muxing
Signature · 1 line
1.8.3.2
PATCH v5 5/5 ARM: sunxi: select MFD_SUN6I_PRCM when sun6i arch support is enabled
In reply to Boris BREZILLONSelect the MFD_SUN6I_PRCM option when sun6i arch is enabled in order to get the PRCM (Power/Reset/Clock Management) related drivers compiled.
--- arch/arm/mach-sunxi/Kconfig | 1 + 1 file changed, 1 insertion(+)
arch/arm/mach-sunxi/Kconfig +1 -0
@@ -23,6 +23,7 @@ config MACH_SUN6I default ARCH_SUNXI select ARCH_HAS_RESET_CONTROLLER select ARM_GIC + select MFD_SUN6I_PRCM select RESET_CONTROLLER select SUN5I_HSTIMER
Signature · 1 line
1.8.3.2
Maxime Ripard
AppliedPATCH v5 5/5 ARM: sunxi: select MFD_SUN6I_PRCM when sun6i arch support is enabled
Quoted 4 lines · Boris BREZILLON
Select the
MFD_SUN6I_PRCMoption when sun6i arch is enabled in order to get the PRCM (Power/Reset/Clock Management) related drivers compiled.Signed-off-by Boris BREZILLON <[email protected]>
Applied, thanks!
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140515/7123bcf6/attachment.sig>
Emilio López
maintainerv5 cover mfd: add basic sun6i A31 PRCM support
In reply to Boris BREZILLONHi Boris,
El 15/05/14 05:55, Boris BREZILLON escribi?:
Quoted 6 lines
Hello,
This patch series adds support for some functions provided by the PRCM (Power/Reset/Clock Management) unit:
- AR100, AHB0 and APB0 clocks
- APB0 reset controller
(snip)
Quoted 2 lines
clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support
clk: sunxi: document PRCM clock compatible strings
I have taken these two on sunxi-clk-for-mike, and I'll be sending the pull to Mike soon.
Cheers,
Emilio