ARM: OMAP: OMAP5 & AM43x DSS

From: Sathya Prakash M R <[email protected]>

Add DSS hwmod data for AM43xx.

Signed-off-by Sathya Prakash M R <[email protected]>

Signed-off-by Tomi Valkeinen <[email protected]>

---
 arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 104 +++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prcm43xx.h             |   1 +
 2 files changed, 105 insertions(+)

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +2 -0

index 5c2cc8083fdd..8c14db2e1e47 100644
@@ -19,6 +19,8 @@
 #include "omap_hwmod.h"
 #include "omap_hwmod_33xx_43xx_common_data.h"
 #include "prcm43xx.h"
+#include "omap_hwmod_common_data.h"
+
 
 /* IP blocks */
 static struct omap_hwmod am43xx_l4_hs_hwmod = {

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +28 -0

+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss = {
+	.master		= &am33xx_l4_ls_hwmod,
+	.slave		= &am43xx_dss_core_hwmod,
+	.clk		= "l4ls_gclk",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_dispc = {
+	.master		= &am33xx_l4_ls_hwmod,
+	.slave		= &am43xx_dss_dispc_hwmod,
+	.clk		= "l4ls_gclk",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_rfbi = {
+	.master		= &am33xx_l4_ls_hwmod,
+	.slave		= &am43xx_dss_rfbi_hwmod,
+	.clk		= "l4ls_gclk",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
 	&am33xx_l4_wkup__synctimer,
 	&am43xx_l4_ls__timer8,

@@ -748,6 +848,10 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
 	&am43xx_l4_ls__ocp2scp1,
 	&am43xx_l3_s__usbotgss0,
 	&am43xx_l3_s__usbotgss1,
+	&am43xx_dss__l3_main,
+	&am43xx_l4_ls__dss,
+	&am43xx_l4_ls__dss_dispc,
+	&am43xx_l4_ls__dss_rfbi,
 	NULL,
 };
 

arch/arm/mach-omap2/prcm43xx.h +1 -0

index 7785be984edd..ad7b3e9977f8 100644
@@ -142,5 +142,6 @@
 #define AM43XX_CM_PER_USBPHYOCP2SCP0_CLKCTRL_OFFSET	0x05B8
 #define AM43XX_CM_PER_USB_OTG_SS1_CLKCTRL_OFFSET        0x0268
 #define AM43XX_CM_PER_USBPHYOCP2SCP1_CLKCTRL_OFFSET	0x05C0
+#define AM43XX_CM_PER_DSS_CLKCTRL_OFFSET		0x0a20
 
 #endif

Quoted 28 lines · Tomi Valkeinen

From: Sathya Prakash M R <[email protected]>

Add DSS hwmod data for AM43xx.

Signed-off-by Sathya Prakash M R <[email protected]>

Signed-off-by Tomi Valkeinen <[email protected]>

---
 arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 104 +++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prcm43xx.h             |   1 +
 2 files changed, 105 insertions(+)

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +2 -0

index 5c2cc8083fdd..8c14db2e1e47 100644
@@ -19,6 +19,8 @@
 #include "omap_hwmod.h"
 #include "omap_hwmod_33xx_43xx_common_data.h"
 #include "prcm43xx.h"
+#include "omap_hwmod_common_data.h"
+
 
 /* IP blocks */
 static struct omap_hwmod am43xx_l4_hs_hwmod = {

@@ -415,6 +417,76 @@ static struct omap_hwmod am43xx_qspi_hwmod = {
 	},
 };
 

arch/arm/mach-omap2/omap_hwmod_43xx_data.c static struct omap_hwmod am43xx_qspi_hwmod = { · line 425

Quoted 6 lines

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +6 -0

+/* Display sub system - DSS */
+
+static struct omap_hwmod_dma_info am43xx_dss_sdma_chs[] = {
+	{ .name = "dispc", .dma_req = 5 },
+	{ .dma_req = -1 },
+};

the dma info needs to come in from DT. Besides these are edma request lines and not sdma.

arch/arm/mach-omap2/omap_hwmod_43xx_data.c static struct omap_hwmod am43xx_qspi_hwmod = { · line 432

Quoted 7 lines

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +7 -0

+
+struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = {
+	.manager_count		= 1,
+	.has_framedonetv_irq	= 0
+};
+
+

[]..

Quoted 8 lines

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +1 -0

+
 /* Interfaces */
 static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
 	.master		= &am33xx_l3_main_hwmod,

@@ -654,6 +726,34 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = {
 	.user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 

arch/arm/mach-omap2/omap_hwmod_43xx_data.c static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = { · line 732

Quoted 4 lines

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +4 -0

+static struct omap_hwmod_ocp_if am43xx_dss__l3_main = {
+	.master		= &am43xx_dss_core_hwmod,
+	.slave		= &am33xx_l3_main_hwmod,
+	.clk		= "disp_clk",

Isn't l3_gclk that clocks the l3 OCP master port?

Quoted 29 lines · Rajendra Nayak

Quoted 28 lines · Tomi Valkeinen

From: Sathya Prakash M R <[email protected]>

Add DSS hwmod data for AM43xx.

Signed-off-by Sathya Prakash M R <[email protected]>

Signed-off-by Tomi Valkeinen <[email protected]>

---
 arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 104 +++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prcm43xx.h             |   1 +
 2 files changed, 105 insertions(+)

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +2 -0

index 5c2cc8083fdd..8c14db2e1e47 100644
@@ -19,6 +19,8 @@
 #include "omap_hwmod.h"
 #include "omap_hwmod_33xx_43xx_common_data.h"
 #include "prcm43xx.h"
+#include "omap_hwmod_common_data.h"
+
 
 /* IP blocks */
 static struct omap_hwmod am43xx_l4_hs_hwmod = {

@@ -415,6 +417,76 @@ static struct omap_hwmod am43xx_qspi_hwmod = {
 	},
 };
 

Quoted 9 lines

arch/arm/mach-omap2/omap_hwmod_43xx_data.c static struct omap_hwmod am43xx_qspi_hwmod = { · line 425

Quoted 6 lines

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +6 -0

+/* Display sub system - DSS */
+
+static struct omap_hwmod_dma_info am43xx_dss_sdma_chs[] = {
+	{ .name = "dispc", .dma_req = 5 },
+	{ .dma_req = -1 },
+};

the dma info needs to come in from DT. Besides these are edma request lines and not sdma.

Right, the sdma information is not needed anymore.

Quoted 17 lines

arch/arm/mach-omap2/omap_hwmod_43xx_data.c static struct omap_hwmod am43xx_qspi_hwmod = { · line 432

Quoted 7 lines

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +7 -0

+
+struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = {
+	.manager_count		= 1,
+	.has_framedonetv_irq	= 0
+};
+
+

[]..

Quoted 8 lines

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +1 -0

+
 /* Interfaces */
 static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
 	.master		= &am33xx_l3_main_hwmod,

@@ -654,6 +726,34 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = {
 	.user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 

Quoted 6 lines

arch/arm/mach-omap2/omap_hwmod_43xx_data.c static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = { · line 732

Quoted 4 lines

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +4 -0

+static struct omap_hwmod_ocp_if am43xx_dss__l3_main = {
+	.master		= &am43xx_dss_core_hwmod,
+	.slave		= &am33xx_l3_main_hwmod,
+	.clk		= "disp_clk",

Isn't l3_gclk that clocks the l3 OCP master port?

Hmm, possibly... dispc_clk looks a bit odd there. It's been very difficult to figure out things like that, with the not-so-good am43xx documentation.

The documentation mentions "L3 Fast Interconnect" and "LCDL3OCPIFCLK" related to DSS's OCP master, but searching for those in the TRM doesn't reveal much.

Would the l3_gclk match the "L3 Fast Interconnect" and l3s_gclk match the "L3 Slow Interconnect".

Tomi

Yeah, thats what it looks like to me. l3_gclk is the 200Mhz clock derived from core-m4 post divider and l3s_gclk/l4ls_gclk are half of that at 100Mhz, derived using a fixed divider of 2.

From bfaf0fafb21c698c86640764c1aa62d6fc73992a Mon Sep 17 00:00:00 2001

Quoted 3 lines · Rajendra Nayak

Yeah, thats what it looks like to me. l3_gclk is the 200Mhz clock derived from core-m4 post divider and l3s_gclk/l4ls_gclk are half of that at 100Mhz, derived using a fixed divider of 2.

Here's an updated patch, with the sdma entry removed and the ocp clock changed to l3_gclk.

From bfaf0fafb21c698c86640764c1aa62d6fc73992a Mon Sep 17 00:00:00 2001
From: Sathya Prakash M R <[email protected]>
Date: Mon, 24 Mar 2014 16:31:53 +0530
Subject: [PATCH] ARM: AM43xx: hwmod: add DSS hwmod data

Add DSS hwmod data for AM43xx.

Signed-off-by Sathya Prakash M R <[email protected]>

Signed-off-by Tomi Valkeinen <[email protected]>

---
 arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 98 ++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prcm43xx.h             |  1 +
 2 files changed, 99 insertions(+)

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +98 -0

index 5c2cc8083fdd..d2a7b6dc36f2 100644
@@ -19,6 +19,8 @@
 #include "omap_hwmod.h"
 #include "omap_hwmod_33xx_43xx_common_data.h"
 #include "prcm43xx.h"
+#include "omap_hwmod_common_data.h"
+
 
 /* IP blocks */
 static struct omap_hwmod am43xx_l4_hs_hwmod = {

@@ -415,6 +417,70 @@ static struct omap_hwmod am43xx_qspi_hwmod = {
 	},
 };
 
+/* Display sub system - DSS */
+
+struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = {
+	.manager_count		= 1,
+	.has_framedonetv_irq	= 0
+};
+
+
+static struct omap_hwmod_class_sysconfig am43xx_dispc_sysc = {
+	.rev_offs	= 0x0000,
+	.sysc_offs	= 0x0010,
+	.syss_offs	= 0x0014,
+	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+	.sysc_fields	= &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class am43xx_dispc_hwmod_class = {
+	.name	= "dispc",
+	.sysc	= &am43xx_dispc_sysc,
+};
+
+static struct omap_hwmod am43xx_dss_core_hwmod = {
+	.name		= "dss_core",
+	.class		= &omap2_dss_hwmod_class,
+	.clkdm_name	= "dss_clkdm",
+	.main_clk	= "disp_clk",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
+			.modulemode   = MODULEMODE_SWCTRL,
+		},
+	},
+};
+
+/* display controller -dispc*/
+
+static struct omap_hwmod am43xx_dss_dispc_hwmod = {
+	.name		= "dss_dispc",
+	.class		= &am43xx_dispc_hwmod_class,
+	.clkdm_name	= "dss_clkdm",
+	.main_clk	= "disp_clk",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
+		},
+	},
+	.dev_attr	= &am43xx_dss_dispc_dev_attr,
+};
+
+/*RFBI*/
+
+static struct omap_hwmod am43xx_dss_rfbi_hwmod = {
+	.name		= "dss_rfbi",
+	.class		= &omap2_rfbi_hwmod_class,
+	.clkdm_name	= "dss_clkdm",
+	.main_clk	= "disp_clk",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
+		},
+	},
+};
+
 /* Interfaces */
 static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
 	.master		= &am33xx_l3_main_hwmod,

@@ -654,6 +720,34 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = {
 	.user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+static struct omap_hwmod_ocp_if am43xx_dss__l3_main = {
+	.master		= &am43xx_dss_core_hwmod,
+	.slave		= &am33xx_l3_main_hwmod,
+	.clk		= "l3_gclk",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss = {
+	.master		= &am33xx_l4_ls_hwmod,
+	.slave		= &am43xx_dss_core_hwmod,
+	.clk		= "l4ls_gclk",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_dispc = {
+	.master		= &am33xx_l4_ls_hwmod,
+	.slave		= &am43xx_dss_dispc_hwmod,
+	.clk		= "l4ls_gclk",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_rfbi = {
+	.master		= &am33xx_l4_ls_hwmod,
+	.slave		= &am43xx_dss_rfbi_hwmod,
+	.clk		= "l4ls_gclk",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
 	&am33xx_l4_wkup__synctimer,
 	&am43xx_l4_ls__timer8,

@@ -748,6 +842,10 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
 	&am43xx_l4_ls__ocp2scp1,
 	&am43xx_l3_s__usbotgss0,
 	&am43xx_l3_s__usbotgss1,
+	&am43xx_dss__l3_main,
+	&am43xx_l4_ls__dss,
+	&am43xx_l4_ls__dss_dispc,
+	&am43xx_l4_ls__dss_rfbi,
 	NULL,
 };
 

arch/arm/mach-omap2/prcm43xx.h +1 -0

index 7785be984edd..ad7b3e9977f8 100644
@@ -142,5 +142,6 @@
 #define AM43XX_CM_PER_USBPHYOCP2SCP0_CLKCTRL_OFFSET	0x05B8
 #define AM43XX_CM_PER_USB_OTG_SS1_CLKCTRL_OFFSET        0x0268
 #define AM43XX_CM_PER_USBPHYOCP2SCP1_CLKCTRL_OFFSET	0x05C0
+#define AM43XX_CM_PER_DSS_CLKCTRL_OFFSET		0x0a20
 
 #endif

Quoted 3 lines · Rajendra Nayak

Yeah, thats what it looks like to me. l3_gclk is the 200Mhz clock derived from core-m4 post divider and l3s_gclk/l4ls_gclk are half of that at 100Mhz, derived using a fixed divider of 2.

Here's an updated patch, with the sdma entry removed and the ocp clock changed to l3_gclk.

From bfaf0fafb21c698c86640764c1aa62d6fc73992a Mon Sep 17 00:00:00 2001
From: Sathya Prakash M R <[email protected]>
Date: Mon, 24 Mar 2014 16:31:53 +0530
Subject: [PATCH] ARM: AM43xx: hwmod: add DSS hwmod data

Add DSS hwmod data for AM43xx.

Signed-off-by Sathya Prakash M R <[email protected]>

Signed-off-by Tomi Valkeinen <[email protected]>

---
 arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 98 ++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prcm43xx.h             |  1 +
 2 files changed, 99 insertions(+)

arch/arm/mach-omap2/omap_hwmod_43xx_data.c +98 -0

index 5c2cc8083fdd..d2a7b6dc36f2 100644
@@ -19,6 +19,8 @@
 #include "omap_hwmod.h"
 #include "omap_hwmod_33xx_43xx_common_data.h"
 #include "prcm43xx.h"
+#include "omap_hwmod_common_data.h"
+
 
 /* IP blocks */
 static struct omap_hwmod am43xx_l4_hs_hwmod = {

@@ -415,6 +417,70 @@ static struct omap_hwmod am43xx_qspi_hwmod = {
 	},
 };
 
+/* Display sub system - DSS */
+
+struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = {
+	.manager_count		= 1,
+	.has_framedonetv_irq	= 0
+};
+
+
+static struct omap_hwmod_class_sysconfig am43xx_dispc_sysc = {
+	.rev_offs	= 0x0000,
+	.sysc_offs	= 0x0010,
+	.syss_offs	= 0x0014,
+	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+	.sysc_fields	= &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class am43xx_dispc_hwmod_class = {
+	.name	= "dispc",
+	.sysc	= &am43xx_dispc_sysc,
+};
+
+static struct omap_hwmod am43xx_dss_core_hwmod = {
+	.name		= "dss_core",
+	.class		= &omap2_dss_hwmod_class,
+	.clkdm_name	= "dss_clkdm",
+	.main_clk	= "disp_clk",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
+			.modulemode   = MODULEMODE_SWCTRL,
+		},
+	},
+};
+
+/* display controller -dispc*/
+
+static struct omap_hwmod am43xx_dss_dispc_hwmod = {
+	.name		= "dss_dispc",
+	.class		= &am43xx_dispc_hwmod_class,
+	.clkdm_name	= "dss_clkdm",
+	.main_clk	= "disp_clk",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
+		},
+	},
+	.dev_attr	= &am43xx_dss_dispc_dev_attr,
+};
+
+/*RFBI*/
+
+static struct omap_hwmod am43xx_dss_rfbi_hwmod = {
+	.name		= "dss_rfbi",
+	.class		= &omap2_rfbi_hwmod_class,
+	.clkdm_name	= "dss_clkdm",
+	.main_clk	= "disp_clk",
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
+		},
+	},
+};
+
 /* Interfaces */
 static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
 	.master		= &am33xx_l3_main_hwmod,

@@ -654,6 +720,34 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = {
 	.user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+static struct omap_hwmod_ocp_if am43xx_dss__l3_main = {
+	.master		= &am43xx_dss_core_hwmod,
+	.slave		= &am33xx_l3_main_hwmod,
+	.clk		= "l3_gclk",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss = {
+	.master		= &am33xx_l4_ls_hwmod,
+	.slave		= &am43xx_dss_core_hwmod,
+	.clk		= "l4ls_gclk",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_dispc = {
+	.master		= &am33xx_l4_ls_hwmod,
+	.slave		= &am43xx_dss_dispc_hwmod,
+	.clk		= "l4ls_gclk",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_rfbi = {
+	.master		= &am33xx_l4_ls_hwmod,
+	.slave		= &am43xx_dss_rfbi_hwmod,
+	.clk		= "l4ls_gclk",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
 	&am33xx_l4_wkup__synctimer,
 	&am43xx_l4_ls__timer8,

@@ -748,6 +842,10 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
 	&am43xx_l4_ls__ocp2scp1,
 	&am43xx_l3_s__usbotgss0,
 	&am43xx_l3_s__usbotgss1,
+	&am43xx_dss__l3_main,
+	&am43xx_l4_ls__dss,
+	&am43xx_l4_ls__dss_dispc,
+	&am43xx_l4_ls__dss_rfbi,
 	NULL,
 };
 

arch/arm/mach-omap2/prcm43xx.h +0 -0

index 7785be984edd..ad7b3e9977f8 100644

Hi,

Here are arch/arm/ patches to add display support for OMAP5 and AM43x.

I have these in my tree, in a branch I will send to Tony for merging. Most of these patches have already been around the lists, but I wanted to send them one more time to verify that all looks right and everybody is fine with them.

Hi Tony,

Quoted 7 lines · Tomi Valkeinen

Hi,

Here are arch/arm/ patches to add display support for OMAP5 and AM43x.

I have these in my tree, in a branch I will send to Tony for merging. Most of these patches have already been around the lists, but I wanted to send them one more time to verify that all looks right and everybody is fine with them.

I have pushed these to:

git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git 3.16/omap

If you're fine with these, I think we can consider that branch stable. There are probably still a few display related .dts changed for the board coming up, but I'll add those on top of the current commits.

I also have pushed OMAP5 and AM43xx related OMAPDSS patches to my for-next branch, so with "3.16/omap" branch and linux-next, the omap5 and am43xx displays should be functional.

How do you want to handle getting the 3.16/omap branch to linux-next? Will you take "ownership" of the branch, and push it to linux-next?

Quoted 11 lines · Tomi Valkeinen

Hi Tony,

Quoted 7 lines · Tomi Valkeinen

Hi,

Here are arch/arm/ patches to add display support for OMAP5 and AM43x.

I have these in my tree, in a branch I will send to Tony for merging. Most of these patches have already been around the lists, but I wanted to send them one more time to verify that all looks right and everybody is fine with them.

Quoted 7 lines

I have pushed these to:

git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git 3.16/omap

If you're fine with these, I think we can consider that branch stable. There are probably still a few display related .dts changed for the board coming up, but I'll add those on top of the current commits.

Please coordinate things with Paul and Tero so you at least have proper acks for the hwmod and and clock patches. In general we really want to queue hwmod and clock changes separately as those can easily mess up things in a bad way like we've already seen with overlapping hwmod entries in the .dts files.

Also, I'm wondering why we still have .clk and .opt_clks entries in the hwmod data for am43xx and omap5 which are both device tree based with all the clocks coming from .dts files?

Quoted 20 lines · Tony Lindgren

Quoted 11 lines · Tomi Valkeinen

Hi Tony,

Quoted 7 lines · Tomi Valkeinen

Hi,

Here are arch/arm/ patches to add display support for OMAP5 and AM43x.

I have these in my tree, in a branch I will send to Tony for merging. Most of these patches have already been around the lists, but I wanted to send them one more time to verify that all looks right and everybody is fine with them.

Quoted 7 lines

I have pushed these to:

git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git 3.16/omap

If you're fine with these, I think we can consider that branch stable. There are probably still a few display related .dts changed for the board coming up, but I'll add those on top of the current commits.

Quoted 5 lines

Please coordinate things with Paul and Tero so you at least have proper acks for the hwmod and and clock patches. In general we really want to queue hwmod and clock changes separately as those can easily mess up things in a bad way like we've already seen with overlapping hwmod entries in the .dts files.

Ok. I'm fine with splitting the series if that's easiest way to manage it.

Paul, Tero?

Quoted 3 lines

Also, I'm wondering why we still have .clk and .opt_clks entries in the hwmod data for am43xx and omap5 which are both device tree based with all the clocks coming from .dts files?

I think they are needed for the omap_device/hwmod stuff to work. Only omapdss driver knows about the clocks defined in the .dts files, and the omap_device/hwmod code still needs to do the reset and maybe some other tasks that require the clocks.

Quoted 8 lines

Quoted 3 lines

Also, I'm wondering why we still have .clk and .opt_clks entries in the hwmod data for am43xx and omap5 which are both device tree based with all the clocks coming from .dts files?

I think they are needed for the omap_device/hwmod stuff to work. Only omapdss driver knows about the clocks defined in the .dts files, and the omap_device/hwmod code still needs to do the reset and maybe some other tasks that require the clocks.

We're already populating the hwmod data from dts entries, that's done by omap_device_build_from_dt. Why aren't we doing that for dt defined clocks?

I'd rather not start adding new data that will then just be removed, that's what people call "pointless extra churn".

Quoted 9 lines · Tony Lindgren

Quoted 8 lines

Quoted 3 lines

Also, I'm wondering why we still have .clk and .opt_clks entries in the hwmod data for am43xx and omap5 which are both device tree based with all the clocks coming from .dts files?

I think they are needed for the omap_device/hwmod stuff to work. Only omapdss driver knows about the clocks defined in the .dts files, and the omap_device/hwmod code still needs to do the reset and maybe some other tasks that require the clocks.

Quoted 5 lines

We're already populating the hwmod data from dts entries, that's done by omap_device_build_from_dt. Why aren't we doing that for dt defined clocks?

I'd rather not start adding new data that will then just be removed, that's what people call "pointless extra churn".

I don't know why. I have to say I'm not 100% sure if that's done or not, but at least I can't find where it's done.

Hi,

Quoted 11 lines · Tomi Valkeinen

Quoted 9 lines · Tony Lindgren

Quoted 8 lines

Quoted 3 lines

Also, I'm wondering why we still have .clk and .opt_clks entries in the hwmod data for am43xx and omap5 which are both device tree based with all the clocks coming from .dts files?

I think they are needed for the omap_device/hwmod stuff to work. Only omapdss driver knows about the clocks defined in the .dts files, and the omap_device/hwmod code still needs to do the reset and maybe some other tasks that require the clocks.

Quoted 8 lines

Quoted 5 lines

We're already populating the hwmod data from dts entries, that's done by omap_device_build_from_dt. Why aren't we doing that for dt defined clocks?

I'd rather not start adding new data that will then just be removed, that's what people call "pointless extra churn".

I don't know why. I have to say I'm not 100% sure if that's done or not, but at least I can't find where it's done.

The reason why clocks are needed from hwmod data is because we still don't populate hwmod fields like main_clk and opt_clock from DT clocks.

The reason why this isn't done yet is because we currently haven't figured out a clean way to tell hwmod what clock is the main_clk, and what clocks are optional clocks.

One of the proposed methods was to assume the clock named to be "fck" as main_clk, and the remaining clocks as optional clocks for hwmod. That method wasn't agreed upon, this looks like the thread which discusses this:

http://marc.info/?l=linux-arm-kernel&m=138928084823142&w=2

Archit

Quoted 11 lines · Tomi Valkeinen

Hi Tony,

Quoted 7 lines · Tomi Valkeinen

Hi,

Here are arch/arm/ patches to add display support for OMAP5 and AM43x.

I have these in my tree, in a branch I will send to Tony for merging. Most of these patches have already been around the lists, but I wanted to send them one more time to verify that all looks right and everybody is fine with them.

Quoted 7 lines

I have pushed these to:

git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git 3.16/omap

If you're fine with these, I think we can consider that branch stable. There are probably still a few display related .dts changed for the board coming up, but I'll add those on top of the current commits.

Please coordinate things with Paul and Tero so you at least have proper acks for the hwmod and and clock patches. In general we really want to queue hwmod and clock changes separately as those can easily mess up things in a bad way like we've already seen with overlapping hwmod entries in the .dts files.