mx6sabreauto: Add the mx6dual-lite variant
PATCH 1/1 mx6sabreauto: Add the mx6dual-lite variant
Tested by booting a mainline kernel via TFTP.
Signed-off-by Fabio Estevam <[email protected]>
--- board/freescale/mx6qsabreauto/mx6dl.cfg | 130 ++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/mx6qsabreauto.h | 4 + 3 files changed, 135 insertions(+) create mode 100644 board/freescale/mx6qsabreauto/mx6dl.cfg
board/freescale/mx6qsabreauto/mx6dl.cfg new file +130 -0
@@ -0,0 +1,130 @@ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * Jason Liu <[email protected]> + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e0774 0x000C0000 +DATA 4 0x020e0754 0x00000000 +DATA 4 0x020e04ac 0x00000030 +DATA 4 0x020e04b0 0x00000030 +DATA 4 0x020e0464 0x00000030 +DATA 4 0x020e0490 0x00000030 +DATA 4 0x020e074c 0x00000030 +DATA 4 0x020e0494 0x00000030 +DATA 4 0x020e04a0 0x00000000 +DATA 4 0x020e04b4 0x00000030 +DATA 4 0x020e04b8 0x00000030 +DATA 4 0x020e076c 0x00000030 +DATA 4 0x020e0750 0x00020000 +DATA 4 0x020e04bc 0x00000028 +DATA 4 0x020e04c0 0x00000028 +DATA 4 0x020e04c4 0x00000028 +DATA 4 0x020e04c8 0x00000028 +DATA 4 0x020e04cc 0x00000028 +DATA 4 0x020e04d0 0x00000028 +DATA 4 0x020e04d4 0x00000028 +DATA 4 0x020e04d8 0x00000028 +DATA 4 0x020e0760 0x00020000 +DATA 4 0x020e0764 0x00000028 +DATA 4 0x020e0770 0x00000028 +DATA 4 0x020e0778 0x00000028 +DATA 4 0x020e077c 0x00000028 +DATA 4 0x020e0780 0x00000028 +DATA 4 0x020e0784 0x00000028 +DATA 4 0x020e078c 0x00000028 +DATA 4 0x020e0748 0x00000028 +DATA 4 0x020e0470 0x00000028 +DATA 4 0x020e0474 0x00000028 +DATA 4 0x020e0478 0x00000028 +DATA 4 0x020e047c 0x00000028 +DATA 4 0x020e0480 0x00000028 +DATA 4 0x020e0484 0x00000028 +DATA 4 0x020e0488 0x00000028 +DATA 4 0x020e048c 0x00000028 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F +DATA 4 0x021b480c 0x001F001F +DATA 4 0x021b4810 0x001F001F +DATA 4 0x021b083c 0x42190217 +DATA 4 0x021b0840 0x017B017B +DATA 4 0x021b483c 0x4176017B +DATA 4 0x021b4840 0x015F016C +DATA 4 0x021b0848 0x4C4C4D4C +DATA 4 0x021b4848 0x4A4D4C48 +DATA 4 0x021b0850 0x3F3F3F40 +DATA 4 0x021b4850 0x3538382E +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b0824 0x33333333 +DATA 4 0x021b0828 0x33333333 +DATA 4 0x021b481c 0x33333333 +DATA 4 0x021b4820 0x33333333 +DATA 4 0x021b4824 0x33333333 +DATA 4 0x021b4828 0x33333333 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b48b8 0x00000800 +DATA 4 0x021b0004 0x00020025 +DATA 4 0x021b0008 0x00333030 +DATA 4 0x021b000c 0x676B5313 +DATA 4 0x021b0010 0xB66E8B63 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b0018 0x00001740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x006B1023 +DATA 4 0x021b0040 0x00000047 +DATA 4 0x021b0000 0x841A0000 +DATA 4 0x021b001c 0x04008032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x05208030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00005800 +DATA 4 0x021b0818 0x00011117 +DATA 4 0x021b4818 0x00011117 +DATA 4 0x021b0004 0x00025565 +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 + +/* set the default clock gate to save power */ +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF00000 +DATA 4 0x020c4078 0xFFFFF300 +DATA 4 0x020c407c 0x0F0000C3 +DATA 4 0x020c4080 0x00000FFF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F
boards.cfg +1 -0
@@ -320,6 +320,7 @@ Active arm armv7 mx6 boundary nitrogen6x Active arm armv7 mx6 congatec cgtqmx6eval cgtqmx6qeval cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Leo Sartre <[email protected]> Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg Jason Liu <[email protected]> Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q Fabio Estevam <[email protected]> +Active arm armv7 mx6 freescale mx6qsabreauto mx6dlsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL Fabio Estevam <[email protected]> Active arm armv7 mx6 freescale mx6sabresd mx6dlsabresd mx6sabresd:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL Fabio Estevam <[email protected]> Active arm armv7 mx6 freescale mx6sabresd mx6qsabresd mx6sabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Fabio Estevam <[email protected]> Active arm armv7 mx6 freescale mx6slevk mx6slevk mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL Fabio Estevam <[email protected]>
include/configs/mx6qsabreauto.h +4 -0
@@ -12,7 +12,11 @@#define CONFIG_MACH_TYPE 3529#define CONFIG_MXC_UART_BASE UART4_BASE#define CONFIG_CONSOLE_DEV "ttymxc3" +#if definedCONFIG_MX6Q #define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb" +#elif definedCONFIG_MX6DL +#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabreauto.dtb" +#endif #define CONFIG_MMCROOT "/dev/mmcblk0p2"#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
Signature · 1 line
1.8.3.2
PATCH 1/1 mx6sabreauto: Add the mx6dual-lite variant
Hi Stefano,
Quoted 3 lines · Fabio Estevam
Tested by booting a mainline kernel via TFTP.
Signed-off-by Fabio Estevam <[email protected]>
Any comments about this one?
PATCH 1/1 mx6sabreauto: Add the mx6dual-lite variant
Quoted 10 lines · Fabio Estevam
Hi Stefano,
Quoted 3 lines · Fabio Estevam
Tested by booting a mainline kernel via TFTP.
Signed-off-by Fabio Estevam <[email protected]>Any comments about this one?
Not on my side - I set it ready to be merged.
Regards,
Stefano
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 1/1 mx6sabreauto: Add the mx6dual-lite variant
In reply to Fabio EstevamQuoted 4 lines · Fabio Estevam
Tested by booting a mainline kernel via TFTP.
Signed-off-by Fabio Estevam <[email protected]>---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================