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ARM: socfpga: dts: add watchdog0+1

PATCH New Steffen Trumtrar 2 participants 4 messages May 22, 2014 Device tree bindings

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#0 lore raw

PATCH 1/1 ARM: socfpga: dts: add watchdog0+1

The SoCFPGA has two watchdog timers. Add them to the dtsi.

---
 arch/arm/boot/dts/socfpga.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
arch/arm/boot/dts/socfpga.dtsi +16 -0
index 56fc214..ee10fa6 100644
@@ -549,6 +549,22 @@
 			reg = <0xffd05000 0x1000>;
 		};
 
+		watchdog0: wd at ffd02000 {
+			compatible = "snps,dw-wdt";
+			reg = <0xffd02000 0x1000>;
+			interrupts = <0 171 0>;
+			clocks = <&osc1>;
+			status = "disabled";
+		};
+
+		watchdog1: wd at ffd04000 {
+			compatible = "snps,dw-wdt";
+			reg = <0xffd03000 0x1000>;
+			interrupts = <0 172 0>;
+			clocks = <&osc1>;
+			status = "disabled";
+		};
+
 		sysmgr: sysmgr at ffd08000 {
 			compatible = "altr,sys-mgr", "syscon";
 			reg = <0xffd08000 0x4000>;
Signature · 1 line
2.0.0.rc0
#1 lore raw

PATCH 1/1 ARM: socfpga: dts: add watchdog0+1

Hello.

Quoted 12 lines · Steffen Trumtrar

The SoCFPGA has two watchdog timers. Add them to the dtsi.

---
  arch/arm/boot/dts/socfpga.dtsi | 16 ++++++++++++++++
  1 file changed, 16 insertions(+)
arch/arm/boot/dts/socfpga.dtsi +0 -0
index 56fc214..ee10fa6 100644

arch/arm/boot/dts/socfpga.dtsi line 552

Quoted 4 lines
arch/arm/boot/dts/socfpga.dtsi +1 -0
@@ -549,6 +549,22 @@
  			reg = <0xffd05000 0x1000>;
  		};
 
+		watchdog0: wd at ffd02000 {

The node name should be "watchdog", according to section 2.2.2 of the
ePPAR standard [1].

arch/arm/boot/dts/socfpga.dtsi line 560

Quoted 1 line
arch/arm/boot/dts/socfpga.dtsi +1 -0
+		watchdog1: wd at ffd04000 {

Same here.

[1] http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf

WBR, Sergei

#2 lore raw

PATCH 1/1 ARM: socfpga: dts: add watchdog0+1

In reply to Steffen Trumtrar

Hello.

Quoted 12 lines · Steffen Trumtrar

The SoCFPGA has two watchdog timers. Add them to the dtsi.

---
  arch/arm/boot/dts/socfpga.dtsi | 16 ++++++++++++++++
  1 file changed, 16 insertions(+)
arch/arm/boot/dts/socfpga.dtsi +0 -0
index 56fc214..ee10fa6 100644
@@ -549,6 +549,22 @@

[...]

arch/arm/boot/dts/socfpga.dtsi line 560

Quoted 1 line
arch/arm/boot/dts/socfpga.dtsi +1 -0
+		watchdog1: wd at ffd04000 {

Oh, and the unit-address part of the name should match the "reg" property.

arch/arm/boot/dts/socfpga.dtsi line 567

Quoted 7 lines
arch/arm/boot/dts/socfpga.dtsi +7 -0
+			compatible = "snps,dw-wdt";
+			reg = <0xffd03000 0x1000>;
+			interrupts = <0 172 0>;
+			clocks = <&osc1>;
+			status = "disabled";
+		};
+

WBR, Sergei

#3 lore raw

PATCH 1/1 ARM: socfpga: dts: add watchdog0+1

Quoted 17 lines · Sergei Shtylyov

Hello.

Quoted 12 lines · Steffen Trumtrar

The SoCFPGA has two watchdog timers. Add them to the dtsi.

---
 arch/arm/boot/dts/socfpga.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
arch/arm/boot/dts/socfpga.dtsi +0 -0
index 56fc214..ee10fa6 100644
@@ -549,6 +549,22 @@

[...]

Quoted 4 lines

arch/arm/boot/dts/socfpga.dtsi line 560

Quoted 1 line
arch/arm/boot/dts/socfpga.dtsi +1 -0
+		watchdog1: wd at ffd04000 {

Oh, and the unit-address part of the name should match the "reg" property.

Oops. Of course.

Quoted 7 lines

arch/arm/boot/dts/socfpga.dtsi line 567

Quoted 7 lines
arch/arm/boot/dts/socfpga.dtsi +7 -0
+			compatible = "snps,dw-wdt";
+			reg = <0xffd03000 0x1000>;
+			interrupts = <0 172 0>;
+			clocks = <&osc1>;
+			status = "disabled";
+		};
+

Thanks,
Steffen

Signature · 4 lines
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