Enable LCD display on snow

131 lines not on this page · raw message

363 lines not on this page · raw message

index ac0b541..a64161b 100644
@@ -11,9 +11,9 @@
 #include <fsl_pmic.h>
 #include <errno.h>
 
-#if defined(CONFIG_PMIC_FSL_MC13892)
+#if defined(CONFIG_POWER_FSL_MC13892)
 #define FSL_PMIC_I2C_LENGTH	3
-#elif defined(CONFIG_PMIC_FSL_MC34704)
+#elif defined(CONFIG_POWER_FSL_MC34704)
 #define FSL_PMIC_I2C_LENGTH	1
 #endif
 

@@ -51,7 +51,7 @@ int pmic_init(unsigned char bus)
 	p->hw.i2c.addr = CONFIG_SYS_FSL_PMIC_I2C_ADDR;
 	p->hw.i2c.tx_num = FSL_PMIC_I2C_LENGTH;
 #else
-#error "You must select CONFIG_POWER_SPI or CONFIG_PMIC_I2C"
+#error "You must select CONFIG_POWER_SPI or CONFIG_POWER_I2C"
 #endif
 
 	return 0;

index 515facf..30ecd45 100644
@@ -224,8 +224,8 @@
 
 /* PMIC */
 #define CONFIG_PMIC
-#define CONFIG_PMIC_I2C
-#define CONFIG_PMIC_MAX77686
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_MAX77686
 
 #define CONFIG_DEFAULT_DEVICE_TREE	exynos5250-arndale
 

index b7ff472..9d1d56a 100644
@@ -45,7 +45,7 @@
 #define CONFIG_SYS_INIT_SP_ADDR	CONFIG_IRAM_STACK
 
 /* PMIC */
-#define CONFIG_PMIC_MAX77686
+#define CONFIG_POWER_MAX77686
 
 /* Sound */
 #define CONFIG_CMD_SOUND

index aff2419..d464ad9 100644
@@ -107,7 +107,7 @@
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_FSL
-#define CONFIG_PMIC_FSL_MC34704
+#define CONFIG_POWER_FSL_MC34704
 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x54
 
 #define CONFIG_DOS_PARTITION

index 0a46f4c..ab48144 100644
@@ -52,7 +52,7 @@
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_FSL
-#define CONFIG_PMIC_FSL_MC13892
+#define CONFIG_POWER_FSL_MC13892
 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x08
 #define CONFIG_RTC_MC13XXX
 

index 3f0d80a..042cdd0 100644
@@ -45,7 +45,7 @@
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_FSL
 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    8
-#define CONFIG_PMIC_FSL_MC13892
+#define CONFIG_POWER_FSL_MC13892
 #define CONFIG_RTC_MC13XXX
 
 /* MMC Configs */

index 5859f36..c7f54d4 100644
@@ -80,7 +80,7 @@
 #define CONFIG_POWER_I2C
 #define CONFIG_DIALOG_POWER
 #define CONFIG_POWER_FSL
-#define CONFIG_PMIC_FSL_MC13892
+#define CONFIG_POWER_FSL_MC13892
 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR	0x48
 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x8
 

index 695bc23..259205e 100644
@@ -55,7 +55,7 @@
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_FSL
-#define CONFIG_PMIC_FSL_MC13892
+#define CONFIG_POWER_FSL_MC13892
 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x8
 #define CONFIG_RTC_MC13XXX
 

index 41b179f..bfde692 100644
@@ -19,7 +19,7 @@ static int power_battery_charge(struct pmic *bat)
 	struct battery *battery = p_bat->bat;
 	int k;
 
-	if (bat->chrg->chrg_state(p_bat->chrg, CHARGER_ENABLE, 450))
+	if (bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_ENABLE, 450))
 		return -1;
 
 	for (k = 0; bat->chrg->chrg_bat_present(p_bat->chrg) &&

@@ -42,7 +42,7 @@ static int power_battery_charge(struct pmic *bat)
 		}
 	}
  exit:
-	bat->chrg->chrg_state(p_bat->chrg, CHARGER_DISABLE, 0);
+	bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_DISABLE, 0);
 
 	return 0;
 }

index 94015aa..57221ad 100644
@@ -17,7 +17,7 @@ static int power_battery_charge(struct pmic *bat)
 {
 	struct power_battery *p_bat = bat->pbat;
 
-	if (bat->chrg->chrg_state(p_bat->chrg, CHARGER_ENABLE, 450))
+	if (bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_ENABLE, 450))
 		return -1;
 
 	return 0;

index 1a4416b..6b28e28 100644
@@ -22,7 +22,7 @@ static int max77693_charger_state(struct pmic *p, int state, int current)
 	val = MAX77693_CHG_UNLOCK;
 	pmic_reg_write(p, MAX77693_CHG_CNFG_06, val);
 
-	if (state == CHARGER_DISABLE) {
+	if (state == PMIC_CHARGER_DISABLE) {
 		puts("Disable the charger.\n");
 		pmic_reg_read(p, MAX77693_CHG_CNFG_00, &val);
 		val &= ~0x01;

index ba01692..a36a9a0 100644
@@ -35,7 +35,7 @@ static int pmic_charger_state(struct pmic *p, int state, int current)
 	if (pmic_probe(p))
 		return -1;
 
-	if (state == CHARGER_DISABLE) {
+	if (state == PMIC_CHARGER_DISABLE) {
 		puts("Disable the charger.\n");
 		pmic_reg_read(p, MAX8997_REG_MBCCTRL2, &val);
 		val &= ~(MBCHOSTEN | VCHGR_FC);

index 616d051..3d59e59 100644
@@ -10,8 +10,6 @@
 
 #include <power/power_chrg.h>
 
-enum {CHARGER_ENABLE, CHARGER_DISABLE};
-
 #define CHARGER_MIN_CURRENT 200
 #define CHARGER_MAX_CURRENT 2000
 

index 74c5d54..728d60a 100644
@@ -170,7 +170,6 @@ enum {
 #define SAFEOUT_3_30V 0x03
 
 /* Charger */
-enum {CHARGER_ENABLE, CHARGER_DISABLE};
 #define DETBAT                  (1 << 2)
 #define MBCICHFCSET             (1 << 4)
 #define MBCHOSTEN               (1 << 6)

index 8f282dd..a62e6c9 100644
@@ -17,6 +17,11 @@ enum { I2C_PMIC, I2C_NUM, };
 enum { PMIC_READ, PMIC_WRITE, };
 enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };
 
+enum {
+	PMIC_CHARGER_DISABLE,
+	PMIC_CHARGER_ENABLE,
+};
+
 struct p_i2c {
 	unsigned char addr;
 	unsigned char *buf;

310 lines not on this page · raw message

index 3196cf6..669ab90 100644
@@ -92,6 +92,7 @@ enum fdt_compat_id {
 	COMPAT_SAMSUNG_EXYNOS5_I2C,	/* Exynos5 High Speed I2C Controller */
 	COMPAT_SANDBOX_HOST_EMULATION,	/* Sandbox emulation of a function */
 	COMPAT_SANDBOX_LCD_SDL,		/* Sandbox LCD emulation with SDL */
+	COMPAT_TI_TPS65090,		/* Texas Instrument TPS65090 */
 
 	COMPAT_COUNT,
 };

73 lines not on this page · raw message

index 8ecb80f..b389d4e 100644
@@ -66,6 +66,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
 	COMPAT(SANDBOX_HOST_EMULATION, "sandbox,host-emulation"),
 	COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
+	COMPAT(TI_TPS65090, "ti,tps65090"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

index 5a9b1b4..b830495 100644
@@ -259,6 +259,7 @@
 /* PMIC */
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
+#define CONFIG_POWER_TPS65090
 
 /* Ethernet Controllor Driver */
 #ifdef CONFIG_CMD_NET

index ac76870..594cd11 100644
@@ -23,6 +23,8 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
 	if (check_reg(p, reg))
 		return -1;
 
+	I2C_SET_BUS(p->bus);
+
 	switch (pmic_i2c_tx_num) {
 	case 3:
 		if (p->sensor_byte_order == PMIC_SENSOR_BYTE_ORDER_BIG) {

@@ -66,6 +68,8 @@ int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
 	if (check_reg(p, reg))
 		return -1;
 
+	I2C_SET_BUS(p->bus);
+
 	if (i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num))
 		return -1;
 

index fbf5850..bce7583 100644
@@ -20,6 +20,7 @@
 #include <asm/arch/sromc.h>
 #include <power/pmic.h>
 #include <power/max77686_pmic.h>
+#include <power/tps65090_pmic.h>
 #include <tmu.h>
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -161,7 +162,19 @@ int exynos_power_init(void)
 
 #ifdef CONFIG_POWER_MAX77686
 	ret = max77686_init();
+	if (ret)
+		return ret;
 #endif
+#ifdef CONFIG_POWER_TPS65090
+	/*
+	 * The TPS65090 may not be in the device tree. If so, it is not
+	 * an error.
+	 */
+	ret = tps65090_init();
+	if (ret == 0 || ret == -ENODEV)
+		return 0;
+#endif
+
 	return ret;
 }
 #endif	/* CONFIG_POWER */

index 11fe5b8..48b5511 100644
@@ -48,6 +48,8 @@ int do_lowlevel_init(void)
 
 	arch_cpu_init();
 
+	set_ps_hold_ctrl();
+
 	reset_status = get_reset_status();
 
 	switch (reset_status) {

index bce7583..d6ce133 100644
@@ -11,9 +11,9 @@
 #include <i2c.h>
 #include <netdev.h>
 #include <spi.h>
+#include <asm/gpio.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/dwmmc.h>
-#include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/power.h>

@@ -180,6 +180,59 @@ int exynos_power_init(void)
 #endif	/* CONFIG_POWER */
 
 #ifdef CONFIG_LCD
+static int board_dp_bridge_setup(void)
+{
+	const int max_tries = 10;
+	int num_tries, node;
+
+	/*
+	 * TODO(sjg): Use device tree for GPIOs when exynos GPIO
+	 * numbering patch is in mainline.
+	 */
+	debug("%s\n", __func__);
+	node = fdtdec_next_compatible(gd->fdt_blob, 0, COMPAT_NXP_PTN3460);
+	if (node < 0) {
+		debug("%s: No node for DP bridge in device tree\n", __func__);
+		return -ENODEV;
+	}
+
+	/* Setup the GPIOs */
+
+	/* PD is ACTIVE_LOW, and initially de-asserted */
+	gpio_set_pull(EXYNOS5_GPIO_Y25, S5P_GPIO_PULL_NONE);
+	gpio_direction_output(EXYNOS5_GPIO_Y25, 1);
+
+	/* Reset is ACTIVE_LOW */
+	gpio_set_pull(EXYNOS5_GPIO_X15, S5P_GPIO_PULL_NONE);
+	gpio_direction_output(EXYNOS5_GPIO_X15, 0);
+
+	udelay(10);
+	gpio_set_value(EXYNOS5_GPIO_X15, 1);
+
+	gpio_direction_input(EXYNOS5_GPIO_X07);
+
+	/*
+	 * We need to wait for 90ms after bringing up the bridge since there
+	 * is a phantom "high" on the HPD chip during its bootup.  The phantom
+	 * high comes within 7ms of de-asserting PD and persists for@least
+	 * 15ms.  The real high comes roughly 50ms after PD is de-asserted. The
+	 * phantom high makes it hard for us to know when the NXP chip is up.
+	 */
+	mdelay(90);
+
+	for (num_tries = 0; num_tries < max_tries; num_tries++) {
+		/* Check HPD.  If it's high, we're all good. */
+		if (gpio_get_value(EXYNOS5_GPIO_X07))
+				return 0;
+
+		debug("%s: eDP bridge failed to come up; try %d of %d\n",
+		      __func__, num_tries, max_tries);
+	}
+
+	/* Immediately go into bridge reset if the hp line is not high */
+	return -ENODEV;
+}
+
 void exynos_cfg_lcd_gpio(void)
 {
 	/* For Backlight */

@@ -198,4 +251,49 @@ void exynos_set_dp_phy(unsigned int onoff)
 {
 	set_dp_phy_ctrl(onoff);
 }
+
+void exynos_backlight_on(unsigned int on)
+{
+	debug("%s(%u)\n", __func__, on);
+
+	if (!on)
+		return;
+
+#ifdef CONFIG_POWER_TPS65090
+	int ret;
+
+	ret = tps65090_fet_enable(1); /* Enable FET1, backlight */
+	if (ret)
+		return;
+
+	/* T5 in the LCD timing spec (defined as > 10ms) */
+	mdelay(10);
+
+	/* board_dp_backlight_pwm */
+	gpio_direction_output(EXYNOS5_GPIO_B20, 1);
+
+	/* T6 in the LCD timing spec (defined as > 10ms) */
+	mdelay(10);
+
+	/* board_dp_backlight_en */
+	gpio_direction_output(EXYNOS5_GPIO_X30, 1);
+#endif
+}
+
+void exynos_lcd_power_on(void)
+{
+	int ret;
+
+	debug("%s\n", __func__);
+
+#ifdef CONFIG_POWER_TPS65090
+	/* board_dp_lcd_vdd */
+	tps65090_fet_enable(6); /* Enable FET6, lcd panel */
+#endif
+
+	ret = board_dp_bridge_setup();
+	if (ret && ret != -ENODEV)
+		printf("LCD bridge failed to enable: %d\n", ret);
+}
+
 #endif

index 669ab90..ea50d75 100644
@@ -93,6 +93,7 @@ enum fdt_compat_id {
 	COMPAT_SANDBOX_HOST_EMULATION,	/* Sandbox emulation of a function */
 	COMPAT_SANDBOX_LCD_SDL,		/* Sandbox LCD emulation with SDL */
 	COMPAT_TI_TPS65090,		/* Texas Instrument TPS65090 */
+	COMPAT_NXP_PTN3460,		/* NXP PTN3460 DP/LVDS bridge */
 
 	COMPAT_COUNT,
 };

index b389d4e..fbab678 100644
@@ -67,6 +67,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(SANDBOX_HOST_EMULATION, "sandbox,host-emulation"),
 	COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
 	COMPAT(TI_TPS65090, "ti,tps65090"),
+	COMPAT(COMPAT_NXP_PTN3460, "nxp,ptn3460"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

index 2378077..65f67dc 100644
@@ -6,4 +6,4 @@
 
 typedef int (*init_fnc_t)(void);
 
-int initcall_run_list(init_fnc_t init_sequence[]);
+int initcall_run_list(const init_fnc_t init_sequence[]);

index fa76dd7..7597bad 100644
@@ -7,15 +7,22 @@
 #include <common.h>
 #include <initcall.h>
 
-int initcall_run_list(init_fnc_t init_sequence[])
+DECLARE_GLOBAL_DATA_PTR;
+
+int initcall_run_list(const init_fnc_t init_sequence[])
 {
-	init_fnc_t *init_fnc_ptr;
+	const init_fnc_t *init_fnc_ptr;
 
 	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
-		debug("initcall: %p\n", *init_fnc_ptr);
+		unsigned long reloc_ofs = 0;
+
+		if (gd->flags & GD_FLG_RELOC)
+			reloc_ofs = gd->reloc_off;
+		debug("initcall: %p\n", (char *)*init_fnc_ptr - reloc_ofs);
 		if ((*init_fnc_ptr)()) {
-			debug("initcall sequence %p failed at call %p\n",
-			      init_sequence, *init_fnc_ptr);
+			printf("initcall sequence %p failed at call %p\n",
+			       init_sequence,
+			       (char *)*init_fnc_ptr - reloc_ofs);
 			return -1;
 		}
 	}