Fix bug in T4240QDS code. Don't access nonexistent registers
RFC PATCH 1/1 Fix bug in T4240QDS code. Don't access nonexistent registers
The code in misc_init_r() verifies actual SERDES clocks versus expected. It supposes that the number of clocks is MAX_SERDES. However, the number of pllcr0 registers is only SRDS_MAX_BANK. This clearly results in access to wrong memory. I don't have the datasheet to design a correct solution, but at least let's change it to access only the existing registers.
--- board/freescale/t4qds/t4240qds.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
board/freescale/t4qds/t4240qds.c +1 -1
@@ -662,7 +662,7 @@ int misc_init_r(void) } } -for (i =0 ; i <MAX_SERDES ; i++) { +for (i =0 ; i <SRDS_MAX_BANK ; i++) {u32 pllcr0 = srds_regs->bank[i].pllcr0;u32 expected = pllcr0 &SRDS_PLLCR0_RFCK_SEL_MASK ;if (expected != actual[i]) {
Signature · 1 line
1.7.9
RFC PATCH 1/1 Fix bug in T4240QDS code. Don't access nonexistent registers
Quoted 19 lines · Vasili Galka
The code in
misc_init_r()verifies actual SERDES clocks versus expected. It supposes that the number of clocks isMAX_SERDES. However, the number of pllcr0 registers is onlySRDS_MAX_BANK. This clearly results in access to wrong memory. I don't have the datasheet to design a correct solution, but at least let's change it to access only the existing registers.Signed-off-by Vasili Galka <[email protected]>Cc York Sun <[email protected]>--- board/freescale/t4qds/t4240qds.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)board/freescale/t4qds/t4240qds.c +0
-0
board/freescale/t4qds/t4240qds.c int misc_init_r(void) · line 668
Quoted 8 lines
board/freescale/t4qds/t4240qds.c +1
-1@@ -662,7 +662,7 @@ int misc_init_r(void) } } -for (i =0 ; i <MAX_SERDES ; i++) { +for (i =0 ; i <SRDS_MAX_BANK ; i++) {u32 pllcr0 = srds_regs->bank[i].pllcr0;u32 expected = pllcr0 &SRDS_PLLCR0_RFCK_SEL_MASK ;if (expected != actual[i]) {
Thanks for fixing it.
York
RFC PATCH 1/1 Fix bug in T4240QDS code. Don't access nonexistent registers
In reply to Vasili GalkaThis patch points out a bug in T4240QDS code. But the fix is not correct.
Shaohui, please take a closer look and submit a patch to fix it. I believe the code should check each Bank of each SerDes (totally 8 clocks).
Thanks Vasili for pointing out.
York
Quoted 27 lines · Vasili Galka
The code in
misc_init_r()verifies actual SERDES clocks versus expected. It supposes that the number of clocks isMAX_SERDES. However, the number of pllcr0 registers is onlySRDS_MAX_BANK. This clearly results in access to wrong memory. I don't have the datasheet to design a correct solution, but at least let's change it to access only the existing registers.Signed-off-by Vasili Galka <[email protected]>Cc York Sun <[email protected]>--- board/freescale/t4qds/t4240qds.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)board/freescale/t4qds/t4240qds.c +1
-1@@ -662,7 +662,7 @@ int misc_init_r(void) } } -for (i =0 ; i <MAX_SERDES ; i++) { +for (i =0 ; i <SRDS_MAX_BANK ; i++) {u32 pllcr0 = srds_regs->bank[i].pllcr0;u32 expected = pllcr0 &SRDS_PLLCR0_RFCK_SEL_MASK ;if (expected != actual[i]) {
RFC PATCH 1/1 Fix bug in T4240QDS code. Don't access nonexistent registers
Shaohui,
Never mind. You sent the patch already http://patchwork.ozlabs.org/patch/364807/.
York
Quoted 44 lines · York Sun
This patch points out a bug in T4240QDS code. But the fix is not correct.
Shaohui, please take a closer look and submit a patch to fix it. I believe the code should check each Bank of each SerDes (totally 8 clocks).
Thanks Vasili for pointing out.
York
Quoted 19 lines · Vasili Galka
The code in
misc_init_r()verifies actual SERDES clocks versus expected. It supposes that the number of clocks isMAX_SERDES. However, the number of pllcr0 registers is onlySRDS_MAX_BANK. This clearly results in access to wrong memory. I don't have the datasheet to design a correct solution, but at least let's change it to access only the existing registers.Signed-off-by Vasili Galka <[email protected]>Cc York Sun <[email protected]>--- board/freescale/t4qds/t4240qds.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)board/freescale/t4qds/t4240qds.c +0
-0board/freescale/t4qds/t4240qds.c int misc_init_r(void) · line 668
Quoted 8 lines
board/freescale/t4qds/t4240qds.c +1
-1@@ -662,7 +662,7 @@ int misc_init_r(void) } } -for (i =0 ; i <MAX_SERDES ; i++) { +for (i =0 ; i <SRDS_MAX_BANK ; i++) {u32 pllcr0 = srds_regs->bank[i].pllcr0;u32 expected = pllcr0 &SRDS_PLLCR0_RFCK_SEL_MASK ;if (expected != actual[i]) {_______________________________________________
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RFC PATCH 1/1 Fix bug in T4240QDS code. Don't access nonexistent registers
In reply to York SunHi, York,
There is already a patch sent upstream to fix this bug, the state is under review.
http://patchwork.ozlabs.org/patch/364807/
Best Regards,
Shaohui Xie
Quoted 47 lines
-----Original Message-----
From: Sun York-R58495
Sent: Wednesday, July 23, 2014 5:16 AM
To: Xie Shaohui-B21989
Cc: Vasili Galka; u-boot at lists.denx.de; Zang Roy-R61911
Subject: Re: [RFC PATCH] Fix bug in T4240QDS code. Don't access nonexistent registersThis patch points out a bug in T4240QDS code. But the fix is not correct.
Shaohui, please take a closer look and submit a patch to fix it. I believe the code should check each Bank of each SerDes (totally 8 clocks).
Thanks Vasili for pointing out.
York
Quoted 28 lines · Vasili Galka
The code in
misc_init_r()verifies actual SERDES clocks versus expected. It supposes that the number of clocks isMAX_SERDES. However, the number of pllcr0 registers is onlySRDS_MAX_BANK. This clearly results in access to wrong memory. I don't have the datasheet to design a correct solution, but at least let's change it to access only the existing registers.Signed-off-by Vasili Galka <[email protected]>Cc York Sun <[email protected]>--- board/freescale/t4qds/t4240qds.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)board/freescale/t4qds/t4240qds.c +1
-1@@ -662,7 +662,7 @@ int misc_init_r(void) } } -for (i =0 ; i <MAX_SERDES ; i++) { +for (i =0 ; i <SRDS_MAX_BANK ; i++) {u32 pllcr0 = srds_regs->bank[i].pllcr0;u32 expected = pllcr0 &SRDS_PLLCR0_RFCK_SEL_MASK ;if (expected != actual[i]) {