samsung: misc: fix soc revision setting in the set_board_info()

This change fixes the bad gpio configuration for the exynos dwmmc.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Beomho Seo <[email protected]>

Cc Minkyu Kang <[email protected]>

Cc Jaehoon Chung <[email protected]>

---
 arch/arm/cpu/armv7/exynos/pinmux.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

arch/arm/cpu/armv7/exynos/pinmux.c +2 -2

index 86a0c75..b929486 100644
@@ -704,8 +704,8 @@ static int exynos4x12_mmc_config(int peripheral, int flags)
 		ext_func = S5P_GPIO_FUNC(0x3);
 		break;
 	case PERIPH_ID_SDMMC4:
-		start = EXYNOS4_GPIO_K00;
-		start_ext = EXYNOS4_GPIO_K13;
+		start = EXYNOS4X12_GPIO_K00;
+		start_ext = EXYNOS4X12_GPIO_K13;
 		func = S5P_GPIO_FUNC(0x3);
 		ext_func = S5P_GPIO_FUNC(0x4);
 		break;

dfu_alt_bootloader=u-boot raw 0x3e 0x800 mmcpart 1

This change adds new function:
- set_dfu_boot_alt(bootmode) - where bootmode is the value of Exynos ompin[5:1] masked with BOOT_MODE(x) macro.

This change is useful for devices with more than one boot device, e.g. with a separated SD and eMMC slots. Different dfu entities are required for SD and eMMC cards. The board config should define:
- CONFIG_MISC_COMMON
- CONFIG_SET_DFU_BOOT_ALT
and at least one of below alt setting:
- CONFIG_DFU_BOOT_ALT_SD, e.g: "u-boot raw 1 2048"
- CONFIG_DFU_BOOT_ALT_eMMC, e.g: "u-boot raw 0 2048 mmcpart 1"

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Piotr Wilczek <[email protected]>

Cc Minkyu Kang <[email protected]>

---
 board/samsung/common/board.c |  3 +++
 board/samsung/common/misc.c  | 23 +++++++++++++++++++++++
 include/samsung/misc.h       |  4 ++++
 3 files changed, 30 insertions(+)

board/samsung/common/board.c +3 -0

index 2970340..9a745d9 100644
@@ -323,6 +323,9 @@ int arch_early_init_r(void)
 #ifdef CONFIG_MISC_INIT_R
 int misc_init_r(void)
 {
+#ifdef CONFIG_SET_DFU_BOOT_ALT
+	set_dfu_boot_alt(bootmode);
+#endif
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 	set_board_info();
 #endif

board/samsung/common/misc.c +23 -0

index a453a82..d31583b 100644
@@ -21,6 +21,29 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_SET_DFU_BOOT_ALT
+void set_dfu_boot_alt(int bootmode)
+{
+	char *alt_bootloader = NULL;
+
+	switch (bootmode) {
+	case BOOT_SDMMC:
+#ifdef CONFIG_DFU_BOOT_ALT_SD
+		alt_bootloader = CONFIG_DFU_BOOT_ALT_SD;
+#endif
+		break;
+	default:
+#ifdef CONFIG_DFU_BOOT_ALT_EMMC
+		alt_bootloader = CONFIG_DFU_BOOT_ALT_EMMC;
+#endif
+		break;
+	}
+
+	if (alt_bootloader)
+		setenv("dfu_alt_bootloader", alt_bootloader);
+}
+#endif
+
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 void set_board_info(void)
 {

include/samsung/misc.h +4 -0

index 87b53ec..dfc0946 100644
@@ -33,4 +33,8 @@ void draw_logo(void);
 #define BOOT_MODE_SHIFT	(0x1)
 #define BOOT_MODE(x)	((x >> BOOT_MODE_SHIFT) & BOOT_MODE_MASK)
 
+#ifdef CONFIG_SET_DFU_BOOT_ALT
+void set_dfu_boot_alt(int bootmode);
+#endif
+
 #endif /* __SAMSUNG_MISC_COMMON_H__ */

Signature · 1 line

1.9.1

Hi Przemyslaw,

I have a question.

"dfu_alt_bootloader" env is settings successfully

Quoted 1 line

dfu_alt_bootloader=u-boot raw 0x3e 0x800 mmcpart 1

But,
In order to replace bootloader binary in thor mode, How can I use the "dfu_alt_bootloader" env?

DFU gadget use "dfu_alt_info" env for DFU entities configuration.

Is there any patch to support multiple "dfu_alt" environment, or "dfu_alt_info" environment settings to use "dfu_alt_bootloader" env?

best regards,
Inha Song.

This board file supports standard features of Odroid X2 and U3 boards:
- Exynos4412 core clock set to 1000MHz and MPLL peripherial clock set to 800MHz,
- MAX77686 power regulator,
- USB PHY,
- enable XCL205 - power for board peripherials
- check board type: U3 or X2.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Minkyu Kang <[email protected]>

Cc Tom Rini <[email protected]>

---
 board/samsung/odroid/Makefile |   8 +
 board/samsung/odroid/odroid.c | 432 ++++++++++++++++++++++++++++++++++++++++++
 board/samsung/odroid/setup.h  | 227 ++++++++++++++++++++++
 3 files changed, 667 insertions(+)
 create mode 100644 board/samsung/odroid/Makefile
 create mode 100644 board/samsung/odroid/odroid.c
 create mode 100644 board/samsung/odroid/setup.h

board/samsung/odroid/Makefile new file +8 -0

new file mode 100644
index 0000000..b98aaeb
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2014 Samsung Electronics Co., Ltd. All rights reserved.
+# Przemyslaw Marczak <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= odroid.o

board/samsung/odroid/odroid.c new file +432 -0

new file mode 100644
index 0000000..20a41b2
@@ -0,0 +1,432 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics
+ * Przemyslaw Marczak <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/power.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
+#include <asm/arch/cpu.h>
+#include <power/pmic.h>
+#include <power/max77686_pmic.h>
+#include <errno.h>
+#include <usb.h>
+#include <usb/s3c_udc.h>
+#include "setup.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Odroid board types */
+enum {
+	ODROID_TYPE_U3,
+	ODROID_TYPE_X2,
+};
+
+static void set_board_type(void)
+{
+	int val;
+
+	/* Check GPC1 pin 2 */
+	gpio_set_pull(EXYNOS4X12_GPIO_C12, S5P_GPIO_PULL_NONE);
+	gpio_set_drv(EXYNOS4X12_GPIO_C12, S5P_GPIO_DRV_4X);
+	gpio_direction_input(EXYNOS4X12_GPIO_C12);
+
+	/* XCL205 - needs some latch time */
+	mdelay(10);
+
+	/* Check GPC1 pin2 - LED supplied by XCL205 - X2 only */
+	val = gpio_get_value(EXYNOS4X12_GPIO_C12);
+	if (val)
+		gd->board_type = ODROID_TYPE_X2;
+	else
+		gd->board_type = ODROID_TYPE_U3;
+}
+
+const char *get_board_type(void)
+{
+	const char *board_type_str[] = {"U3", "X2"};
+
+	set_board_type();
+
+	return board_type_str[gd->board_type];
+}
+
+const char *get_board_type_fdt(void)
+{
+	const char *board_type_fdt[] = {"u3", "x2"};
+
+	return board_type_fdt[gd->board_type];
+}
+
+static void board_clock_init(void)
+{
+	unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc;
+	struct exynos4x12_clock *clk = (struct exynos4x12_clock *)
+						samsung_get_base_clock();
+
+	/*
+	 * CMU_CPU clocks src to MPLL
+	 * Bit values:                 0  ; 1
+	 * MUX_APLL_SEL:        FIN_PLL   ; FOUT_APLL
+	 * MUX_CORE_SEL:        MOUT_APLL ; SCLK_MPLL
+	 * MUX_HPM_SEL:         MOUT_APLL ; SCLK_MPLL_USER_C
+	 * MUX_MPLL_USER_SEL_C: FIN_PLL   ; SCLK_MPLL
+	*/
+	clr_src_cpu = MUX_APLL_SEL(0x1) | MUX_CORE_SEL(0x1) |
+		      MUX_HPM_SEL(0x1) | MUX_MPLL_USER_SEL_C(0x1);
+	set = MUX_APLL_SEL(0) | MUX_CORE_SEL(1) | MUX_HPM_SEL(1) |
+	      MUX_MPLL_USER_SEL_C(1);
+
+	clrsetbits_le32(&clk->src_cpu, clr_src_cpu, set);
+
+	/* Wait for mux change */
+	while (readl(&clk->mux_stat_cpu) & MUX_STAT_CPU_CHANGING)
+		continue;
+
+	/* Set APLL to 1000MHz */
+	clr_pll_con0 = SDIV(0x7) | PDIV(0x3f) | MDIV(0x3ff) | FSEL(0x1);
+	set = SDIV(0) | PDIV(3) | MDIV(125) | FSEL(1);
+
+	clrsetbits_le32(&clk->apll_con0, clr_pll_con0, set);
+
+	/* Wait for PLL to be locked */
+	while (!(readl(&clk->apll_con0) & PLL_LOCKED_BIT))
+		continue;
+
+	/* Set CMU_CPU clocks src to APLL */
+	set = MUX_APLL_SEL(1) | MUX_CORE_SEL(0) | MUX_HPM_SEL(0) |
+	      MUX_MPLL_USER_SEL_C(1);
+	clrsetbits_le32(&clk->src_cpu, clr_src_cpu, set);
+
+	/* Wait for mux change */
+	while (readl(&clk->mux_stat_cpu) & MUX_STAT_CPU_CHANGING)
+		continue;
+
+	set = CORE_RATIO(0) | COREM0_RATIO(2) | COREM1_RATIO(5) |
+	      PERIPH_RATIO(0) | ATB_RATIO(4) | PCLK_DBG_RATIO(1) |
+	      APLL_RATIO(0) | CORE2_RATIO(0);
+	/*
+	 * Set dividers for MOUTcore = 1000 MHz
+	 * coreout =      MOUT / (ratio + 1) = 1000 MHz (0)
+	 * corem0 =     armclk / (ratio + 1) = 333 MHz (2)
+	 * corem1 =     armclk / (ratio + 1) = 166 MHz (5)
+	 * periph =     armclk / (ratio + 1) = 1000 MHz (0)
+	 * atbout =       MOUT / (ratio + 1) = 200 MHz (4)
+	 * pclkdbgout = atbout / (ratio + 1) = 100 MHz (1)
+	 * sclkapll = MOUTapll / (ratio + 1) = 1000 MHz (0)
+	 * core2out = core_out / (ratio + 1) = 1000 MHz (0) (armclk)
+	*/
+	clr = CORE_RATIO(0x7) | COREM0_RATIO(0x7) | COREM1_RATIO(0x7) |
+	      PERIPH_RATIO(0x7) | ATB_RATIO(0x7) | PCLK_DBG_RATIO(0x7) |
+	      APLL_RATIO(0x7) | CORE2_RATIO(0x7);
+
+	clrsetbits_le32(&clk->div_cpu0, clr, set);
+
+	/* Wait for divider ready status */
+	while (readl(&clk->div_stat_cpu0) & DIV_STAT_CPU0_CHANGING)
+		continue;
+
+	/*
+	 * For MOUThpm = 1000 MHz (MOUTapll)
+	 * doutcopy = MOUThpm / (ratio + 1) = 200 (4)
+	 * sclkhpm = doutcopy / (ratio + 1) = 200 (4)
+	 * cores_out = armclk / (ratio + 1) = 1000 (0)
+	 */
+	clr = COPY_RATIO(0x7) | HPM_RATIO(0x7) | CORES_RATIO(0x7);
+	set = COPY_RATIO(4) | HPM_RATIO(4) | CORES_RATIO(0);
+
+	clrsetbits_le32(&clk->div_cpu1, clr, set);
+
+	/* Wait for divider ready status */
+	while (readl(&clk->div_stat_cpu1) & DIV_STAT_CPU1_CHANGING)
+		continue;
+
+	/*
+	 * Set CMU_DMC clocks src to APLL
+	 * Bit values:             0  ; 1
+	 * MUX_C2C_SEL:      SCLKMPLL ; SCLKAPLL
+	 * MUX_DMC_BUS_SEL:  SCLKMPLL ; SCLKAPLL
+	 * MUX_DPHY_SEL:     SCLKMPLL ; SCLKAPLL
+	 * MUX_MPLL_SEL:     FINPLL   ; MOUT_MPLL_FOUT
+	 * MUX_PWI_SEL:      0110 (MPLL); 0111 (EPLL); 1000 (VPLL); 0(XXTI)
+	 * MUX_G2D_ACP0_SEL: SCLKMPLL ; SCLKAPLL
+	 * MUX_G2D_ACP1_SEL: SCLKEPLL ; SCLKVPLL
+	 * MUX_G2D_ACP_SEL:  OUT_ACP0 ; OUT_ACP1
+	*/
+	clr_src_dmc = MUX_C2C_SEL(0x1) | MUX_DMC_BUS_SEL(0x1) |
+		      MUX_DPHY_SEL(0x1) | MUX_MPLL_SEL(0x1) |
+		      MUX_PWI_SEL(0xf) | MUX_G2D_ACP0_SEL(0x1) |
+		      MUX_G2D_ACP1_SEL(0x1) | MUX_G2D_ACP_SEL(0x1);
+	set = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | MUX_DPHY_SEL(1) |
+	      MUX_MPLL_SEL(0) | MUX_PWI_SEL(0) | MUX_G2D_ACP0_SEL(1) |
+	      MUX_G2D_ACP1_SEL(1) | MUX_G2D_ACP_SEL(1);
+
+	clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set);
+
+	/* Wait for mux change */
+	while (readl(&clk->mux_stat_dmc) & MUX_STAT_DMC_CHANGING)
+		continue;
+
+	/* Set MPLL to 800MHz */
+	set = SDIV(0) | PDIV(3) | MDIV(100) | FSEL(0) | PLL_ENABLE(1);
+
+	clrsetbits_le32(&clk->mpll_con0, clr_pll_con0, set);
+
+	/* Wait for PLL to be locked */
+	while (!(readl(&clk->mpll_con0) & PLL_LOCKED_BIT))
+		continue;
+
+	/* Switch back CMU_DMC mux */
+	set = MUX_C2C_SEL(0) | MUX_DMC_BUS_SEL(0) | MUX_DPHY_SEL(0) |
+	      MUX_MPLL_SEL(1) | MUX_PWI_SEL(8) | MUX_G2D_ACP0_SEL(0) |
+	      MUX_G2D_ACP1_SEL(0) | MUX_G2D_ACP_SEL(0);
+
+	clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set);
+
+	/* Wait for mux change */
+	while (readl(&clk->mux_stat_dmc) & MUX_STAT_DMC_CHANGING)
+		continue;
+
+	/* CLK_DIV_DMC0 */
+	clr = ACP_RATIO(0x7) | ACP_PCLK_RATIO(0x7) | DPHY_RATIO(0x7) |
+	      DMC_RATIO(0x7) | DMCD_RATIO(0x7) | DMCP_RATIO(0x7);
+	/*
+	 * For:
+	 * MOUTdmc = 800 MHz
+	 * MOUTdphy = 800 MHz
+	 *
+	 * aclk_acp = MOUTdmc / (ratio + 1) = 200 (3)
+	 * pclk_acp = aclk_acp / (ratio + 1) = 100 (1)
+	 * sclk_dphy = MOUTdphy / (ratio + 1) = 400 (1)
+	 * sclk_dmc = MOUTdmc / (ratio + 1) = 400 (1)
+	 * aclk_dmcd = sclk_dmc / (ratio + 1) = 200 (1)
+	 * aclk_dmcp = aclk_dmcd / (ratio + 1) = 100 (1)
+	 */
+	set = ACP_RATIO(3) | ACP_PCLK_RATIO(1) | DPHY_RATIO(1) |
+	      DMC_RATIO(1) | DMCD_RATIO(1) | DMCP_RATIO(1);
+
+	clrsetbits_le32(&clk->div_dmc0, clr, set);
+
+	/* Wait for divider ready status */
+	while (readl(&clk->div_stat_dmc0) & DIV_STAT_DMC0_CHANGING)
+		continue;
+
+	/* CLK_DIV_DMC1 */
+	clr = G2D_ACP_RATIO(0xf) | C2C_RATIO(0x7) | PWI_RATIO(0xf) |
+	      C2C_ACLK_RATIO(0x7) | DVSEM_RATIO(0x7f) | DPM_RATIO(0x7f);
+	/*
+	 * For:
+	 * MOUTg2d = 800 MHz
+	 * MOUTc2c = 800 Mhz
+	 * MOUTpwi = 108 MHz
+	 *
+	 * sclk_g2d_acp = MOUTg2d / (ratio + 1) = 400 (1)
+	 * sclk_c2c = MOUTc2c / (ratio + 1) = 400 (1)
+	 * aclk_c2c = sclk_c2c / (ratio + 1) = 200 (1)
+	 * sclk_pwi = MOUTpwi / (ratio + 1) = 18 (5)
+	 */
+	set = G2D_ACP_RATIO(1) | C2C_RATIO(1) | PWI_RATIO(5) |
+	      C2C_ACLK_RATIO(1) | DVSEM_RATIO(1) | DPM_RATIO(1);
+
+	clrsetbits_le32(&clk->div_dmc1, clr, set);
+
+	/* Wait for divider ready status */
+	while (readl(&clk->div_stat_dmc1) & DIV_STAT_DMC1_CHANGING)
+		continue;
+
+	/* CLK_SRC_PERIL0 */
+	clr = UART0_SEL(0xf) | UART1_SEL(0xf) | UART2_SEL(0xf) |
+	      UART3_SEL(0xf) | UART4_SEL(0xf);
+	/*
+	 * Set CLK_SRC_PERIL0 clocks src to MPLL
+	 * src values: 0(XXTI); 1(XusbXTI); 2(SCLK_HDMI24M); 3(SCLK_USBPHY0);
+	 *             5(SCLK_HDMIPHY); 6(SCLK_MPLL_USER_T); 7(SCLK_EPLL);
+	 *             8(SCLK_VPLL)
+	 *
+	 * Set all to SCLK_MPLL_USER_T
+	 */
+	set = UART0_SEL(6) | UART1_SEL(6) | UART2_SEL(6) | UART3_SEL(6) |
+	      UART4_SEL(6);
+
+	clrsetbits_le32(&clk->src_peril0, clr, set);
+
+	/* CLK_DIV_PERIL0 */
+	clr = UART0_RATIO(0xf) | UART1_RATIO(0xf) | UART2_RATIO(0xf) |
+	      UART3_RATIO(0xf) | UART4_RATIO(0xf);
+	/*
+	 * For MOUTuart0-4: 800MHz
+	 *
+	 * SCLK_UARTx = MOUTuartX / (ratio + 1) = 100 (7)
+	*/
+	set = UART0_RATIO(7) | UART1_RATIO(7) | UART2_RATIO(7) |
+	      UART3_RATIO(7) | UART4_RATIO(7);
+
+	clrsetbits_le32(&clk->div_peril0, clr, set);
+
+	while (readl(&clk->div_stat_peril0) & DIV_STAT_PERIL0_CHANGING)
+		continue;
+
+	/* CLK_DIV_FSYS1 */
+	clr = MMC0_RATIO(0xf) | MMC0_PRE_RATIO(0xff) | MMC1_RATIO(0xf) |
+	      MMC1_PRE_RATIO(0xff);
+	/*
+	 * For MOUTmmc0-3 = 800 MHz (MPLL)
+	 *
+	 * DOUTmmc1 = MOUTmmc1 / (ratio + 1) = 100 (7)
+	 * sclk_mmc1 = DOUTmmc1 / (ratio + 1) = 50 (1)
+	 * DOUTmmc0 = MOUTmmc0 / (ratio + 1) = 100 (7)
+	 * sclk_mmc0 = DOUTmmc0 / (ratio + 1) = 50 (1)
+	*/
+	set = MMC0_RATIO(7) | MMC0_PRE_RATIO(1) | MMC1_RATIO(7) |
+	      MMC1_PRE_RATIO(1);
+
+	clrsetbits_le32(&clk->div_fsys1, clr, set);
+
+	/* Wait for divider ready status */
+	while (readl(&clk->div_stat_fsys1) & DIV_STAT_FSYS1_CHANGING)
+		continue;
+
+	/* CLK_DIV_FSYS2 */
+	clr = MMC2_RATIO(0xf) | MMC2_PRE_RATIO(0xff) | MMC3_RATIO(0xf) |
+	      MMC3_PRE_RATIO(0xff);
+	/*
+	 * For MOUTmmc0-3 = 800 MHz (MPLL)
+	 *
+	 * DOUTmmc3 = MOUTmmc3 / (ratio + 1) = 100 (7)
+	 * sclk_mmc3 = DOUTmmc3 / (ratio + 1) = 50 (1)
+	 * DOUTmmc2 = MOUTmmc2 / (ratio + 1) = 100 (7)
+	 * sclk_mmc2 = DOUTmmc2 / (ratio + 1) = 50 (1)
+	*/
+	set = MMC2_RATIO(7) | MMC2_PRE_RATIO(1) | MMC3_RATIO(7) |
+	      MMC3_PRE_RATIO(1);
+
+	clrsetbits_le32(&clk->div_fsys2, clr, set);
+
+	/* Wait for divider ready status */
+	while (readl(&clk->div_stat_fsys2) & DIV_STAT_FSYS2_CHANGING)
+		continue;
+
+	/* CLK_DIV_FSYS3 */
+	clr = MMC4_RATIO(0xf) | MMC4_PRE_RATIO(0xff);
+	/*
+	 * For MOUTmmc4 = 800 MHz (MPLL)
+	 *
+	 * DOUTmmc4 = MOUTmmc4 / (ratio + 1) = 100 (7)
+	 * sclk_mmc4 = DOUTmmc4 / (ratio + 1) = 100 (0)
+	*/
+	set = MMC4_RATIO(7) | MMC4_PRE_RATIO(0);
+
+	clrsetbits_le32(&clk->div_fsys3, clr, set);
+
+	/* Wait for divider ready status */
+	while (readl(&clk->div_stat_fsys3) & DIV_STAT_FSYS3_CHANGING)
+		continue;
+
+	return;
+}
+
+static void board_gpio_init(void)
+{
+	/* Set GPA1 pin 1 to HI - enable XCL205 output */
+	gpio_set_pull(EXYNOS4X12_GPIO_A11, S5P_GPIO_PULL_UP);
+	gpio_set_drv(EXYNOS4X12_GPIO_A11, S5P_GPIO_DRV_4X);
+	gpio_direction_output(EXYNOS4X12_GPIO_A11, 1);
+
+	gpio_cfg_pin(EXYNOS4X12_GPIO_K12, S5P_GPIO_FUNC(0x1));
+	gpio_set_pull(EXYNOS4X12_GPIO_K12, S5P_GPIO_PULL_NONE);
+	gpio_set_drv(EXYNOS4X12_GPIO_K12, S5P_GPIO_DRV_4X);
+}
+
+static int pmic_init_max77686(void)
+{
+	struct pmic *p = pmic_get("MAX77686_PMIC");
+
+	if (pmic_probe(p))
+		return -ENODEV;
+
+	/* Set LDO Voltage */
+	max77686_set_ldo_voltage(p, 20, 1800000);	/* LDO20 eMMC */
+	max77686_set_ldo_voltage(p, 21, 2800000);	/* LDO21 SD */
+	max77686_set_ldo_voltage(p, 22, 2800000);	/* LDO22 eMMC */
+
+	return 0;
+}
+
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+static void board_init_i2c(void)
+{
+	/* I2C_0 */
+	if (exynos_pinmux_config(PERIPH_ID_I2C0, PINMUX_FLAG_NONE))
+		debug("I2C%d not configured\n", (I2C_0));
+}
+#endif
+
+int exynos_early_init_f(void)
+{
+	board_clock_init();
+	board_gpio_init();
+
+	return 0;
+}
+
+int exynos_init(void)
+{
+	return 0;
+}
+
+int exynos_power_init(void)
+{
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+	board_init_i2c();
+#endif
+	pmic_init(I2C_0);
+	pmic_init_max77686();
+
+	return 0;
+}
+
+#ifdef CONFIG_USB_GADGET
+static int s5pc210_phy_control(int on)
+{
+	struct pmic *p_pmic;
+
+	p_pmic = pmic_get("MAX77686_PMIC");
+	if (!p_pmic)
+		return -ENODEV;
+
+	if (pmic_probe(p_pmic))
+		return -1;
+
+	if (on)
+		return max77686_set_ldo_mode(p_pmic, 12, OPMODE_ON);
+	else
+		return max77686_set_ldo_mode(p_pmic, 12, OPMODE_LPM);
+}
+
+struct s3c_plat_otg_data s5pc210_otg_data = {
+	.phy_control	= s5pc210_phy_control,
+	.regs_phy	= EXYNOS4X12_USBPHY_BASE,
+	.regs_otg	= EXYNOS4X12_USBOTG_BASE,
+	.usb_phy_ctrl	= EXYNOS4X12_USBPHY_CONTROL,
+	.usb_flags	= PHY0_SLEEP,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	debug("USB_udc_probe\n");
+	return s3c_udc_probe(&s5pc210_otg_data);
+}
+#endif
+
+void reset_misc(void)
+{
+	/* Reset eMMC*/
+	gpio_set_value(EXYNOS4X12_GPIO_K12, 0);
+	mdelay(10);
+	gpio_set_value(EXYNOS4X12_GPIO_K12, 1);
+}

board/samsung/odroid/setup.h new file +227 -0

new file mode 100644
index 0000000..982d676
@@ -0,0 +1,227 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics
+ * Przemyslaw Marczak <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ODROIDU3_SETUP__
+#define __ODROIDU3_SETUP__
+
+/* A/M PLL_CON0 */
+#define SDIV(x)                 (x & 0x7)
+#define PDIV(x)                 ((x & 0x3f) << 8)
+#define MDIV(x)                 ((x & 0x3ff) << 16)
+#define FSEL(x)                 ((x & 0x1) << 27)
+#define PLL_LOCKED_BIT          (0x1 << 29)
+#define PLL_ENABLE(x)           ((x & 0x1) << 31)
+
+/* CLK_SRC_CPU */
+#define MUX_APLL_SEL(x)         (x & 0x1)
+#define MUX_CORE_SEL(x)         ((x & 0x1) << 16)
+#define MUX_HPM_SEL(x)          ((x & 0x1) << 20)
+#define MUX_MPLL_USER_SEL_C(x)  ((x & 0x1) << 24)
+
+#define MUX_STAT_CHANGING       0x100
+
+/* CLK_MUX_STAT_CPU */
+#define APLL_SEL(x)             (x & 0x7)
+#define CORE_SEL(x)             ((x & 0x7) << 16)
+#define HPM_SEL(x)              ((x & 0x7) << 20)
+#define MPLL_USER_SEL_C(x)      ((x & 0x7) << 24)
+#define MUX_STAT_CPU_CHANGING   (APLL_SEL(MUX_STAT_CHANGING) | \
+				CORE_SEL(MUX_STAT_CHANGING) | \
+				HPM_SEL(MUX_STAT_CHANGING) | \
+				MPLL_USER_SEL_C(MUX_STAT_CHANGING))
+
+/* CLK_DIV_CPU0 */
+#define CORE_RATIO(x)           (x & 0x7)
+#define COREM0_RATIO(x)         ((x & 0x7) << 4)
+#define COREM1_RATIO(x)         ((x & 0x7) << 8)
+#define PERIPH_RATIO(x)         ((x & 0x7) << 12)
+#define ATB_RATIO(x)            ((x & 0x7) << 16)
+#define PCLK_DBG_RATIO(x)       ((x & 0x7) << 20)
+#define APLL_RATIO(x)           ((x & 0x7) << 24)
+#define CORE2_RATIO(x)          ((x & 0x7) << 28)
+
+/* CLK_DIV_STAT_CPU0 */
+#define DIV_CORE(x)             (x & 0x1)
+#define DIV_COREM0(x)           ((x & 0x1) << 4)
+#define DIV_COREM1(x)           ((x & 0x1) << 8)
+#define DIV_PERIPH(x)           ((x & 0x1) << 12)
+#define DIV_ATB(x)              ((x & 0x1) << 16)
+#define DIV_PCLK_DBG(x)         ((x & 0x1) << 20)
+#define DIV_APLL(x)             ((x & 0x1) << 24)
+#define DIV_CORE2(x)            ((x & 0x1) << 28)
+
+#define DIV_STAT_CHANGING       0x1
+#define DIV_STAT_CPU0_CHANGING  (DIV_CORE(DIV_STAT_CHANGING) | \
+				DIV_COREM0(DIV_STAT_CHANGING) | \
+				DIV_COREM1(DIV_STAT_CHANGING) | \
+				DIV_PERIPH(DIV_STAT_CHANGING) | \
+				DIV_ATB(DIV_STAT_CHANGING) | \
+				DIV_PCLK_DBG(DIV_STAT_CHANGING) | \
+				DIV_APLL(DIV_STAT_CHANGING) | \
+				DIV_CORE2(DIV_STAT_CHANGING))
+
+/* CLK_DIV_CPU1 */
+#define COPY_RATIO(x)           (x & 0x7)
+#define HPM_RATIO(x)            ((x & 0x7) << 4)
+#define CORES_RATIO(x)          ((x & 0x7) << 8)
+
+/* CLK_DIV_STAT_CPU1 */
+#define DIV_COPY(x)             (x & 0x7)
+#define DIV_HPM(x)              ((x & 0x1) << 4)
+#define DIV_CORES(x)            ((x & 0x1) << 8)
+
+#define DIV_STAT_CPU1_CHANGING	(DIV_COPY(DIV_STAT_CHANGING) | \
+				DIV_HPM(DIV_STAT_CHANGING) | \
+				DIV_CORES(DIV_STAT_CHANGING))
+
+/* CLK_SRC_DMC */
+#define MUX_C2C_SEL(x)		(x & 0x1)
+#define MUX_DMC_BUS_SEL(x)	((x & 0x1) << 4)
+#define MUX_DPHY_SEL(x)		((x & 0x1) << 8)
+#define MUX_MPLL_SEL(x)		((x & 0x1) << 12)
+#define MUX_PWI_SEL(x)		((x & 0xf) << 16)
+#define MUX_G2D_ACP0_SEL(x)	((x & 0x1) << 20)
+#define MUX_G2D_ACP1_SEL(x)	((x & 0x1) << 24)
+#define MUX_G2D_ACP_SEL(x)	((x & 0x1) << 28)
+
+/* CLK_MUX_STAT_DMC */
+#define C2C_SEL(x)		((x) & 0x7)
+#define DMC_BUS_SEL(x)		((x & 0x7) << 4)
+#define DPHY_SEL(x)		((x & 0x7) << 8)
+#define MPLL_SEL(x)		((x & 0x7) << 12)
+/* #define PWI_SEL(x)		((x & 0xf) << 16)  - Reserved */
+#define G2D_ACP0_SEL(x)		((x & 0x7) << 20)
+#define G2D_ACP1_SEL(x)		((x & 0x7) << 24)
+#define G2D_ACP_SEL(x)		((x & 0x7) << 28)
+
+#define MUX_STAT_DMC_CHANGING	(C2C_SEL(MUX_STAT_CHANGING) | \
+				DMC_BUS_SEL(MUX_STAT_CHANGING) | \
+				DPHY_SEL(MUX_STAT_CHANGING) | \
+				MPLL_SEL(MUX_STAT_CHANGING) |\
+				G2D_ACP0_SEL(MUX_STAT_CHANGING) | \
+				G2D_ACP1_SEL(MUX_STAT_CHANGING) | \
+				G2D_ACP_SEL(MUX_STAT_CHANGING))
+
+/* CLK_DIV_DMC0 */
+#define ACP_RATIO(x)		(x & 0x7)
+#define ACP_PCLK_RATIO(x)	((x & 0x7) << 4)
+#define DPHY_RATIO(x)		((x & 0x7) << 8)
+#define DMC_RATIO(x)		((x & 0x7) << 12)
+#define DMCD_RATIO(x)		((x & 0x7) << 16)
+#define DMCP_RATIO(x)		((x & 0x7) << 20)
+
+/* CLK_DIV_STAT_DMC0 */
+#define DIV_ACP(x)		(x & 0x1)
+#define DIV_ACP_PCLK(x)		((x & 0x1) << 4)
+#define DIV_DPHY(x)		((x & 0x1) << 8)
+#define DIV_DMC(x)		((x & 0x1) << 12)
+#define DIV_DMCD(x)		((x & 0x1) << 16)
+#define DIV_DMCP(x)		((x & 0x1) << 20)
+
+#define DIV_STAT_DMC0_CHANGING	(DIV_ACP(DIV_STAT_CHANGING) | \
+				DIV_ACP_PCLK(DIV_STAT_CHANGING) | \
+				DIV_DPHY(DIV_STAT_CHANGING) | \
+				DIV_DMC(DIV_STAT_CHANGING) | \
+				DIV_DMCD(DIV_STAT_CHANGING) | \
+				DIV_DMCP(DIV_STAT_CHANGING))
+
+/* CLK_DIV_DMC1 */
+#define G2D_ACP_RATIO(x)	(x & 0xf)
+#define C2C_RATIO(x)		((x & 0x7) << 4)
+#define PWI_RATIO(x)		((x & 0xf) << 8)
+#define C2C_ACLK_RATIO(x)	((x & 0x7) << 12)
+#define DVSEM_RATIO(x)		((x & 0x7f) << 16)
+#define DPM_RATIO(x)		((x & 0x7f) << 24)
+
+/* CLK_DIV_STAT_DMC1 */
+#define DIV_G2D_ACP(x)		(x & 0x1)
+#define DIV_C2C(x)		((x & 0x1) << 4)
+#define DIV_PWI(x)		((x & 0x1) << 8)
+#define DIV_C2C_ACLK(x)		((x & 0x1) << 12)
+#define DIV_DVSEM(x)		((x & 0x1) << 16)
+#define DIV_DPM(x)		((x & 0x1) << 24)
+
+#define DIV_STAT_DMC1_CHANGING	(DIV_G2D_ACP(DIV_STAT_CHANGING) | \
+				DIV_C2C(DIV_STAT_CHANGING) | \
+				DIV_PWI(DIV_STAT_CHANGING) | \
+				DIV_C2C_ACLK(DIV_STAT_CHANGING) | \
+				DIV_DVSEM(DIV_STAT_CHANGING) | \
+				DIV_DPM(DIV_STAT_CHANGING))
+
+/* Set CLK_SRC_PERIL0 */
+#define UART4_SEL(x)		((x & 0xf) << 16)
+#define UART3_SEL(x)		((x & 0xf) << 12)
+#define UART2_SEL(x)		((x & 0xf) << 8)
+#define UART1_SEL(x)		((x & 0xf) << 4)
+#define UART0_SEL(x)		((x) & 0xf)
+
+/* Set CLK_DIV_PERIL0 */
+#define UART4_RATIO(x)		((x & 0xf) << 16)
+#define UART3_RATIO(x)		((x & 0xf) << 12)
+#define UART2_RATIO(x)		((x & 0xf) << 8)
+#define UART1_RATIO(x)		((x & 0xf) << 4)
+#define UART0_RATIO(x)		((x) & 0xf)
+
+/* Set CLK_DIV_STAT_PERIL0 */
+#define DIV_UART4(x)		((x & 0x1) << 16)
+#define DIV_UART3(x)		((x & 0x1) << 12)
+#define DIV_UART2(x)		((x & 0x1) << 8)
+#define DIV_UART1(x)		((x & 0x1) << 4)
+#define DIV_UART0(x)		((x) & 0x1)
+
+#define DIV_STAT_PERIL0_CHANGING	(DIV_UART4(DIV_STAT_CHANGING) | \
+					DIV_UART3(DIV_STAT_CHANGING) | \
+					DIV_UART2(DIV_STAT_CHANGING) | \
+					DIV_UART1(DIV_STAT_CHANGING) | \
+					DIV_UART0(DIV_STAT_CHANGING))
+
+/* CLK_DIV_FSYS1 */
+#define MMC0_RATIO(x)		((x) & 0xf)
+#define MMC0_PRE_RATIO(x)	((x & 0xff) << 8)
+#define MMC1_RATIO(x)		((x & 0xf) << 16)
+#define MMC1_PRE_RATIO(x)	((x & 0xff) << 24)
+
+/* CLK_DIV_STAT_FSYS1 */
+#define DIV_MMC0(x)		((x) & 1)
+#define DIV_MMC0_PRE(x)		((x & 1) << 8)
+#define DIV_MMC1(x)		((x & 1) << 16)
+#define DIV_MMC1_PRE(x)		((x & 1) << 24)
+
+#define DIV_STAT_FSYS1_CHANGING		(DIV_MMC0(DIV_STAT_CHANGING) | \
+					DIV_MMC0_PRE(DIV_STAT_CHANGING) | \
+					DIV_MMC1(DIV_STAT_CHANGING) | \
+					DIV_MMC1_PRE(DIV_STAT_CHANGING))
+
+/* CLK_DIV_FSYS2 */
+#define MMC2_RATIO(x)		(x & 0xf)
+#define MMC2_PRE_RATIO(x)	((x & 0xff) << 8)
+#define MMC3_RATIO(x)		((x & 0xf) << 16)
+#define MMC3_PRE_RATIO(x)	((x & 0xff) << 24)
+
+/* CLK_DIV_STAT_FSYS2 */
+#define DIV_MMC2(x)		(x & 0x1)
+#define DIV_MMC2_PRE(x)		((x & 0x1) << 8)
+#define DIV_MMC3(x)		((x & 0x1) << 16)
+#define DIV_MMC3_PRE(x)		((x & 0x1) << 24)
+
+#define DIV_STAT_FSYS2_CHANGING		(DIV_MMC2(DIV_STAT_CHANGING) | \
+					DIV_MMC2_PRE(DIV_STAT_CHANGING) | \
+					DIV_MMC3(DIV_STAT_CHANGING) | \
+					DIV_MMC3_PRE(DIV_STAT_CHANGING))
+
+/* CLK_DIV_FSYS3 */
+#define MMC4_RATIO(x)		(x & 0x7)
+#define MMC4_PRE_RATIO(x)	((x & 0xff) << 8)
+
+/* CLK_DIV_STAT_FSYS3 */
+#define DIV_MMC4(x)		(x & 0x1)
+#define DIV_MMC4_PRE(x)		((x & 0x1) << 8)
+
+#define DIV_STAT_FSYS3_CHANGING		(DIV_MMC4(DIV_STAT_CHANGING) | \
+					DIV_MMC4_PRE(DIV_STAT_CHANGING))
+
+#endif /*__ODROIDU3_SETUP__ */

Signature · 1 line

1.9.1

Hi Przemyslaw,

In U3 board, cooling pan is not work.
I think, cooling pan setting is need in board_gpio_init(). (X2 board use cooling pan pwr form USB port)

best regards,
Inha Song.

It is possible to boot from a few media devices, especially using a micro SD or eMMC slots. In this situation, boot device should be registered as block device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV is usually set to "0" in the most config cases.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Piotr Wilczek <[email protected]>

Cc Minkyu Kang <[email protected]>

---
 board/samsung/common/board.c | 32 ++++++++++++++++++++++++--------
 include/samsung/misc.h       |  5 +++++
 2 files changed, 29 insertions(+), 8 deletions(-)

board/samsung/common/board.c +2 -0

index 9dc7c83..2970340 100644
@@ -25,6 +25,8 @@
 #include <lcd.h>
 #include <samsung/misc.h>
 
+static int bootmode;
+
 DECLARE_GLOBAL_DATA_PTR;
 
 int __exynos_early_init_f(void)

board/samsung/common/board.c +20 -8

+
+	bootmode = BOOT_MODE(readl(&pwr->om_stat));
+	if (bootmode == BOOT_SDMMC) {
+#ifdef CONFIG_SDHCI
+		/* mmc initializattion for available channels */
+		ret = exynos_mmc_init(gd->fdt_blob);
+#endif
 #ifdef CONFIG_DWMMC
-	/* dwmmc initializattion for available channels */
-	ret = exynos_dwmmc_init(gd->fdt_blob);
-	if (ret)
-		debug("dwmmc init failed\n");
+		/* dwmmc initializattion for available channels */
+		ret = exynos_dwmmc_init(gd->fdt_blob);
+#endif
+	} else {
+#ifdef CONFIG_DWMMC
+		/* dwmmc initializattion for available channels */
+		ret = exynos_dwmmc_init(gd->fdt_blob);
 #endif
-
 #ifdef CONFIG_SDHCI
-	/* mmc initializattion for available channels */
-	ret = exynos_mmc_init(gd->fdt_blob);
+		/* mmc initializattion for available channels */
+		ret = exynos_mmc_init(gd->fdt_blob);
+#endif
+	}
+
 	if (ret)
 		debug("mmc init failed\n");
-#endif
+
 	return ret;
 }
 #endif

include/samsung/misc.h +0 -0

index 10653a1..87b53ec 100644

Dear Przemyslaw Marczak,

Quoted 25 lines · Przemyslaw Marczak

It is possible to boot from a few media devices, especially using a micro SD or eMMC slots. In this situation, boot device should be registered as block device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV is usually set to "0" in the most config cases.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Piotr Wilczek <[email protected]>

Cc Minkyu Kang <[email protected]>

---
  board/samsung/common/board.c | 32 ++++++++++++++++++++++++--------
  include/samsung/misc.h       |  5 +++++
  2 files changed, 29 insertions(+), 8 deletions(-)

board/samsung/common/board.c +2 -0

index 9dc7c83..2970340 100644
@@ -25,6 +25,8 @@
  #include <lcd.h>
  #include <samsung/misc.h>
 
+static int bootmode;
+
  DECLARE_GLOBAL_DATA_PTR;
 

board/samsung/common/board.c int board_eth_init(bd_t *bis) · line 249

Quoted 7 lines

board/samsung/common/board.c +2 -0

  int __exynos_early_init_f(void)

@@ -243,19 +245,33 @@ int board_eth_init(bd_t *bis)
  int board_mmc_init(bd_t *bis)
  {
  	int ret;
+	struct exynos4_power *pwr = (struct exynos4_power *)
+					samsung_get_base_power();

Hm, no. This file is samsung common not only for exynos4.
Although this code will not be made any problems for other SoCs (because om_stat is always first item of power), it looks weird. I think you can make new function for getting boot mode.

Quoted 44 lines

board/samsung/common/board.c +20 -8

+
+	bootmode = BOOT_MODE(readl(&pwr->om_stat));
+	if (bootmode == BOOT_SDMMC) {
+#ifdef CONFIG_SDHCI
+		/* mmc initializattion for available channels */
+		ret = exynos_mmc_init(gd->fdt_blob);
+#endif
  #ifdef CONFIG_DWMMC
-	/* dwmmc initializattion for available channels */
-	ret = exynos_dwmmc_init(gd->fdt_blob);
-	if (ret)
-		debug("dwmmc init failed\n");
+		/* dwmmc initializattion for available channels */
+		ret = exynos_dwmmc_init(gd->fdt_blob);
+#endif
+	} else {
+#ifdef CONFIG_DWMMC
+		/* dwmmc initializattion for available channels */
+		ret = exynos_dwmmc_init(gd->fdt_blob);
  #endif
-
  #ifdef CONFIG_SDHCI
-	/* mmc initializattion for available channels */
-	ret = exynos_mmc_init(gd->fdt_blob);
+		/* mmc initializattion for available channels */
+		ret = exynos_mmc_init(gd->fdt_blob);
+#endif
+	}
+
  	if (ret)
  		debug("mmc init failed\n");
-#endif
+
  	return ret;
  }
  #endif

include/samsung/misc.h +0 -0

index 10653a1..87b53ec 100644
@@ -28,4 +28,9 @@ void check_boot_mode(void);
  void draw_logo(void);
  #endif
 

include/samsung/misc.h void check_boot_mode(void); · line 34

Quoted 4 lines

include/samsung/misc.h +4 -0

+#define BOOT_SDMMC	0x2
+#define BOOT_MODE_MASK	(0x1f)
+#define BOOT_MODE_SHIFT	(0x1)
+#define BOOT_MODE(x)	((x >> BOOT_MODE_SHIFT) & BOOT_MODE_MASK)

((x) >> BOOT_MODE_SHIFT)

include/samsung/misc.h void check_boot_mode(void); · line 36

Quoted 3 lines

include/samsung/misc.h +1 -0

+
  #endif /* __SAMSUNG_MISC_COMMON_H__ */

Thanks,
Minkyu Kang.

Hello Minkyu,

Quoted 28 lines · Minkyu Kang

Dear Przemyslaw Marczak,

Quoted 25 lines · Przemyslaw Marczak

It is possible to boot from a few media devices, especially using a micro SD or eMMC slots. In this situation, boot device should be registered as block device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV is usually set to "0" in the most config cases.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Piotr Wilczek <[email protected]>

Cc Minkyu Kang <[email protected]>

---
  board/samsung/common/board.c | 32 ++++++++++++++++++++++++--------
  include/samsung/misc.h       |  5 +++++
  2 files changed, 29 insertions(+), 8 deletions(-)

board/samsung/common/board.c +2 -0

index 9dc7c83..2970340 100644
@@ -25,6 +25,8 @@
  #include <lcd.h>
  #include <samsung/misc.h>
 
+static int bootmode;
+
  DECLARE_GLOBAL_DATA_PTR;
 

Quoted 12 lines

board/samsung/common/board.c int board_eth_init(bd_t *bis) · line 249

Quoted 7 lines

board/samsung/common/board.c +2 -0

  int __exynos_early_init_f(void)

@@ -243,19 +245,33 @@ int board_eth_init(bd_t *bis)
  int board_mmc_init(bd_t *bis)
  {
      int ret;
+    struct exynos4_power *pwr = (struct exynos4_power *)
+                    samsung_get_base_power();

Hm, no. This file is samsung common not only for exynos4.
Although this code will not be made any problems for other SoCs (because om_stat is always first item of power), it looks weird. I think you can make new function for getting boot mode.

Yes, this was bad. What about that:

# unsigned int om_stat = samsung_get_base_power();
#
# bootmode = BOOT_MODE(readl(om_stat));

or maybe just

# bootmode = BOOT_MODE(readl(samsung_get_base_power()));

This patch introduces new feature: initialization of the dfu bootloader entity from a separate environmental variable which can be set on a boot time.

By default, DFU always check environmental variable: $dfu_alt_info.

Changes:
- DFU will also look for environmental variable: $dfu_alt_bootloader
- if any of dfu_alt_* variable is properly defined, then function dfu_init_env_entities() will return success.

Use case:
Some devices can boot from various media type (SD, eMMC, NAND, etc.) or some board configs are common for more than one board type. In a such case, bootloader is probably placed on a different devices or even offsets. So such DFU feature is welcome.

Quoted 11 lines · Przemyslaw Marczak

This patch introduces new feature: initialization of the dfu bootloader entity from a separate environmental variable which can be set on a boot time.

By default, DFU always check environmental variable: $dfu_alt_info.

Changes:
- DFU will also look for environmental variable: $dfu_alt_bootloader
- if any of dfu_alt_* variable is properly defined, then function dfu_init_env_entities() will return success.

Quoted 5 lines

Use case:
Some devices can boot from various media type (SD, eMMC, NAND, etc.) or some board configs are common for more than one board type. In a such case, bootloader is probably placed on a different devices or even offsets. So such DFU feature is welcome.

Why should the "dfu" command look at different environment variables? Whatever code dynamically sets the value of $dfu_alt_bootloader should simply set $dfu_alt_info instead.

Hello Stephen,

Quoted 18 lines · Stephen Warren

Quoted 11 lines · Przemyslaw Marczak

This patch introduces new feature: initialization of the dfu bootloader entity from a separate environmental variable which can be set on a boot time.

By default, DFU always check environmental variable: $dfu_alt_info.

Changes:
- DFU will also look for environmental variable: $dfu_alt_bootloader
- if any of dfu_alt_* variable is properly defined, then function dfu_init_env_entities() will return success.

Quoted 5 lines

Use case:
Some devices can boot from various media type (SD, eMMC, NAND, etc.) or some board configs are common for more than one board type. In a such case, bootloader is probably placed on a different devices or even offsets. So such DFU feature is welcome.

Quoted 3 lines

Why should the "dfu" command look at different environment variables? Whatever code dynamically sets the value of $dfu_alt_bootloader should simply set $dfu_alt_info instead.

Dynamically setting of any entity cold be done at boot time, like this:

# int buf_len = strlen(alt_bootloader) + strlen(CONFIG_DFU_ALT) + 4;
# char *buf = memalign(1, buf_len);
#
# sprintf(buf, "%s; %s", alt_bootloader, CONFIG_DFU_ALT);

# setenv("dfu_alt_info", buf);

But overwriting the $dfu_alt_info on each boot is not a good idea. If user modify the dfu entities - then it will be overwritten at next boot.

Maybe better could be modification of the function dfu_init_env_entities() to support parsing variables in the $dfu_alt_info instead of hard coded env variables names, e.g:

dfu_alt_info="${alt_info_boot}, ${alt_info_system},..."

Quoted 27 lines · Przemyslaw Marczak

Hello Stephen,

Quoted 18 lines · Stephen Warren

Quoted 11 lines · Przemyslaw Marczak

This patch introduces new feature: initialization of the dfu bootloader entity from a separate environmental variable which can be set on a boot time.

By default, DFU always check environmental variable: $dfu_alt_info.

Changes:
- DFU will also look for environmental variable: $dfu_alt_bootloader
- if any of dfu_alt_* variable is properly defined, then function dfu_init_env_entities() will return success.

Quoted 5 lines

Use case:
Some devices can boot from various media type (SD, eMMC, NAND, etc.) or some board configs are common for more than one board type. In a such case, bootloader is probably placed on a different devices or even offsets. So such DFU feature is welcome.

Quoted 3 lines

Why should the "dfu" command look at different environment variables? Whatever code dynamically sets the value of $dfu_alt_bootloader should simply set $dfu_alt_info instead.

Dynamically setting of any entity cold be done at boot time, like this:

Quoted 4 lines

# int buf_len = strlen(alt_bootloader) + strlen(CONFIG_DFU_ALT) + 4;
# char *buf = memalign(1, buf_len);
#
# sprintf(buf, "%s; %s", alt_bootloader, CONFIG_DFU_ALT);

Note that you can't have a space after the ; due to the use of strsep(). Switching to strtok() might solve that.

Quoted 4 lines

# setenv("dfu_alt_info", buf);

But overwriting the $dfu_alt_info on each boot is not a good idea. If user modify the dfu entities - then it will be overwritten at next boot.

What if the user sees that $dfu_alt_bootloader is set, and modifies that without realizing that it's an auto-generated variable? The same thing then applies.

Perhaps we need a standard where system-/automatically-set variables are named with a auto_ prefix or _auto suffix or something, to make this clear?

I'd prefer that the dfu command didn't use any environment variables, but rather required the user to always pass the list on the command-line. Then, the user could invoke either:

dfu "foo mmc x..." # Manually specified
dfu $dfu_alt_info # Use 'user-defined' variable dfu $dfu_alt_bootloaer # Use 'system-defined' variable

That way, the code doesn't have to loop over a bunch of variables and get more complex. Implicitly depending on environment variables make it hard to tell what a sequence of commands will do.

...

Quoted 5 lines

Maybe better could be modification of the function dfu_init_env_entities() to support parsing variables in the $dfu_alt_info instead of hard coded env variables names, e.g:

Quoted 1 line

dfu_alt_info="${alt_info_boot}, ${alt_info_system},..."

I feel like the shell already has the capability to interpolate variable values into strings, so this would be quite easy to do in the shell rather than duplicating that code inside the dfu command.

On 06/17/2014 06:36 PM, Stephen Warren wrote:

Quoted 7 lines

I'd prefer that the dfu command didn't use any environment variables, but rather required the user to always pass the list on the command-line. Then, the user could invoke either:

dfu "foo mmc x..." # Manually specified
dfu $dfu_alt_info # Use 'user-defined' variable dfu $dfu_alt_bootloaer # Use 'system-defined' variable

Yes, definitely such feature was missing there.

So summarizing, I don't want to break your DFU rework, I want just to add the Odroid U3 support, so in the next patch set I will use the $dfu_alt_info, instead of combining with a short time solution.

Quoted 1 line · Przemyslaw Marczak

On 06/17/2014 06:36 PM, Stephen Warren wrote:

...

Quoted 9 lines

Quoted 7 lines

I'd prefer that the dfu command didn't use any environment variables, but rather required the user to always pass the list on the command-line. Then, the user could invoke either:

dfu "foo mmc x..." # Manually specified
dfu $dfu_alt_info # Use 'user-defined' variable dfu $dfu_alt_bootloaer # Use 'system-defined' variable

Yes, definitely such feature was missing there.

...

Quoted 3 lines

So summarizing, I don't want to break your DFU rework, I want just to add the Odroid U3 support, so in the next patch set I will use the $dfu_alt_info, instead of combining with a short time solution.

Which rework are you referring to? I'm not actively working on changing the command-line parameters to the dfu command in any way. I've certainly discussed how I'd prefer the dfu command to work, but I don't have time to actually implement that. So, the existing command-line format is likely to stay as it is for now.

It is possible to boot from a few media devices, especially using a micro SD or eMMC slots. In this situation depends on a boot device - some setup can be changeg.

This change adds function:
boot_device() - which returns an OM[1:5] bits value

This allows checking if boot device is SD(0x2).

Signed-off-by Przemyslaw Marczak <[email protected]>

---
Changes v3:
- new commit after separate one into two

---
 board/samsung/common/board.c | 10 +++++++++-
 include/samsung/misc.h       |  7 +++++++
 2 files changed, 16 insertions(+), 1 deletion(-)

board/samsung/common/board.c +9 -1

index 9dc7c83..ecf3f76 100644
@@ -41,6 +41,13 @@ int __exynos_power_init(void)
 int exynos_power_init(void)
 	__attribute__((weak, alias("__exynos_power_init")));
 
+unsigned int boot_device(void)
+{
+	unsigned int om_stat = samsung_get_base_power();
+
+	return BOOT_DEVICE(readl(om_stat));
+}
+
 #if defined CONFIG_EXYNOS_TMU
 /* Boot Time Thermal Analysis for SoC temperature threshold breach */
 static void boot_temp_check(void)

@@ -243,19 +250,20 @@ int board_eth_init(bd_t *bis)
 int board_mmc_init(bd_t *bis)
 {
 	int ret;
+
 #ifdef CONFIG_DWMMC
 	/* dwmmc initializattion for available channels */
 	ret = exynos_dwmmc_init(gd->fdt_blob);
 	if (ret)
 		debug("dwmmc init failed\n");
 #endif
-
 #ifdef CONFIG_SDHCI
 	/* mmc initializattion for available channels */
 	ret = exynos_mmc_init(gd->fdt_blob);
 	if (ret)
 		debug("mmc init failed\n");
 #endif
+
 	return ret;
 }
 #endif

include/samsung/misc.h +0 -0

index 10653a1..57bac7d 100644

Dear Przemyslaw Marczak,

Quoted 64 lines · Przemyslaw Marczak

It is possible to boot from a few media devices, especially using a micro SD or eMMC slots. In this situation depends on a boot device - some setup can be changeg.

This change adds function:
boot_device() - which returns an OM[1:5] bits value

This allows checking if boot device is SD(0x2).

Signed-off-by Przemyslaw Marczak <[email protected]>

---
Changes v3:
- new commit after separate one into two

---
  board/samsung/common/board.c | 10 +++++++++-
  include/samsung/misc.h       |  7 +++++++
  2 files changed, 16 insertions(+), 1 deletion(-)

board/samsung/common/board.c +9 -1

index 9dc7c83..ecf3f76 100644
@@ -41,6 +41,13 @@ int __exynos_power_init(void)
  int exynos_power_init(void)
  	__attribute__((weak, alias("__exynos_power_init")));
 
+unsigned int boot_device(void)
+{
+	unsigned int om_stat = samsung_get_base_power();
+
+	return BOOT_DEVICE(readl(om_stat));
+}
+
  #if defined CONFIG_EXYNOS_TMU
  /* Boot Time Thermal Analysis for SoC temperature threshold breach */
  static void boot_temp_check(void)

@@ -243,19 +250,20 @@ int board_eth_init(bd_t *bis)
  int board_mmc_init(bd_t *bis)
  {
  	int ret;
+
  #ifdef CONFIG_DWMMC
  	/* dwmmc initializattion for available channels */
  	ret = exynos_dwmmc_init(gd->fdt_blob);
  	if (ret)
  		debug("dwmmc init failed\n");
  #endif
-
  #ifdef CONFIG_SDHCI
  	/* mmc initializattion for available channels */
  	ret = exynos_mmc_init(gd->fdt_blob);
  	if (ret)
  		debug("mmc init failed\n");
  #endif
+
  	return ret;
  }
  #endif

include/samsung/misc.h +0 -0

index 10653a1..57bac7d 100644

include/samsung/misc.h void check_boot_mode(void); · line 36

Quoted 9 lines

include/samsung/misc.h +6 -0

@@ -28,4 +28,11 @@ void check_boot_mode(void);
  void draw_logo(void);
  #endif
 
+#define BOOT_DEVICE_SDMMC	0x2
+#define BOOT_DEVICE_MASK	0x1f
+#define BOOT_DEVICE_SHIFT	0x1
+#define BOOT_DEVICE(x)		(((x) >> BOOT_DEVICE_SHIFT) & BOOT_DEVICE_MASK)
+
+unsigned int boot_device(void);

Hm, do we need to make this function to non-static? If so, it should be placed in power.c - get_om_stat()?

Thanks,
Minkyu Kang.

It is possible to boot device using a micro SD or eMMC slots. In this situation, boot device should be registered as a block device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV is usually set to "0" in the most config cases.

Signed-off-by Przemyslaw Marczak <[email protected]>

---
Changes V3:
- separate two changes into two commits

---
 board/samsung/common/board.c | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

board/samsung/common/board.c +11 -4

index ecf3f76..f07a900 100644
@@ -251,18 +251,28 @@ int board_mmc_init(bd_t *bis)
 {
 	int ret;
 
+	if (boot_device() == BOOT_DEVICE_SDMMC) {
+#ifdef CONFIG_SDHCI
+		/* mmc initializattion for available channels */
+		ret = exynos_mmc_init(gd->fdt_blob);
+#endif
 #ifdef CONFIG_DWMMC
-	/* dwmmc initializattion for available channels */
-	ret = exynos_dwmmc_init(gd->fdt_blob);
-	if (ret)
-		debug("dwmmc init failed\n");
+		/* dwmmc initializattion for available channels */
+		ret = exynos_dwmmc_init(gd->fdt_blob);
+#endif
+	} else {
+#ifdef CONFIG_DWMMC
+		/* dwmmc initializattion for available channels */

Dear Przemyslaw Marczak,

Quoted 42 lines · Przemyslaw Marczak

It is possible to boot device using a micro SD or eMMC slots. In this situation, boot device should be registered as a block device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV is usually set to "0" in the most config cases.

Signed-off-by Przemyslaw Marczak <[email protected]>

---
Changes V3:
- separate two changes into two commits

---
 board/samsung/common/board.c | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

board/samsung/common/board.c +12 -6

index ecf3f76..f07a900 100644
@@ -251,18 +251,28 @@ int board_mmc_init(bd_t *bis)
 {
 	int ret;
 
+	if (boot_device() == BOOT_DEVICE_SDMMC) {
+#ifdef CONFIG_SDHCI
+		/* mmc initializattion for available channels */
+		ret = exynos_mmc_init(gd->fdt_blob);
+#endif
 #ifdef CONFIG_DWMMC
-	/* dwmmc initializattion for available channels */
-	ret = exynos_dwmmc_init(gd->fdt_blob);
-	if (ret)
-		debug("dwmmc init failed\n");
+		/* dwmmc initializattion for available channels */
+		ret = exynos_dwmmc_init(gd->fdt_blob);
+#endif
+	} else {
+#ifdef CONFIG_DWMMC
+		/* dwmmc initializattion for available channels */
+		ret = exynos_dwmmc_init(gd->fdt_blob);
 #endif
 #ifdef CONFIG_SDHCI
-	/* mmc initializattion for available channels */
-	ret = exynos_mmc_init(gd->fdt_blob);

board/samsung/common/board.c int board_mmc_init(bd_t *bis) · line 273

Quoted 5 lines

board/samsung/common/board.c +5 -0

+		/* mmc initializattion for available channels */
+		ret = exynos_mmc_init(gd->fdt_blob);
+#endif
+	}
+

It looks little confused.
Could you please re-arrange this code like this?

#ifdef CONFIG_SDHCI
	if (boot....) {

	} else {

	}

#endif

#ifdef CONFIG_DWMMC
	if (boot....) {

	} else {

	}

#endif

Thanks,
Minkyu Kang.

Quoted 45 lines · Minkyu Kang

Dear Przemyslaw Marczak,

Quoted 42 lines · Przemyslaw Marczak

It is possible to boot device using a micro SD or eMMC slots. In this situation, boot device should be registered as a block device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV is usually set to "0" in the most config cases.

Signed-off-by Przemyslaw Marczak <[email protected]>

---
Changes V3:
- separate two changes into two commits

---
  board/samsung/common/board.c | 24 +++++++++++++++++-------
  1 file changed, 17 insertions(+), 7 deletions(-)

board/samsung/common/board.c +12 -6

index ecf3f76..f07a900 100644
@@ -251,18 +251,28 @@ int board_mmc_init(bd_t *bis)
  {
  	int ret;
 
+	if (boot_device() == BOOT_DEVICE_SDMMC) {
+#ifdef CONFIG_SDHCI
+		/* mmc initializattion for available channels */
+		ret = exynos_mmc_init(gd->fdt_blob);
+#endif
  #ifdef CONFIG_DWMMC
-	/* dwmmc initializattion for available channels */
-	ret = exynos_dwmmc_init(gd->fdt_blob);
-	if (ret)
-		debug("dwmmc init failed\n");
+		/* dwmmc initializattion for available channels */
+		ret = exynos_dwmmc_init(gd->fdt_blob);
+#endif
+	} else {
+#ifdef CONFIG_DWMMC
+		/* dwmmc initializattion for available channels */
+		ret = exynos_dwmmc_init(gd->fdt_blob);
  #endif
  #ifdef CONFIG_SDHCI
-	/* mmc initializattion for available channels */
-	ret = exynos_mmc_init(gd->fdt_blob);

Quoted 8 lines

board/samsung/common/board.c int board_mmc_init(bd_t *bis) · line 273

Quoted 5 lines

board/samsung/common/board.c +5 -0

+		/* mmc initializattion for available channels */
+		ret = exynos_mmc_init(gd->fdt_blob);
+#endif
+	}
+

It looks little confused.
Could you please re-arrange this code like this?

If re-arrange the below code, i want to call the dwmmc-init function at first. Is there a special reason for sequence(sdhci->dwmmc)?

Best Regards,
Jaehoon Chung

Dear Przemyslaw Marczak,

Quoted 37 lines · Przemyslaw Marczak

It is possible to boot device using a micro SD or eMMC slots. In this situation, boot device should be registered as a block device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV is usually set to "0" in the most config cases.

Signed-off-by Przemyslaw Marczak <[email protected]>

---
Changes V3:
- separate two changes into two commits

---
  board/samsung/common/board.c | 24 +++++++++++++++++-------
  1 file changed, 17 insertions(+), 7 deletions(-)

board/samsung/common/board.c +11 -4

index ecf3f76..f07a900 100644
@@ -251,18 +251,28 @@ int board_mmc_init(bd_t *bis)
  {
  	int ret;
 
+	if (boot_device() == BOOT_DEVICE_SDMMC) {
+#ifdef CONFIG_SDHCI
+		/* mmc initializattion for available channels */
+		ret = exynos_mmc_init(gd->fdt_blob);
+#endif
  #ifdef CONFIG_DWMMC
-	/* dwmmc initializattion for available channels */
-	ret = exynos_dwmmc_init(gd->fdt_blob);
-	if (ret)
-		debug("dwmmc init failed\n");
+		/* dwmmc initializattion for available channels */
+		ret = exynos_dwmmc_init(gd->fdt_blob);
+#endif
+	} else {
+#ifdef CONFIG_DWMMC
+		/* dwmmc initializattion for available channels */

board/samsung/common/board.c int board_mmc_init(bd_t *bis) · line 273

Quoted 10 lines

board/samsung/common/board.c +6 -2

+		ret = exynos_dwmmc_init(gd->fdt_blob);
  #endif
  #ifdef CONFIG_SDHCI
-	/* mmc initializattion for available channels */
-	ret = exynos_mmc_init(gd->fdt_blob);
+		/* mmc initializattion for available channels */
+		ret = exynos_mmc_init(gd->fdt_blob);
+#endif
+	}
+

It looks little confused.
Could you please re-arrange this code like this?

#ifdef CONFIG_SDHCI
	if (boot....) {

	} else {

	}

#endif

#ifdef CONFIG_DWMMC
	if (boot....) {

	} else {

	}

#endif

Thanks,
Minkyu Kang.

On an Odroid U3 board, the SOC is unable to reset the eMMC card in the DWMMC mode by the cpu software reset. Manual reset of the card by switching proper gpio pin - fixes this issue.

Such solution needs to add a call to pre reset function.
This is done by the reset_misc() function, which is called before reset_cpu(). The function reset_misc() is a weak function.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Minkyu Kang <[email protected]>

Cc Jean-Christophe PLAGNIOL-VILLARD <[email protected]>

Cc Albert ARIBAUD <[email protected]>

Cc Tom Rini <[email protected]>

---
 arch/arm/lib/reset.c | 7 +++++++
 include/common.h     | 1 +
 2 files changed, 8 insertions(+)

arch/arm/lib/reset.c +7 -0

index 7a03580..3b39466 100644
@@ -23,6 +23,11 @@
 
 #include <common.h>
 
+void __reset_misc(void) {}
+
+void reset_misc(void)
+	__attribute((weak, alias("__reset_misc")));
+
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	puts ("resetting ...\n");

@@ -30,6 +35,8 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	udelay (50000);				/* wait 50 ms */
 
 	disable_interrupts();
+
+	reset_misc();
 	reset_cpu(0);
 
 	/*NOTREACHED*/

include/common.h +0 -0

index 232136c..04bab78 100644

Dear Przemyslaw Marczak,

Quoted 49 lines · Przemyslaw Marczak

On an Odroid U3 board, the SOC is unable to reset the eMMC card in the DWMMC mode by the cpu software reset. Manual reset of the card by switching proper gpio pin - fixes this issue.

Such solution needs to add a call to pre reset function.
This is done by the reset_misc() function, which is called before reset_cpu(). The function reset_misc() is a weak function.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Minkyu Kang <[email protected]>

Cc Jean-Christophe PLAGNIOL-VILLARD <[email protected]>

Cc Albert ARIBAUD <[email protected]>

Cc Tom Rini <[email protected]>

---
  arch/arm/lib/reset.c | 7 +++++++
  include/common.h     | 1 +
  2 files changed, 8 insertions(+)

arch/arm/lib/reset.c +7 -0

index 7a03580..3b39466 100644
@@ -23,6 +23,11 @@
 
  #include <common.h>
 
+void __reset_misc(void) {}
+
+void reset_misc(void)
+	__attribute((weak, alias("__reset_misc")));
+
  int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  {
  	puts ("resetting ...\n");

@@ -30,6 +35,8 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  	udelay (50000);				/* wait 50 ms */
 
  	disable_interrupts();
+
+	reset_misc();
  	reset_cpu(0);
 
  	/*NOTREACHED*/

include/common.h +0 -0

index 232136c..04bab78 100644

include/common.h int checkicache (void); · line 635

Quoted 7 lines

include/common.h +1 -0

@@ -629,6 +629,7 @@ int	checkicache   (void);
  int	checkdcache   (void);
  void	upmconfig     (unsigned int, unsigned int *, unsigned int);
  ulong	get_tbclk     (void);
+void	reset_misc    (void);
  void	reset_cpu     (ulong addr);
  #if defined (CONFIG_OF_LIBFDT) && defined (CONFIG_OF_BOARD_SETUP)
  void ft_cpu_setup(void *blob, bd_t *bd);

I'm not sure that we really need to add this function to arm common. We can do this in reset_cpu (arch/arm/cpu/armv7/exynos/soc.c).
But if other SoCs also need to add such things then, it can be added as arm common.

Thanks,
Minkyu Kang.

Quoted 28 lines · Minkyu Kang

Dear Przemyslaw Marczak,

Quoted 25 lines · Przemyslaw Marczak

On an Odroid U3 board, the SOC is unable to reset the eMMC card in the DWMMC mode by the cpu software reset. Manual reset of the card by switching proper gpio pin - fixes this issue.

Such solution needs to add a call to pre reset function. This is done by the reset_misc() function, which is called before reset_cpu().
The function reset_misc() is a weak function.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Minkyu Kang <[email protected]>

Cc Jean-Christophe PLAGNIOL-VILLARD <[email protected]>

Cc Albert ARIBAUD <[email protected]>

Cc Tom Rini <[email protected]>

---
  arch/arm/lib/reset.c | 7 +++++++
  include/common.h     | 1 +
  2 files changed, 8 insertions(+)

arch/arm/lib/reset.c +0 -0

index 7a03580..3b39466 100644
@@ -23,6 +23,11 @@
 

Quoted 7 lines

arch/arm/lib/reset.c line 30

Quoted 7 lines

arch/arm/lib/reset.c +5 -0

  #include <common.h>
 
+void __reset_misc(void) {}
+
+void reset_misc(void)
+    __attribute((weak, alias("__reset_misc")));
+

Hello Przemyslaw,

Quoted 29 lines · Przemyslaw Marczak

Quoted 28 lines · Minkyu Kang

Dear Przemyslaw Marczak,

Quoted 25 lines · Przemyslaw Marczak

On an Odroid U3 board, the SOC is unable to reset the eMMC card in the DWMMC mode by the cpu software reset. Manual reset of the card by switching proper gpio pin - fixes this issue.

Such solution needs to add a call to pre reset function. This is done by the reset_misc() function, which is called before reset_cpu().
The function reset_misc() is a weak function.

Signed-off-by Przemyslaw Marczak <[email protected]>

Cc Minkyu Kang <[email protected]>

Cc Jean-Christophe PLAGNIOL-VILLARD <[email protected]>

Cc Albert ARIBAUD <[email protected]>

Cc Tom Rini <[email protected]>

---
  arch/arm/lib/reset.c | 7 +++++++
  include/common.h     | 1 +
  2 files changed, 8 insertions(+)

arch/arm/lib/reset.c +0 -0

index 7a03580..3b39466 100644
@@ -23,6 +23,11 @@
 

Quoted 7 lines

Quoted 7 lines

arch/arm/lib/reset.c line 30

Quoted 7 lines

arch/arm/lib/reset.c +5 -0

  #include <common.h>
 
+void __reset_misc(void) {}
+
+void reset_misc(void)
+    __attribute((weak, alias("__reset_misc")));
+

can you please use __weak here and provide a prototype, wherever it ends up in the end. It prevents 3 warnings and makes it type safe..

Regards,
Jeroen

Quoted 11 lines

Quoted 8 lines

Quoted 8 lines

arch/arm/lib/reset.c line 30

Quoted 8 lines

  #include <common.h>

arch/arm/lib/reset.c +5 -0

+void __reset_misc(void) {}
+
+void reset_misc(void)
+    __attribute((weak, alias("__reset_misc")));
+

can you please use __weak here and provide a prototype, wherever it ends up in the end. It prevents 3 warnings and makes it type safe..

Thanks, I will add the __weak prefix there.

The prototype of this new function is in file common.h, so this is type safe.