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clk: s3c64xx: Hookup SPI clocks correctly

PATCH Applied Charles Keepax 2 participants 3 messages Jun 18, 2014 – Jun 30, 2014

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PATCH 1/1 clk: s3c64xx: Hookup SPI clocks correctly

In the move to this clock driver the hookups for the SPI clocks were dropped, which causes my system Cragganmore (s3c6410 based) to be unable to locate any spibus clocks. This patch adds them back in.

When taking the clock from the epll clock (SCLK) the rates on the SPI bus are incorrect, this needs further debugging but the hookup here should be correct and the problem should be else where.

The USBCLK case has been dropped because this requires the USB PHY to be enabled.

---
 drivers/clk/samsung/clk-s3c64xx.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)
drivers/clk/samsung/clk-s3c64xx.c +4 -2
index efa16ee..8889ff1c 100644
@@ -418,8 +418,10 @@ static struct samsung_clock_alias s3c64xx_clock_aliases[] = {
 	ALIAS(SCLK_MMC2, "s3c-sdhci.2", "mmc_busclk.2"),
 	ALIAS(SCLK_MMC1, "s3c-sdhci.1", "mmc_busclk.2"),
 	ALIAS(SCLK_MMC0, "s3c-sdhci.0", "mmc_busclk.2"),
-	ALIAS(SCLK_SPI1, "s3c6410-spi.1", "spi-bus"),
-	ALIAS(SCLK_SPI0, "s3c6410-spi.0", "spi-bus"),
+	ALIAS(PCLK_SPI1, "s3c6410-spi.1", "spi_busclk0"),
+	ALIAS(SCLK_SPI1, "s3c6410-spi.1", "spi_busclk2"),
+	ALIAS(PCLK_SPI0, "s3c6410-spi.0", "spi_busclk0"),
+	ALIAS(SCLK_SPI0, "s3c6410-spi.0", "spi_busclk2"),
 	ALIAS(SCLK_AUDIO1, "samsung-pcm.1", "audio-bus"),
 	ALIAS(SCLK_AUDIO1, "samsung-i2s.1", "audio-bus"),
 	ALIAS(SCLK_AUDIO0, "samsung-pcm.0", "audio-bus"),
Signature · 1 line
1.7.2.5
#1 lore raw

Hi Charles,

Quoted 8 lines · Charles Keepax

In the move to this clock driver the hookups for the SPI clocks were dropped, which causes my system Cragganmore (s3c6410 based) to be unable to locate any spibus clocks. This patch adds them back in.

When taking the clock from the epll clock (SCLK) the rates on the SPI bus are incorrect, this needs further debugging but the hookup here should be correct and the problem should be else where.

Quoted 7 lines

The USBCLK case has been dropped because this requires the USB PHY to be enabled.

---
 drivers/clk/samsung/clk-s3c64xx.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

Thanks for fixing this. Will apply to my fixes branch.

Best regards,
Tomasz

Applied
#2 lore raw
In reply to Charles Keepax
Quoted 8 lines · Charles Keepax

In the move to this clock driver the hookups for the SPI clocks were dropped, which causes my system Cragganmore (s3c6410 based) to be unable to locate any spibus clocks. This patch adds them back in.

When taking the clock from the epll clock (SCLK) the rates on the SPI bus are incorrect, this needs further debugging but the hookup here should be correct and the problem should be else where.

Quoted 7 lines

The USBCLK case has been dropped because this requires the USB PHY to be enabled.

---
 drivers/clk/samsung/clk-s3c64xx.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

Applied as a fix for 3.16.

Best regards,
Tomasz