Add R8A7790/Lager board PCI USB DT support
Subsystems (2)
v5 cover Add R8A7790/Lager board PCI USB DT support
Hello.
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-v3.16-rc2-20140623' tag. Here we add PCI USB device tree support for the R8A7790-based Lager board. As the 'pci-rcar-gen2' driver device tree support has been merged for 3.16, this patchset can now be merged too...
[1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes [2/2] ARM: shmobile: lager: enable internal PCI
WBR, Sergei
PATCH v5 1/2 ARM: shmobile: r8a7790: add internal PCI bridge nodes
From: Ben Dooks <[email protected]>
Add device nodes for the R8A7790 internal PCI bridge devices.
---
Changes in version 5:
- added "device_type" and "ranges" properties to the PCI bridge nodes;
- removed "0x" prefix from zero values in the "reg" properties.
Changes in version 4:
- refreshed the patch.
Changes in version 3:
- added interrupt-related properties to the PCI bridge nodes;
- refreshed the patch.
Changes in version 2:
- reworded summary (fixing typo) and changelog;
- removed extra spaces before {;
- refreshed the patch.
arch/arm/boot/dts/r8a7790.dtsi | 60 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+)
arch/arm/boot/dts/r8a7790.dtsi +60 -0
@@ -930,6 +930,66 @@ status = "disabled"; }; + pci0: pci at ee090000 { + compatible = "renesas,pci-r8a7790"; + device_type = "pci"; + clocks = <&mstp7_clks R8A7790_CLK_EHCI>; + reg = <0 0xee090000 0 0xc00>, + <0 0xee080000 0 0x1100>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + + bus-range = <0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; + interrupt-map-mask = <0xff00 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; + }; + + pci1: pci at ee0b0000 { + compatible = "renesas,pci-r8a7790"; + device_type = "pci"; + clocks = <&mstp7_clks R8A7790_CLK_EHCI>; + reg = <0 0xee0b0000 0 0xc00>, + <0 0xee0a0000 0 0x1100>; + interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + + bus-range = <1 1>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; + interrupt-map-mask = <0xff00 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>; + }; + + pci2: pci at ee0d0000 { + compatible = "renesas,pci-r8a7790"; + device_type = "pci"; + clocks = <&mstp7_clks R8A7790_CLK_EHCI>; + reg = <0 0xee0d0000 0 0xc00>, + <0 0xee0c0000 0 0x1100>; + interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + + bus-range = <2 2>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; + interrupt-map-mask = <0xff00 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; + }; + pciec: pcie at fe000000 { compatible = "renesas,pcie-r8a7790"; reg = <0 0xfe000000 0 0x80000>;
PATCH v5 1/2 ARM: shmobile: r8a7790: add internal PCI bridge nodes
Quoted 8 lines · On Tuesday 24 June 2014 21:59:54 Sergei Shtylyov wrote:
From: Ben Dooks <[email protected]>
Add device nodes for the R8A7790 internal PCI bridge devices.
Signed-off-by Ben Dooks <[email protected]>Reviewed-by Ian Molton <[email protected]>[Sergei: added several properties to the PCI bridge nodes]Signed-off-by Sergei Shtylyov <[email protected]>
Yes, looks better, thanks for the update.
PATCH v5 1/2 ARM: shmobile: r8a7790: add internal PCI bridge nodes
In reply to Sergei ShtylyovHi Sergei,
Quoted 8 lines · Sergei Shtylyov
From: Ben Dooks <[email protected]>
Add device nodes for the R8A7790 internal PCI bridge devices.
Signed-off-by Ben Dooks <[email protected]>Reviewed-by Ian Molton <[email protected]>[Sergei: added several properties to the PCI bridge nodes]Signed-off-by Sergei Shtylyov <[email protected]>
Thank you for the patch!
I tested this patch on my lager board and a usb memory, and it works.
Best regards,
Yoshihiro Shimoda
Quoted 96 lines
---
Changes in version 5:
- added "device_type" and "ranges" properties to the PCI bridge nodes;
- removed "0x" prefix from zero values in the "reg" properties.Changes in version 4:
- refreshed the patch.Changes in version 3:
- added interrupt-related properties to the PCI bridge nodes;
- refreshed the patch.Changes in version 2:
- reworded summary (fixing typo) and changelog;
- removed extra spaces before {;
- refreshed the patch.arch/arm/boot/dts/r8a7790.dtsi | 60 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+)Index:
renesas/arch/arm/boot/dts/r8a7790.dtsi
===================================================================arch/arm/boot/dts/r8a7790.dtsi +60
-1@@ -930,6 +930,66 @@ status = "disabled"; }; + pci0: pci at ee090000 { + compatible = "renesas,pci-r8a7790"; + device_type = "pci"; + clocks = <&mstp7_clks R8A7790_CLK_EHCI>; + reg = <0 0xee090000 0 0xc00>, + <0 0xee080000 0 0x1100>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + + bus-range = <0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; + interrupt-map-mask = <0xff00 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; + }; + + pci1: pci at ee0b0000 { + compatible = "renesas,pci-r8a7790"; + device_type = "pci"; + clocks = <&mstp7_clks R8A7790_CLK_EHCI>; + reg = <0 0xee0b0000 0 0xc00>, + <0 0xee0a0000 0 0x1100>; + interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + + bus-range = <1 1>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; + interrupt-map-mask = <0xff00 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>; + }; + + pci2: pci at ee0d0000 { + compatible = "renesas,pci-r8a7790"; + device_type = "pci"; + clocks = <&mstp7_clks R8A7790_CLK_EHCI>; + reg = <0 0xee0d0000 0 0xc00>, + <0 0xee0c0000 0 0x1100>; + interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + + bus-range = <2 2>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; + interrupt-map-mask = <0xff00 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; + }; + pciec: pcie at fe000000 { compatible = "renesas,pcie-r8a7790"; reg = <0 0xfe000000 0 0x80000>; --To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo at vger.kernel.org
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PATCH v5 1/2 ARM: shmobile: r8a7790: add internal PCI bridge nodes
Hi Shimoda-san,
Quoted 12 lines · Yoshihiro Shimoda
Hi Sergei,
Quoted 8 lines · Sergei Shtylyov
From: Ben Dooks <[email protected]>
Add device nodes for the R8A7790 internal PCI bridge devices.
Signed-off-by Ben Dooks <[email protected]>Reviewed-by Ian Molton <[email protected]>[Sergei: added several properties to the PCI bridge nodes]Signed-off-by Sergei Shtylyov <[email protected]>
Quoted 4 lines
Thank you for the patch!
I tested this patch on my lager board and a usb memory, and it works.Tested-by Yoshihiro Shimoda <[email protected]>
Thanks for testing. Just one quick question from my side: Which USB port did you test?
I somehow assumed that at least the majority of the USB ports on R-Car Gen2 require a USB PHY device driver to work?
Cheers,
/ magnus
PATCH v5 1/2 ARM: shmobile: r8a7790: add internal PCI bridge nodes
Hi Magnus-san,
Quoted 16 lines · Magnus Damm
Hi Shimoda-san,
Quoted 12 lines · Yoshihiro Shimoda
Hi Sergei,
Quoted 8 lines · Sergei Shtylyov
From: Ben Dooks <[email protected]>
Add device nodes for the R8A7790 internal PCI bridge devices.
Signed-off-by Ben Dooks <[email protected]>Reviewed-by Ian Molton <[email protected]>[Sergei: added several properties to the PCI bridge nodes]Signed-off-by Sergei Shtylyov <[email protected]>
Quoted 7 lines
Quoted 4 lines
Thank you for the patch!
I tested this patch on my lager board and a usb memory, and it works.Tested-by Yoshihiro Shimoda <[email protected]>Thanks for testing. Just one quick question from my side: Which USB port did you test?
I tested usb ch1 only...
Quoted 2 lines
I somehow assumed that at least the majority of the USB ports on R-Car Gen2 require a USB PHY device driver to work?
Thank you for the point.
About usb ch1, a USB PHY device driver doesn't need, I think.
But, about ch0 and ch2, I think that they should require a USB PHY device driver.
Best regards,
Yoshihiro Shimoda
Quoted 8 lines
Cheers,
/ magnus
--
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PATCH v5 1/2 ARM: shmobile: r8a7790: add internal PCI bridge nodes
Hi Shimoda-san,
Quoted 27 lines · Yoshihiro Shimoda
Hi Magnus-san,
Quoted 16 lines · Magnus Damm
Hi Shimoda-san,
Quoted 12 lines · Yoshihiro Shimoda
Hi Sergei,
Quoted 8 lines · Sergei Shtylyov
From: Ben Dooks <[email protected]>
Add device nodes for the R8A7790 internal PCI bridge devices.
Signed-off-by Ben Dooks <[email protected]>Reviewed-by Ian Molton <[email protected]>[Sergei: added several properties to the PCI bridge nodes]Signed-off-by Sergei Shtylyov <[email protected]>Quoted 7 lines
Quoted 4 lines
Thank you for the patch!
I tested this patch on my lager board and a usb memory, and it works.Tested-by Yoshihiro Shimoda <[email protected]>Thanks for testing. Just one quick question from my side: Which USB port did you test?
Quoted 8 lines
I tested usb ch1 only...
Quoted 2 lines
I somehow assumed that at least the majority of the USB ports on R-Car Gen2 require a USB PHY device driver to work?
Thank you for the point.
About usb ch1, a USB PHY device driver doesn't need, I think.
But, about ch0 and ch2, I think that they should require a USB PHY device driver.
Thanks for your clarification. It all makes sense now!
Cheers,
/ magnus
PATCH v5 1/2 ARM: shmobile: r8a7790: add internal PCI bridge nodes
In reply to Yoshihiro ShimodaHello.
Quoted 11 lines · Yoshihiro Shimoda
Quoted 10 lines
Quoted 10 lines
Quoted 8 lines
From: Ben Dooks <[email protected]>
Add device nodes for the R8A7790 internal PCI bridge devices.
Signed-off-by Ben Dooks <[email protected]>Reviewed-by Ian Molton <[email protected]>[Sergei: added several properties to the PCI bridge nodes]Signed-off-by Sergei Shtylyov <[email protected]>Thank you for the patch!
Quoted 8 lines
Quoted 6 lines
Quoted 3 lines
I tested this patch on my lager board and a usb memory, and it works.
Tested-by Yoshihiro Shimoda <[email protected]>Thanks for testing. Just one quick question from my side: Which USB port did you test?
I tested usb ch1 only...
Note that channel #2 also should work.
Quoted 6 lines
Quoted 2 lines
I somehow assumed that at least the majority of the USB ports on R-Car Gen2 require a USB PHY device driver to work?
Thank you for the point.
About usb ch1, a USB PHY device driver doesn't need, I think.
But, about ch0 and ch2, I think that they should require a USB PHY device driver.
Only channel #0 requires the PHY driver as the default routing for USB0 is
to USBHS; channel #2 is routed to OHCI/EHCI by default.
Quoted 2 lines
Best regards,
Yoshihiro Shimoda
WBR, Sergei
PATCH v5 1/2 ARM: shmobile: r8a7790: add internal PCI bridge nodes
Hello,
Quoted 17 lines · Sergei Shtylyov
Hello.
Quoted 12 lines · Yoshihiro Shimoda
Quoted 12 lines
Quoted 12 lines
Quoted 8 lines
From: Ben Dooks <[email protected]>
Add device nodes for the R8A7790 internal PCI bridge devices.
Signed-off-by Ben Dooks <[email protected]>Reviewed-by Ian Molton <[email protected]>[Sergei: added several properties to the PCI bridge nodes]Signed-off-by Sergei Shtylyov <[email protected]>Thank you for the patch!
I tested this patch on my lager board and a usb memory, and it works.
Quoted 8 lines
Quoted 6 lines
Quoted 4 lines
Quoted 1 line
Tested-by Yoshihiro Shimoda <[email protected]>Thanks for testing. Just one quick question from my side: Which USB port did you test?
I tested usb ch1 only...
Note that channel #2 also should work.
Thank you for the point.
I tried to test usb ch2, and then it worked on my environment.
Quoted 9 lines
Quoted 6 lines
Quoted 2 lines
I somehow assumed that at least the majority of the USB ports on R-Car Gen2 require a USB PHY device driver to work?
Thank you for the point.
About usb ch1, a USB PHY device driver doesn't need, I think.
But, about ch0 and ch2, I think that they should require a USB PHY device driver.Only channel #0 requires the PHY driver as the default routing for USB0 is
to USBHS; channel #2 is routed to OHCI/EHCI by default.
I understood it.
Best regards,
Yoshihiro Shimoda
Quoted 5 lines
Quoted 2 lines
Best regards,
Yoshihiro ShimodaWBR, Sergei
PATCH v5 1/2 ARM: shmobile: r8a7790: add internal PCI bridge nodes
In reply to Magnus DammHello.
Quoted 12 lines · Magnus Damm
Quoted 11 lines
Quoted 8 lines
From: Ben Dooks <[email protected]>
Add device nodes for the R8A7790 internal PCI bridge devices.
Signed-off-by Ben Dooks <[email protected]>Reviewed-by Ian Molton <[email protected]>[Sergei: added several properties to the PCI bridge nodes]Signed-off-by Sergei Shtylyov <[email protected]>Thank you for the patch!
I tested this patch on my lager board and a usb memory, and it works.
Quoted 7 lines
Quoted 1 line
Tested-by Yoshihiro Shimoda <[email protected]>Thanks for testing. Just one quick question from my side: Which USB port did you test?
I somehow assumed that at least the majority of the USB ports on R-Car Gen2 require a USB PHY device driver to work?
In fact, channel #2 also works without the PHY driver as the default
UGCTRL2 setting route USB2 pins to OHCI/EHCI.
Quoted 2 lines
Cheers,
/ magnus
WBR, Sergei
PATCH v5 2/2 ARM: shmobile: lager: enable internal PCI
In reply to Sergei ShtylyovFrom: Ben Dooks <[email protected]>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached to them.
---
Changes in version 4:
- refreshed the patch.
Changes in version 3:
- refreshed the patch.
Changes in version 2:
- enabled PCI0 device;
- reworded summary and changelog;
- refreshed the patch.
arch/arm/boot/dts/r8a7790-lager.dts | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+)
arch/arm/boot/dts/r8a7790-lager.dts +33 -0
@@ -219,6 +219,21 @@ renesas,groups = "i2c3"; renesas,function = "i2c3"; }; + + usb0_pins: usb0 { + renesas,groups = "usb0"; + renesas,function = "usb0"; + }; + + usb1_pins: usb1 { + renesas,groups = "usb1"; + renesas,function = "usb1"; + }; + + usb2_pins: usb2 { + renesas,groups = "usb2"; + renesas,function = "usb2"; + }; }; ðer {
@@ -368,3 +383,21 @@ regulator-always-on; }; }; + +&pci0 { + status = "okay"; + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; +}; + +&pci1 { + status = "okay"; + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; +}; + +&pci2 { + status = "okay"; + pinctrl-0 = <&usb2_pins>; + pinctrl-names = "default"; +};
PATCH v5 2/2 ARM: shmobile: lager: enable internal PCI
Hi Sergei,
Quoted 9 lines · Sergei Shtylyov
From: Ben Dooks <[email protected]>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached to them.
Signed-off-by Ben Dooks <[email protected]>Reviewed-by Ian Molton <[email protected]>[Sergei: enabled PCI0]Signed-off-by Sergei Shtylyov <[email protected]>
I also tested this patch, and it works.
Best regards,
Yoshihiro shimoda
Quoted 68 lines
---
Changes in version 4:
- refreshed the patch.Changes in version 3:
- refreshed the patch.Changes in version 2:
- enabled PCI0 device;
- reworded summary and changelog;
- refreshed the patch.arch/arm/boot/dts/r8a7790-lager.dts | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+)Index:
renesas/arch/arm/boot/dts/r8a7790-lager.dts
===================================================================arch/arm/boot/dts/r8a7790-lager.dts +33
-1@@ -219,6 +219,21 @@ renesas,groups = "i2c3"; renesas,function = "i2c3"; }; + + usb0_pins: usb0 { + renesas,groups = "usb0"; + renesas,function = "usb0"; + }; + + usb1_pins: usb1 { + renesas,groups = "usb1"; + renesas,function = "usb1"; + }; + + usb2_pins: usb2 { + renesas,groups = "usb2"; + renesas,function = "usb2"; + }; }; ðer {@@ -368,3 +383,21 @@ regulator-always-on; }; }; + +&pci0 { + status = "okay"; + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; +}; + +&pci1 { + status = "okay"; + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; +}; + +&pci2 { + status = "okay"; + pinctrl-0 = <&usb2_pins>; + pinctrl-names = "default"; +}; --To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo at vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
v5 cover Add R8A7790/Lager board PCI USB DT support
In reply to Sergei ShtylyovQuoted 9 lines · Sergei Shtylyov
Hello.
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-v3.16-rc2-20140623' tag. Here we add PCI USB device tree support for the R8A7790-based Lager board. As the 'pci-rcar-gen2' driver device tree support has been merged for 3.16, this patchset can now be merged too...[1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes [2/2] ARM: shmobile: lager: enable internal PCI
Thanks, I will queue these up with
Shimoda-san's Tested-by.
v5 cover Add R8A7790/Lager board PCI USB DT support
Quoted 8 lines · Simon Horman
Quoted 7 lines · Sergei Shtylyov
Hello.
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-v3.16-rc2-20140623' tag. Here we add PCI USB device tree support for the R8A7790-based Lager board. As the 'pci-rcar-gen2' driver device tree support has been merged for 3.16, this patchset can now be merged too...
Quoted 5 lines
Quoted 2 lines
[1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes [2/2] ARM: shmobile: lager: enable internal PCI
Thanks, I will queue these up with
Shimoda-san's Tested-by.
And Arnd's Ack