new Atmel DMA controller
Subsystems (4)
v2 cover new Atmel DMA controller
Hi,
This set of patches introduces support for the new Atmel DMA controller know as XDMAC and available on SAMA5D4.
Changes from:
- v1
- add power management stuff
- check maxburst value
- revert subsys_initcall remove, EPROBE_DEFER not yet available on the kernel version I use to do the tests, moreover other devices are not ready to use it
- RFC:
- DMA_SUCCESS replaced by DMA_COMPLETE
- fix memcpy issue caused by a mistake in interfaces used
- add filter function
- remove some parameters from device tree since we can get them through the dma slave configuration
- use readl/writel relaxed
- remove subsys_initcall
- synchronize irq before killing tasklets
- use BIT macro
- misc cleanup
Ludovic Desroches (2):
dma: at_xdmac: creation of the atmel eXtended DMA Controller driver
ARM: dts: at_xdmac: add bindings documentation
.../devicetree/bindings/dma/atmel-xdma.txt | 39 + drivers/dma/Kconfig | 7 + drivers/dma/Makefile | 1 + drivers/dma/at_xdmac.c | 1179 ++++++++++++++++++++ drivers/dma/at_xdmac.h | 308 +++++ include/dt-bindings/dma/at91.h | 25 + 6 files changed, 1559 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/atmel-xdma.txt create mode 100644 drivers/dma/at_xdmac.c create mode 100644 drivers/dma/at_xdmac.h
Signature · 1 line
1.7.9.5
PATCH v2 1/2 dma: at_xdmac: creation of the atmel eXtended DMA Controller driver
New atmel DMA controller known as XDMAC, introduced with SAMA5D4 devices.
Tests done on 3.10 kernel version.
TODO once SAMA5D4 support mainlined:
- use module_platform_driver instead of subsys_initcall
- use dma_get_any_slave_channel
--- drivers/dma/Kconfig | 7 + drivers/dma/Makefile | 1 + drivers/dma/at_xdmac.c | 1179 ++++++++++++++++++++++++++++++++++++++++ drivers/dma/at_xdmac.h | 308 +++++++++++ include/dt-bindings/dma/at91.h | 25 + 5 files changed, 1520 insertions(+) create mode 100644 drivers/dma/at_xdmac.c create mode 100644 drivers/dma/at_xdmac.h
drivers/dma/Kconfig +7 -0
@@ -89,6 +89,13 @@ config AT_HDMAC help Support the Atmel AHB DMA controller. +config AT_XDMAC + tristate "Atmel XDMA support" + depends on ARCH_AT91 + select DMA_ENGINE + help + Support the Atmel XDMA controller. + config FSL_DMA tristate "Freescale Elo series DMA support" depends on FSL_SOC
drivers/dma/Makefile +1 -0
@@ -17,6 +17,7 @@ obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/ obj-$(CONFIG_MV_XOR) += mv_xor.o obj-$(CONFIG_DW_DMAC_CORE) += dw/ obj-$(CONFIG_AT_HDMAC) += at_hdmac.o +obj-$(CONFIG_AT_XDMAC) += at_xdmac.o obj-$(CONFIG_MX3_IPU) += ipu/ obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o obj-$(CONFIG_SH_DMAE_BASE) += sh/
drivers/dma/at_xdmac.c new file +1179 -0
1,179 lines not on this page · raw message
drivers/dma/at_xdmac.h new file +308 -0
308 lines not on this page · raw message
include/dt-bindings/dma/at91.h +25 -0
@@ -9,6 +9,8 @@#ifndef __DT_BINDINGS_AT91_DMA_H__#define __DT_BINDINGS_AT91_DMA_H__ +/* ---------- HDMAC ---------- */ +/* * Source and/or destination peripheral ID */
@@ -24,4 +26,27 @@#define AT91_DMA_CFG_FIFOCFG_ALAP (0x1 << AT91_DMA_CFG_FIFOCFG_OFFSET)/* largest defined AHB burst */ #define AT91_DMA_CFG_FIFOCFG_ASAP (0x2 << AT91_DMA_CFG_FIFOCFG_OFFSET)/* single AHB access */ + +/* ---------- XDMAC ---------- */ +#define AT91_XDMAC_DT_MEM_IF_MASK (0x1) +#define AT91_XDMAC_DT_MEM_IF_OFFSET (16) +#define AT91_XDMAC_DT_MEM_IF (mem_if) (((mem_if) & AT91_XDMAC_DT_MEM_IF_MASK) \ + << AT91_XDMAC_DT_MEM_IF_OFFSET) +#define AT91_XDMAC_DT_GET_MEM_IF (cfg) (((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \ + & AT91_XDMAC_DT_MEM_IF_MASK) + +#define AT91_XDMAC_DT_PER_IF_MASK (0x1) +#define AT91_XDMAC_DT_PER_IF_OFFSET (0) +#define AT91_XDMAC_DT_PER_IF (per_if) (((per_if) & AT91_XDMAC_DT_PER_IF_MASK) \ + << AT91_XDMAC_DT_PER_IF_OFFSET) +#define AT91_XDMAC_DT_GET_PER_IF (cfg) (((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \ + & AT91_XDMAC_DT_PER_IF_MASK) + +#define AT91_XDMAC_DT_PERID_MASK (0x7f) +#define AT91_XDMAC_DT_PERID_OFFSET (24) +#define AT91_XDMAC_DT_PERID (perid) (((perid) & AT91_XDMAC_DT_PERID_MASK) \ + << AT91_XDMAC_DT_PERID_OFFSET) +#define AT91_XDMAC_DT_GET_PERID (cfg) (((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \ + & AT91_XDMAC_DT_PERID_MASK) +#endif /* __DT_BINDINGS_AT91_DMA_H__ */
Signature · 1 line
1.7.9.5
PATCH v2 2/2 ARM: dts: at_xdmac: add bindings documentation
In reply to Ludovic DesrochesAdd bindings documentation for the new Atmel DMA controller (XDMAC) introduced with SAMA5D4.
--- .../devicetree/bindings/dma/atmel-xdma.txt | 39 ++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/atmel-xdma.txt
Documentation/devicetree/bindings/dma/atmel-xdma.txt new file +39 -0
@@ -0,0 +1,39 @@ +* Atmel Extensible Direct Memory Access Controller (XDMAC) + +Required properties: +- compatible: Should be "atmel,<chip>-dma". +- reg: Should contain DMA registers location and length. +- interrupts: Should contain DMA interrupt. +- #dma-cells: Must be <2>, used to represent the number of integer cells in +the dmas property of client devices. + +Example: + +dma1: dma-controller at f0004000 { + compatible = "atmel,sama5d4-dma"; + reg = <0xf0004000 0x200>; + interrupts = <50 4 0>; + #dma-cells = <2>; +}; + +DMA clients connected to the Atmel XDMA controller must use the format +described in the dma.txt file, using a three-cell specifier for each channel: +a phandle plus two integer cells. +The two cells in order are: + +1. A phandle pointing to the DMA controller. +2. The memory interface (16 most significant bits), the peripheral interface +(16 less significant bits). +3. Channel configuration register. Configurable fields are: + - bit 30-24: PERID, peripheral identifier. + +Example: + +i2c2: i2c at f8024000 { + compatible = "atmel,at91sam9x5-i2c"; + reg = <0xf8024000 0x4000>; + interrupts = <34 4 6>; + dmas = <&dma0 0x00000001 0x06000000>, + <&dma0 0x00000001 0x07000000>; + dma-names = "tx", "rx"; +};
Signature · 1 line
1.7.9.5
PATCH v2 2/2 ARM: dts: at_xdmac: add bindings documentation
Quoted 15 lines · Ludovic Desroches
Add bindings documentation for the new Atmel DMA controller (XDMAC) introduced with SAMA5D4.
Signed-off-by Ludovic Desroches <[email protected]>--- .../devicetree/bindings/dma/atmel-xdma.txt | 39 ++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/atmel-xdma.txtDocumentation/devicetree/bindings/dma/atmel-xdma.txt new file +0
-0
Documentation/devicetree/bindings/dma/atmel-xdma.txt line 8
Quoted 8 lines
Documentation/devicetree/bindings/dma/atmel-xdma.txt new file +8
-0@@ -0,0 +1,39 @@ +* Atmel Extensible Direct Memory Access Controller (XDMAC) + +Required properties: +- compatible: Should be "atmel,<chip>-dma". +- reg: Should contain DMA registers location and length. +- interrupts: Should contain DMA interrupt. +- #dma-cells: Must be <2>, used to represent the number of integer cells in +the dmas property of client devices.
Could you please move the description of the two cells in the dma-specifier here? It makes it far easier to read the binding.
Cheers,
Mark.
Quoted 39 lines
Documentation/devicetree/bindings/dma/atmel-xdma.txt new file +31
-0+ +Example: + +dma1: dma-controller at f0004000 { + compatible = "atmel,sama5d4-dma"; + reg = <0xf0004000 0x200>; + interrupts = <50 4 0>; + #dma-cells = <2>; +}; + +DMA clients connected to the Atmel XDMA controller must use the format +described in the dma.txt file, using a three-cell specifier for each channel: +a phandle plus two integer cells. +The two cells in order are: + +1. A phandle pointing to the DMA controller. +2. The memory interface (16 most significant bits), the peripheral interface +(16 less significant bits). +3. Channel configuration register. Configurable fields are: + - bit 30-24: PERID, peripheral identifier. + +Example: + +i2c2: i2c at f8024000 { + compatible = "atmel,at91sam9x5-i2c"; + reg = <0xf8024000 0x4000>; + interrupts = <34 4 6>; + dmas = <&dma0 0x00000001 0x06000000>, + <&dma0 0x00000001 0x07000000>; + dma-names = "tx", "rx"; +};Signature · 6 lines
1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo at vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
PATCH v2 2/2 ARM: dts: at_xdmac: add bindings documentation
Quoted 19 lines · Mark Rutland
Quoted 18 lines · Ludovic Desroches
Add bindings documentation for the new Atmel DMA controller (XDMAC) introduced with SAMA5D4.
Signed-off-by Ludovic Desroches <[email protected]>--- .../devicetree/bindings/dma/atmel-xdma.txt | 39 ++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/atmel-xdma.txtDocumentation/devicetree/bindings/dma/atmel-xdma.txt new file +3
-0@@ -0,0 +1,39 @@ +* Atmel Extensible Direct Memory Access Controller (XDMAC) + +Required properties:
Quoted 8 lines
Documentation/devicetree/bindings/dma/atmel-xdma.txt line 8
Quoted 5 lines
Documentation/devicetree/bindings/dma/atmel-xdma.txt new file +5
-0+- compatible: Should be "atmel,<chip>-dma". +- reg: Should contain DMA registers location and length. +- interrupts: Should contain DMA interrupt. +- #dma-cells: Must be <2>, used to represent the number of integer cells in +the dmas property of client devices.Could you please move the description of the two cells in the dma-specifier here? It makes it far easier to read the binding.
Of course, I'll do it for next version.
Quoted 43 lines
Cheers,
Mark.Quoted 39 lines
Documentation/devicetree/bindings/dma/atmel-xdma.txt new file +31
-0+ +Example: + +dma1: dma-controller at f0004000 { + compatible = "atmel,sama5d4-dma"; + reg = <0xf0004000 0x200>; + interrupts = <50 4 0>; + #dma-cells = <2>; +}; + +DMA clients connected to the Atmel XDMA controller must use the format +described in the dma.txt file, using a three-cell specifier for each channel: +a phandle plus two integer cells. +The two cells in order are: + +1. A phandle pointing to the DMA controller. +2. The memory interface (16 most significant bits), the peripheral interface +(16 less significant bits). +3. Channel configuration register. Configurable fields are: + - bit 30-24: PERID, peripheral identifier. + +Example: + +i2c2: i2c at f8024000 { + compatible = "atmel,at91sam9x5-i2c"; + reg = <0xf8024000 0x4000>; + interrupts = <34 4 6>; + dmas = <&dma0 0x00000001 0x06000000>, + <&dma0 0x00000001 0x07000000>; + dma-names = "tx", "rx"; +};Signature · 6 lines
1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo at vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
PATCH v2 2/2 ARM: dts: at_xdmac: add bindings documentation
In reply to Ludovic DesrochesHello.
Quoted 14 lines · Ludovic Desroches
Add bindings documentation for the new Atmel DMA controller (XDMAC) introduced with SAMA5D4.
Signed-off-by Ludovic Desroches <[email protected]>--- .../devicetree/bindings/dma/atmel-xdma.txt | 39 ++++++++++++++++++++ 1 file changed, 39 insertions(+)create mode 100644
Documentation/devicetree/bindings/dma/atmel-xdma.txtDocumentation/devicetree/bindings/dma/atmel-xdma.txt new file +0
-0
[...]
Documentation/devicetree/bindings/dma/atmel-xdma.txt line 21
Quoted 3 lines
Documentation/devicetree/bindings/dma/atmel-xdma.txt new file +3
-0+DMA clients connected to the Atmel XDMA controller must use the format +described in the dma.txt file, using a three-cell specifier for each channel: +a phandle plus two integer cells.
Specifiers do not include phandle.
Quoted 1 line
+The two cells in order are:
s/two/three/?
Documentation/devicetree/bindings/dma/atmel-xdma.txt line 28
Quoted 6 lines
Documentation/devicetree/bindings/dma/atmel-xdma.txt new file +6
-0+ +1. A phandle pointing to the DMA controller. +2. The memory interface (16 most significant bits), the peripheral interface +(16 less significant bits). +3. Channel configuration register. Configurable fields are: + - bit 30-24: PERID, peripheral identifier.
WBR, Sergei