Skip to contentSkip to conversation

ARM: dts: remove display power domain for exynos5420

PATCH New Rahul Sharma 4 participants 10 messages Jun 9, 2014 – Jul 16, 2014

Subsystems (2)
lore
Share & tools
lore
#0 lore raw

PATCH 1/1 ARM: dts: remove display power domain for exynos5420

Display domain is removed due to instability issues. Explaining the problem below:

exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes.

DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused.

FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help.

---
based on Kukjin's for-next branch.

 arch/arm/boot/dts/exynos5420.dtsi |    6 ------
 1 file changed, 6 deletions(-)
arch/arm/boot/dts/exynos5420.dtsi +0 -6
index e385322..3d528cf 100644
@@ -262,11 +262,6 @@
 		reg = <0x10044060 0x20>;
 	};
 
-	disp_pd: power-domain at 100440C0 {
-		compatible = "samsung,exynos4210-pd";
-		reg = <0x100440C0 0x20>;
-	};
-
 	msc_pd: power-domain at 10044120 {
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x10044120 0x20>;
@@ -518,7 +513,6 @@
 	};
 
 	fimd: fimd at 14400000 {
-		samsung,power-domain = <&disp_pd>;
 		clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
 		clock-names = "sclk_fimd", "fimd";
 	};
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH 1/1 ARM: dts: remove display power domain for exynos5420

Hi All,

Please review this patch.

Regards,
Rahul Sharma

Quoted 51 lines · Rahul Sharma

Display domain is removed due to instability issues. Explaining the problem below:

exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes.

DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused.

FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help.

---
based on Kukjin's for-next branch.

 arch/arm/boot/dts/exynos5420.dtsi |    6 ------
 1 file changed, 6 deletions(-)
arch/arm/boot/dts/exynos5420.dtsi +0 -7
index e385322..3d528cf 100644
@@ -262,11 +262,6 @@
                reg = <0x10044060 0x20>;
        };
 
-       disp_pd: power-domain at 100440C0 {
-               compatible = "samsung,exynos4210-pd";
-               reg = <0x100440C0 0x20>;
-       };
-
        msc_pd: power-domain at 10044120 {
                compatible = "samsung,exynos4210-pd";
                reg = <0x10044120 0x20>;
@@ -518,7 +513,6 @@
        };
 
        fimd: fimd at 14400000 {
-               samsung,power-domain = <&disp_pd>;
                clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
                clock-names = "sclk_fimd", "fimd";
        };
--

1.7.9.5

#2 lore raw

PATCH 1/1 ARM: dts: remove display power domain for exynos5420

Quoted 24 lines · Rahul Sharma

Hi All,

Please review this patch.

Regards,
Rahul Sharma

Quoted 16 lines · Rahul Sharma

Display domain is removed due to instability issues. Explaining the problem below:

exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes.

DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused.

FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help.

As I understand the problem is that fimd and dp drivers access hw registers without enabling power domain. So the proper solution is to fix these drivers.

Btw. there are already patches removing hw access from probe/bind of fimd. I guess removing also hw access from dp probe/bind could be a good solution.

Regards
Andrzej

Quoted 35 lines
Quoted 35 lines

---
based on Kukjin's for-next branch.

 arch/arm/boot/dts/exynos5420.dtsi |    6 ------
 1 file changed, 6 deletions(-)
arch/arm/boot/dts/exynos5420.dtsi +0 -7
index e385322..3d528cf 100644
@@ -262,11 +262,6 @@
                reg = <0x10044060 0x20>;
        };
 
-       disp_pd: power-domain at 100440C0 {
-               compatible = "samsung,exynos4210-pd";
-               reg = <0x100440C0 0x20>;
-       };
-
        msc_pd: power-domain at 10044120 {
                compatible = "samsung,exynos4210-pd";
                reg = <0x10044120 0x20>;
@@ -518,7 +513,6 @@
        };
 
        fimd: fimd at 14400000 {
-               samsung,power-domain = <&disp_pd>;
                clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
                clock-names = "sclk_fimd", "fimd";
        };
--

1.7.9.5

#3 lore raw

PATCH 1/1 ARM: dts: remove display power domain for exynos5420

Hi Andrej,

Quoted 26 lines · Andrzej Hajda
Quoted 24 lines · Rahul Sharma

Hi All,

Please review this patch.

Regards,
Rahul Sharma

Quoted 16 lines · Rahul Sharma

Display domain is removed due to instability issues. Explaining the problem below:

exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes.

DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused.

FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help.

Quoted 3 lines

As I understand the problem is that fimd and dp drivers access hw registers without enabling power domain. So the proper solution is to fix these drivers.

That is also a problem but I fixed those accesses in my local kernel before hitting this issue. If we do register accesses in FIMD/DP probe/bind we observes "Prefetch abort" exception. But here the problem is that 'DP domain disable' starts failing if we enable/disable multiple times.

Quoted 4 lines

Btw. there are already patches removing hw access from probe/bind of fimd. I guess removing also hw access from dp probe/bind could be a good solution.

Please let me know the links for posted patches. I will test with those patches.

Regards,
Rahul Sharma

Quoted 40 lines

Regards
Andrzej

Quoted 35 lines
Quoted 35 lines

---
based on Kukjin's for-next branch.

 arch/arm/boot/dts/exynos5420.dtsi |    6 ------
 1 file changed, 6 deletions(-)
arch/arm/boot/dts/exynos5420.dtsi +0 -7
index e385322..3d528cf 100644
@@ -262,11 +262,6 @@
                reg = <0x10044060 0x20>;
        };
 
-       disp_pd: power-domain at 100440C0 {
-               compatible = "samsung,exynos4210-pd";
-               reg = <0x100440C0 0x20>;
-       };
-
        msc_pd: power-domain at 10044120 {
                compatible = "samsung,exynos4210-pd";
                reg = <0x10044120 0x20>;
@@ -518,7 +513,6 @@
        };
 
        fimd: fimd at 14400000 {
-               samsung,power-domain = <&disp_pd>;
                clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
                clock-names = "sclk_fimd", "fimd";
        };
--

1.7.9.5

#4 lore raw

PATCH 1/1 ARM: dts: remove display power domain for exynos5420

Hi Andrej, Inki,

Quoted 39 lines · Rahul Sharma

Hi Andrej,

Quoted 26 lines · Andrzej Hajda
Quoted 24 lines · Rahul Sharma

Hi All,

Please review this patch.

Regards,
Rahul Sharma

Quoted 16 lines · Rahul Sharma

Display domain is removed due to instability issues. Explaining the problem below:

exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes.

DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused.

FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help.

Quoted 3 lines

As I understand the problem is that fimd and dp drivers access hw registers without enabling power domain. So the proper solution is to fix these drivers.

That is also a problem but I fixed those accesses in my local kernel before hitting this issue. If we do register accesses in FIMD/DP probe/bind we observes "Prefetch abort" exception. But here the problem is that 'DP domain disable' starts failing if we enable/disable multiple times.

Quoted 1 line
Quoted 5 lines
Quoted 3 lines

Btw. there are already patches removing hw access from probe/bind of fimd. I guess removing also hw access from dp probe/bind could be a good solution.

Please let me know the links for posted patches. I will test with those patches.

Is there any update on this? Please share the patches which fixes the above issue or avoid the above scenario of multiple PM Domain enable/disable. I will test them for exynos5 based boards. Otherwise we should get this change merged else display will remain broken for exynos5 based boards.

Regards,
Rahul Sharma.

Quoted 44 lines

Regards,
Rahul Sharma

Quoted 40 lines

Regards
Andrzej

Quoted 35 lines
Quoted 35 lines

---
based on Kukjin's for-next branch.

 arch/arm/boot/dts/exynos5420.dtsi |    6 ------
 1 file changed, 6 deletions(-)
arch/arm/boot/dts/exynos5420.dtsi +0 -7
index e385322..3d528cf 100644
@@ -262,11 +262,6 @@
                reg = <0x10044060 0x20>;
        };
 
-       disp_pd: power-domain at 100440C0 {
-               compatible = "samsung,exynos4210-pd";
-               reg = <0x100440C0 0x20>;
-       };
-
        msc_pd: power-domain at 10044120 {
                compatible = "samsung,exynos4210-pd";
                reg = <0x10044120 0x20>;
@@ -518,7 +513,6 @@
        };
 
        fimd: fimd at 14400000 {
-               samsung,power-domain = <&disp_pd>;
                clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
                clock-names = "sclk_fimd", "fimd";
        };
--

1.7.9.5

#5 lore raw

PATCH 1/1 ARM: dts: remove display power domain for exynos5420

Hi Rahul,

Quoted 46 lines · Rahul Sharma

Hi Andrej, Inki,

Quoted 43 lines · Rahul Sharma

Hi Andrej,

Quoted 26 lines · Andrzej Hajda
Quoted 24 lines · Rahul Sharma

Hi All,

Please review this patch.

Regards,
Rahul Sharma

Quoted 16 lines · Rahul Sharma

Display domain is removed due to instability issues. Explaining the problem below:

exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes.

DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused.

FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help.

Quoted 3 lines

As I understand the problem is that fimd and dp drivers access hw registers without enabling power domain. So the proper solution is to fix these drivers.

That is also a problem but I fixed those accesses in my local kernel before hitting this issue. If we do register accesses in FIMD/DP probe/bind we observes "Prefetch abort" exception. But here the problem is that 'DP domain disable' starts failing if we enable/disable multiple times.

Quoted 4 lines

Btw. there are already patches removing hw access from probe/bind of fimd. I guess removing also hw access from dp probe/bind could be a good solution.

Quoted 6 lines
Quoted 1 line

Please let me know the links for posted patches. I will test with those patches.

Is there any update on this? Please share the patches which fixes the above issue or avoid the above scenario of multiple PM Domain enable/disable. I will test them for exynos5 based boards. Otherwise we should get this change merged else display will remain broken for exynos5 based boards.

Andrzej is on holidays right now, so he won't be able to reply in this thread until he's back. Here are two patches I was able to find on the related MLs that might be fixing the cause of your issues:

[PATCH] drm/exynos: remove hardware overlays disable from fimd probe
(https://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg31629.html)

[PATCH] drm/exynos: fimd: Keep power enabled during fimd_bind
(https://lkml.org/lkml/2014/7/4/188)

Best regards,
Tomasz

#6 lore raw

PATCH 1/1 ARM: dts: remove display power domain for exynos5420

Hi Tomasz,

Quoted 51 lines · Tomasz Figa

Hi Rahul,

Quoted 48 lines · Rahul Sharma

Hi Andrej, Inki,

Quoted 44 lines · Rahul Sharma

Hi Andrej,

Quoted 26 lines · Andrzej Hajda
Quoted 24 lines · Rahul Sharma

Hi All,

Please review this patch.

Regards,
Rahul Sharma

Quoted 16 lines · Rahul Sharma

Display domain is removed due to instability issues. Explaining the problem below:

exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes.

DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused.

FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help.

Quoted 3 lines

As I understand the problem is that fimd and dp drivers access hw registers without enabling power domain. So the proper solution is to fix these drivers.

That is also a problem but I fixed those accesses in my local kernel before hitting this issue. If we do register accesses in FIMD/DP probe/bind we observes "Prefetch abort" exception. But here the problem is that 'DP domain disable' starts failing if we enable/disable multiple times.

Quoted 4 lines

Btw. there are already patches removing hw access from probe/bind of fimd. I guess removing also hw access from dp probe/bind could be a good solution.

Please let me know the links for posted patches. I will test with those patches.

Quoted 8 lines
Quoted 4 lines

Is there any update on this? Please share the patches which fixes the above issue or avoid the above scenario of multiple PM Domain enable/disable. I will test them for exynos5 based boards. Otherwise we should get this change merged else display will remain broken for exynos5 based boards.

Andrzej is on holidays right now, so he won't be able to reply in this thread until he's back. Here are two patches I was able to find on the related MLs that might be fixing the cause of your issues:

Ok. thanks for the update.

We should test with Ajay's patches which includes DP probe deferring based on availability of bridge chip. +

few patches which cleanup register access in FIMD and DP probe/bind OR
few patches to enable Display power domain and clocks just before the register access. As done in https://lkml.org/lkml/2014/7/4/188.

Later solution results into display power domain enable failure in case of DRM probe defer.

I am just curious if Andrej has some solution for the first approach which can be tested for defer probe and S2R scenarios.

Regards,
Rahul Sharma.

Quoted 14 lines

[PATCH] drm/exynos: remove hardware overlays disable from fimd probe
(https://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg31629.html)

[PATCH] drm/exynos: fimd: Keep power enabled during fimd_bind
(https://lkml.org/lkml/2014/7/4/188)

Best regards,
Tomasz

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#7 lore raw

PATCH 1/1 ARM: dts: remove display power domain for exynos5420

Hi Kukjin,

Please consider this patch for your branch. This patch is important for Display for Exynos5 boards.

Regards,
Rahul Sharma.

Quoted 96 lines · Rahul Sharma

Hi Tomasz,

Quoted 51 lines · Tomasz Figa

Hi Rahul,

Quoted 48 lines · Rahul Sharma

Hi Andrej, Inki,

Quoted 44 lines · Rahul Sharma

Hi Andrej,

Quoted 26 lines · Andrzej Hajda
Quoted 24 lines · Rahul Sharma

Hi All,

Please review this patch.

Regards,
Rahul Sharma

Quoted 16 lines · Rahul Sharma

Display domain is removed due to instability issues. Explaining the problem below:

exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes.

DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused.

FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help.

Quoted 3 lines

As I understand the problem is that fimd and dp drivers access hw registers without enabling power domain. So the proper solution is to fix these drivers.

That is also a problem but I fixed those accesses in my local kernel before hitting this issue. If we do register accesses in FIMD/DP probe/bind we observes "Prefetch abort" exception. But here the problem is that 'DP domain disable' starts failing if we enable/disable multiple times.

Quoted 4 lines

Btw. there are already patches removing hw access from probe/bind of fimd. I guess removing also hw access from dp probe/bind could be a good solution.

Please let me know the links for posted patches. I will test with those patches.

Quoted 8 lines
Quoted 4 lines

Is there any update on this? Please share the patches which fixes the above issue or avoid the above scenario of multiple PM Domain enable/disable. I will test them for exynos5 based boards. Otherwise we should get this change merged else display will remain broken for exynos5 based boards.

Andrzej is on holidays right now, so he won't be able to reply in this thread until he's back. Here are two patches I was able to find on the related MLs that might be fixing the cause of your issues:

Ok. thanks for the update.

We should test with Ajay's patches which includes DP probe deferring based on availability of bridge chip. +

few patches which cleanup register access in FIMD and DP probe/bind OR
few patches to enable Display power domain and clocks just before the register access. As done in https://lkml.org/lkml/2014/7/4/188.

Later solution results into display power domain enable failure in case of DRM probe defer.

I am just curious if Andrej has some solution for the first approach which can be tested for defer probe and S2R scenarios.

Regards,
Rahul Sharma.

Quoted 14 lines

[PATCH] drm/exynos: remove hardware overlays disable from fimd probe
(https://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg31629.html)

[PATCH] drm/exynos: fimd: Keep power enabled during fimd_bind
(https://lkml.org/lkml/2014/7/4/188)

Best regards,
Tomasz

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#8 lore raw

PATCH 1/1 ARM: dts: remove display power domain for exynos5420

Quoted 2 lines · Rahul Sharma

Hi Kukjin,

Hi Rahul,

Quoted 3 lines

Please consider this patch for your branch. This patch is important for Display for Exynos5 boards.

OK, I will take this for exynos5420 display for 3.17...BTW I'm not sure this is a regression for 3.16 or not...if so, please let me know.

Thanks,
Kukjin

Quoted 92 lines

Regards,
Rahul Sharma.

Quoted 88 lines · Rahul Sharma

Hi Tomasz,

Quoted 51 lines · Tomasz Figa

Hi Rahul,

Quoted 48 lines · Rahul Sharma

Hi Andrej, Inki,

Quoted 44 lines · Rahul Sharma

Hi Andrej,

Quoted 26 lines · Andrzej Hajda
Quoted 24 lines · Rahul Sharma

Hi All,

Please review this patch.

Regards,
Rahul Sharma

Quoted 16 lines · Rahul Sharma

Display domain is removed due to instability issues. Explaining the problem below:

exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes.

DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused.

FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help.

Quoted 3 lines

As I understand the problem is that fimd and dp drivers access hw registers without enabling power domain. So the proper solution is to fix these drivers.

That is also a problem but I fixed those accesses in my local kernel before hitting this issue. If we do register accesses in FIMD/DP probe/bind we observes "Prefetch abort" exception. But here the problem is that 'DP domain disable' starts failing if we enable/disable multiple times.

Quoted 4 lines

Btw. there are already patches removing hw access from probe/bind of fimd. I guess removing also hw access from dp probe/bind could be a good solution.

Please let me know the links for posted patches. I will test with those patches.

Quoted 8 lines
Quoted 4 lines

Is there any update on this? Please share the patches which fixes the above issue or avoid the above scenario of multiple PM Domain enable/disable. I will test them for exynos5 based boards. Otherwise we should get this change merged else display will remain broken for exynos5 based boards.

Andrzej is on holidays right now, so he won't be able to reply in this thread until he's back. Here are two patches I was able to find on the related MLs that might be fixing the cause of your issues:

Ok. thanks for the update.

We should test with Ajay's patches which includes DP probe deferring based on availability of bridge chip. +

few patches which cleanup register access in FIMD and DP probe/bind OR
few patches to enable Display power domain and clocks just before the register access. As done in https://lkml.org/lkml/2014/7/4/188.

Later solution results into display power domain enable failure in case of DRM probe defer.

I am just curious if Andrej has some solution for the first approach which can be tested for defer probe and S2R scenarios.

Regards,
Rahul Sharma.

Quoted 6 lines

[PATCH] drm/exynos: remove hardware overlays disable from fimd probe
(https://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg31629.html)

[PATCH] drm/exynos: fimd: Keep power enabled during fimd_bind
(https://lkml.org/lkml/2014/7/4/188)

#9 lore raw

PATCH 1/1 ARM: dts: remove display power domain for exynos5420

Thanks Kukjin,

This is not a regression but Display domain in exynos5420 was never tested well before posting this patch in mainline. This is causing problems in drm probe deferring due to late init of bridge chip. Domain fails to disable after few enable/disable iterations during boot. Without this patch DP also fails to sync with video stream after resume from suspend. This patch is a blocker for above 2 use cases.

Regards,
Rahul Sharma.

Quoted 137 lines · Kukjin Kim
Quoted 3 lines · Rahul Sharma

Hi Kukjin,

Hi Rahul,

Quoted 3 lines

Please consider this patch for your branch. This patch is important for Display for Exynos5 boards.

OK, I will take this for exynos5420 display for 3.17...BTW I'm not sure this is a regression for 3.16 or not...if so, please let me know.

Thanks,
Kukjin

Quoted 114 lines

Regards,
Rahul Sharma.

Quoted 110 lines · Rahul Sharma

Hi Tomasz,

Quoted 73 lines · Tomasz Figa

Hi Rahul,

Quoted 61 lines · Rahul Sharma

Hi Andrej, Inki,

Quoted 47 lines · Rahul Sharma

Hi Andrej,

Quoted 30 lines · Andrzej Hajda
Quoted 26 lines · Rahul Sharma

Hi All,

Please review this patch.

Regards,
Rahul Sharma

Quoted 17 lines · Rahul Sharma

Display domain is removed due to instability issues. Explaining the problem below:

exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes.

DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused.

FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help.

Quoted 3 lines

As I understand the problem is that fimd and dp drivers access hw registers without enabling power domain. So the proper solution is to fix these drivers.

That is also a problem but I fixed those accesses in my local kernel before
hitting this issue. If we do register accesses in FIMD/DP probe/bind we
observes "Prefetch abort" exception. But here the problem is that 'DP domain disable' starts failing if we enable/disable multiple times.

Quoted 1 line
Quoted 8 lines
Quoted 4 lines

Btw. there are already patches removing hw access from probe/bind of fimd. I guess removing also hw access from dp probe/bind could be a good
solution.

Please let me know the links for posted patches. I will test with those patches.

Quoted 6 lines

Is there any update on this? Please share the patches which fixes the above issue or avoid the above scenario of multiple PM Domain enable/disable.
I will test them for exynos5 based boards. Otherwise we should get this change
merged else display will remain broken for exynos5 based boards.

Quoted 3 lines

Andrzej is on holidays right now, so he won't be able to reply in this thread until he's back. Here are two patches I was able to find on the related MLs that might be fixing the cause of your issues:

Ok. thanks for the update.

We should test with Ajay's patches which includes DP probe deferring based on availability of bridge chip. +

few patches which cleanup register access in FIMD and DP probe/bind OR
few patches to enable Display power domain and clocks just before the register access. As done in https://lkml.org/lkml/2014/7/4/188.

Later solution results into display power domain enable failure in case of DRM
probe defer.

I am just curious if Andrej has some solution for the first approach which can
be tested for defer probe and S2R scenarios.

Regards,
Rahul Sharma.

Quoted 7 lines

[PATCH] drm/exynos: remove hardware overlays disable from fimd probe

(https://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg31629.html)

[PATCH] drm/exynos: fimd: Keep power enabled during fimd_bind
(https://lkml.org/lkml/2014/7/4/188)

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel