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ARM: S5P64X0, S5PC100: no more support in mainline

PATCH New Kukjin Kim 14 participants 41 messages Jun 30, 2014 – Jul 14, 2014

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Kukjin Kim

author
#0 lore raw

cover ARM: S5P64X0, S5PC100: no more support in mainline

This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree.

[PATCH 01/17] ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs [PATCH 02/17] gpio: samsung: remove s5p64x0 related gpio codes [PATCH 03/17] spi: s3c64xx: remove s5p64x0 related spi codes [PATCH 04/17] ASoC: samsung: no more support for S5P6440 and S5P6450 [PATCH 05/17] pwm: samsung: remove s5p64x0 related pwm codes [PATCH 06/17] video: fbdev: s3c-fb: remove s5p64x0 related fimd [PATCH 07/17] serial: samsung: no more support for S5P6440 and [PATCH 08/17] ARM: S5PC100: no more support S5PC100 SoC [PATCH 09/17] gpio: samsung: remov s5pc100 related gpio codes [PATCH 10/17] spi: s3c64xx: remove s5pc100 related spi codes [PATCH 11/17] pwm: samsung: remove s5pc100 related pwm codes [PATCH 12/17] serial: samsung: no more support for S5PC100 SoC [PATCH 13/17] ata: pata_samsung_cf: removes s5pc100 related ata [PATCH 14/17] mtd: onenand: remove s5pc100 related onenand codes [PATCH 15/17] video: fbdev: s3c-fb: remove s5pc100 related fimd and [PATCH 16/17] [media] exynos4-is: removes s5pc100 related fimc codes [PATCH 17/17] ASoC: Samsung: remove s5pc100 related codes

author
#1 lore raw

PATCH 2/17 gpio: samsung: remove s5p64x0 related gpio codes

This patch removes gpio codes for s5p6440 and s5p6450 SoCs.

Signed-off-by Kukjin Kim <[email protected]>
Cc Linus Walleij <[email protected]>
---
 drivers/gpio/gpio-samsung.c |  446 -------------------------------------------
 1 file changed, 446 deletions(-)
drivers/gpio/gpio-samsung.c +0 -446
index 07105ee..d12945c 100644
@@ -358,47 +358,6 @@ static unsigned s3c24xx_gpio_getcfg_abank(struct samsung_gpio_chip *chip,
 }
 #endif
 
-#if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450)
-static int s5p64x0_gpio_setcfg_rbank(struct samsung_gpio_chip *chip,
-				     unsigned int off, unsigned int cfg)
-{
-	void __iomem *reg = chip->base;
-	unsigned int shift;
-	u32 con;
-
-	switch (off) {
-	case 0:
-	case 1:
-	case 2:
-	case 3:
-	case 4:
-	case 5:
-		shift = (off & 7) * 4;
-		reg -= 4;
-		break;
-	case 6:
-		shift = ((off + 1) & 7) * 4;
-		reg -= 4;
-		break;
-	default:
-		shift = ((off + 1) & 7) * 4;
-		break;
-	}
-
-	if (samsung_gpio_is_cfg_special(cfg)) {
-		cfg &= 0xf;
-		cfg <<= shift;
-	}
-
-	con = __raw_readl(reg);
-	con &= ~(0xf << shift);
-	con |= cfg;
-	__raw_writel(con, reg);
-
-	return 0;
-}
-#endif
-
 static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg,
 					   int nr_chips)
 {

@@ -426,16 +385,6 @@ static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = {
 };
 #endif
 
-#if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450)
-static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = {
-	.cfg_eint	= 0x3,
-	.set_config	= s5p64x0_gpio_setcfg_rbank,
-	.get_config	= samsung_gpio_getcfg_4bit,
-	.set_pull	= samsung_gpio_setpull_updown,
-	.get_pull	= samsung_gpio_getpull_updown,
-};
-#endif
-
 static struct samsung_gpio_cfg samsung_gpio_cfgs[] = {
 	[0] = {
 		.cfg_eint	= 0x0,

@@ -708,91 +657,6 @@ static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
 }
 #endif
 
-/* The next set of routines are for the case of s5p64x0 bank r */
-
-static int s5p64x0_gpiolib_rbank_input(struct gpio_chip *chip,
-				       unsigned int offset)
-{
-	struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
-	void __iomem *base = ourchip->base;
-	void __iomem *regcon = base;
-	unsigned long con;
-	unsigned long flags;
-
-	switch (offset) {
-	case 6:
-		offset += 1;
-	case 0:
-	case 1:
-	case 2:
-	case 3:
-	case 4:
-	case 5:
-		regcon -= 4;
-		break;
-	default:
-		offset -= 7;
-		break;
-	}
-
-	samsung_gpio_lock(ourchip, flags);
-
-	con = __raw_readl(regcon);
-	con &= ~(0xf << con_4bit_shift(offset));
-	__raw_writel(con, regcon);
-
-	samsung_gpio_unlock(ourchip, flags);
-
-	return 0;
-}
-
-static int s5p64x0_gpiolib_rbank_output(struct gpio_chip *chip,
-					unsigned int offset, int value)
-{
-	struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
-	void __iomem *base = ourchip->base;
-	void __iomem *regcon = base;
-	unsigned long con;
-	unsigned long dat;
-	unsigned long flags;
-	unsigned con_offset  = offset;
-
-	switch (con_offset) {
-	case 6:
-		con_offset += 1;
-	case 0:
-	case 1:
-	case 2:
-	case 3:
-	case 4:
-	case 5:
-		regcon -= 4;
-		break;
-	default:
-		con_offset -= 7;
-		break;
-	}
-
-	samsung_gpio_lock(ourchip, flags);
-
-	con = __raw_readl(regcon);
-	con &= ~(0xf << con_4bit_shift(con_offset));
-	con |= 0x1 << con_4bit_shift(con_offset);
-
-	dat = __raw_readl(base + GPIODAT_OFF);
-	if (value)
-		dat |= 1 << offset;
-	else
-		dat &= ~(1 << offset);
-
-	__raw_writel(con, regcon);
-	__raw_writel(dat, base + GPIODAT_OFF);
-
-	samsung_gpio_unlock(ourchip, flags);
-
-	return 0;
-}
-
 static void samsung_gpiolib_set(struct gpio_chip *chip,
 				unsigned offset, int value)
 {

@@ -999,20 +863,6 @@ static void __init samsung_gpiolib_add_4bit2_chips(struct samsung_gpio_chip *chi
 	}
 }
 
-static void __init s5p64x0_gpiolib_add_rbank(struct samsung_gpio_chip *chip,
-					     int nr_chips)
-{
-	for (; nr_chips > 0; nr_chips--, chip++) {
-		chip->chip.direction_input = s5p64x0_gpiolib_rbank_input;
-		chip->chip.direction_output = s5p64x0_gpiolib_rbank_output;
-
-		if (!chip->pm)
-			chip->pm = __gpio_pm(&samsung_gpio_pm_4bit);
-
-		samsung_gpiolib_add(chip);
-	}
-}
-
 int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
 {
 	struct samsung_gpio_chip *samsung_chip = container_of(chip, struct samsung_gpio_chip, chip);

@@ -1320,284 +1170,6 @@ static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = {
 };
 
 /*
- * S5P6440 GPIO bank summary:
- *
- * Bank	GPIOs	Style	SlpCon	ExtInt Group
- * A	6	4Bit	Yes	1
- * B	7	4Bit	Yes	1
- * C	8	4Bit	Yes	2
- * F	2	2Bit	Yes	4 [1]
- * G	7	4Bit	Yes	5
- * H	10	4Bit[2]	Yes	6
- * I	16	2Bit	Yes	None
- * J	12	2Bit	Yes	None
- * N	16	2Bit	No	IRQ_EINT
- * P	8	2Bit	Yes	8
- * R	15	4Bit[2]	Yes	8
- */
-
-static struct samsung_gpio_chip s5p6440_gpios_4bit[] = {
-#ifdef CONFIG_CPU_S5P6440
-	{
-		.chip	= {
-			.base	= S5P6440_GPA(0),
-			.ngpio	= S5P6440_GPIO_A_NR,
-			.label	= "GPA",
-		},
-	}, {
-		.chip	= {
-			.base	= S5P6440_GPB(0),
-			.ngpio	= S5P6440_GPIO_B_NR,
-			.label	= "GPB",
-		},
-	}, {
-		.chip	= {
-			.base	= S5P6440_GPC(0),
-			.ngpio	= S5P6440_GPIO_C_NR,
-			.label	= "GPC",
-		},
-	}, {
-		.base	= S5P64X0_GPG_BASE,
-		.chip	= {
-			.base	= S5P6440_GPG(0),
-			.ngpio	= S5P6440_GPIO_G_NR,
-			.label	= "GPG",
-		},
-	},
-#endif
-};
-
-static struct samsung_gpio_chip s5p6440_gpios_4bit2[] = {
-#ifdef CONFIG_CPU_S5P6440
-	{
-		.base	= S5P64X0_GPH_BASE + 0x4,
-		.chip	= {
-			.base	= S5P6440_GPH(0),
-			.ngpio	= S5P6440_GPIO_H_NR,
-			.label	= "GPH",
-		},
-	},
-#endif
-};
-
-static struct samsung_gpio_chip s5p6440_gpios_rbank[] = {
-#ifdef CONFIG_CPU_S5P6440
-	{
-		.base	= S5P64X0_GPR_BASE + 0x4,
-		.config	= &s5p64x0_gpio_cfg_rbank,
-		.chip	= {
-			.base	= S5P6440_GPR(0),
-			.ngpio	= S5P6440_GPIO_R_NR,
-			.label	= "GPR",
-		},
-	},
-#endif
-};
-
-static struct samsung_gpio_chip s5p6440_gpios_2bit[] = {
-#ifdef CONFIG_CPU_S5P6440
-	{
-		.base	= S5P64X0_GPF_BASE,
-		.config	= &samsung_gpio_cfgs[6],
-		.chip	= {
-			.base	= S5P6440_GPF(0),
-			.ngpio	= S5P6440_GPIO_F_NR,
-			.label	= "GPF",
-		},
-	}, {
-		.base	= S5P64X0_GPI_BASE,
-		.config	= &samsung_gpio_cfgs[4],
-		.chip	= {
-			.base	= S5P6440_GPI(0),
-			.ngpio	= S5P6440_GPIO_I_NR,
-			.label	= "GPI",
-		},
-	}, {
-		.base	= S5P64X0_GPJ_BASE,
-		.config	= &samsung_gpio_cfgs[4],
-		.chip	= {
-			.base	= S5P6440_GPJ(0),
-			.ngpio	= S5P6440_GPIO_J_NR,
-			.label	= "GPJ",
-		},
-	}, {
-		.base	= S5P64X0_GPN_BASE,
-		.config	= &samsung_gpio_cfgs[5],
-		.chip	= {
-			.base	= S5P6440_GPN(0),
-			.ngpio	= S5P6440_GPIO_N_NR,
-			.label	= "GPN",
-		},
-	}, {
-		.base	= S5P64X0_GPP_BASE,
-		.config	= &samsung_gpio_cfgs[6],
-		.chip	= {
-			.base	= S5P6440_GPP(0),
-			.ngpio	= S5P6440_GPIO_P_NR,
-			.label	= "GPP",
-		},
-	},
-#endif
-};
-
-/*
- * S5P6450 GPIO bank summary:
- *
- * Bank	GPIOs	Style	SlpCon	ExtInt Group
- * A	6	4Bit	Yes	1
- * B	7	4Bit	Yes	1
- * C	8	4Bit	Yes	2
- * D	8	4Bit	Yes	None
- * F	2	2Bit	Yes	None
- * G	14	4Bit[2]	Yes	5
- * H	10	4Bit[2]	Yes	6
- * I	16	2Bit	Yes	None
- * J	12	2Bit	Yes	None
- * K	5	4Bit	Yes	None
- * N	16	2Bit	No	IRQ_EINT
- * P	11	2Bit	Yes	8
- * Q	14	2Bit	Yes	None
- * R	15	4Bit[2]	Yes	None
- * S	8	2Bit	Yes	None
- *
- * [1] BANKF pins 14,15 do not form part of the external interrupt sources
- * [2] BANK has two control registers, GPxCON0 and GPxCON1
- */
-
-static struct samsung_gpio_chip s5p6450_gpios_4bit[] = {
-#ifdef CONFIG_CPU_S5P6450
-	{
-		.chip	= {
-			.base	= S5P6450_GPA(0),
-			.ngpio	= S5P6450_GPIO_A_NR,
-			.label	= "GPA",
-		},
-	}, {
-		.chip	= {
-			.base	= S5P6450_GPB(0),
-			.ngpio	= S5P6450_GPIO_B_NR,
-			.label	= "GPB",
-		},
-	}, {
-		.chip	= {
-			.base	= S5P6450_GPC(0),
-			.ngpio	= S5P6450_GPIO_C_NR,
-			.label	= "GPC",
-		},
-	}, {
-		.chip	= {
-			.base	= S5P6450_GPD(0),
-			.ngpio	= S5P6450_GPIO_D_NR,
-			.label	= "GPD",
-		},
-	}, {
-		.base	= S5P6450_GPK_BASE,
-		.chip	= {
-			.base	= S5P6450_GPK(0),
-			.ngpio	= S5P6450_GPIO_K_NR,
-			.label	= "GPK",
-		},
-	},
-#endif
-};
-
-static struct samsung_gpio_chip s5p6450_gpios_4bit2[] = {
-#ifdef CONFIG_CPU_S5P6450
-	{
-		.base	= S5P64X0_GPG_BASE + 0x4,
-		.chip	= {
-			.base	= S5P6450_GPG(0),
-			.ngpio	= S5P6450_GPIO_G_NR,
-			.label	= "GPG",
-		},
-	}, {
-		.base	= S5P64X0_GPH_BASE + 0x4,
-		.chip	= {
-			.base	= S5P6450_GPH(0),
-			.ngpio	= S5P6450_GPIO_H_NR,
-			.label	= "GPH",
-		},
-	},
-#endif
-};
-
-static struct samsung_gpio_chip s5p6450_gpios_rbank[] = {
-#ifdef CONFIG_CPU_S5P6450
-	{
-		.base	= S5P64X0_GPR_BASE + 0x4,
-		.config	= &s5p64x0_gpio_cfg_rbank,
-		.chip	= {
-			.base	= S5P6450_GPR(0),
-			.ngpio	= S5P6450_GPIO_R_NR,
-			.label	= "GPR",
-		},
-	},
-#endif
-};
-
-static struct samsung_gpio_chip s5p6450_gpios_2bit[] = {
-#ifdef CONFIG_CPU_S5P6450
-	{
-		.base	= S5P64X0_GPF_BASE,
-		.config	= &samsung_gpio_cfgs[6],
-		.chip	= {
-			.base	= S5P6450_GPF(0),
-			.ngpio	= S5P6450_GPIO_F_NR,
-			.label	= "GPF",
-		},
-	}, {
-		.base	= S5P64X0_GPI_BASE,
-		.config	= &samsung_gpio_cfgs[4],
-		.chip	= {
-			.base	= S5P6450_GPI(0),
-			.ngpio	= S5P6450_GPIO_I_NR,
-			.label	= "GPI",
-		},
-	}, {
-		.base	= S5P64X0_GPJ_BASE,
-		.config	= &samsung_gpio_cfgs[4],
-		.chip	= {
-			.base	= S5P6450_GPJ(0),
-			.ngpio	= S5P6450_GPIO_J_NR,
-			.label	= "GPJ",
-		},
-	}, {
-		.base	= S5P64X0_GPN_BASE,
-		.config	= &samsung_gpio_cfgs[5],
-		.chip	= {
-			.base	= S5P6450_GPN(0),
-			.ngpio	= S5P6450_GPIO_N_NR,
-			.label	= "GPN",
-		},
-	}, {
-		.base	= S5P64X0_GPP_BASE,
-		.config	= &samsung_gpio_cfgs[6],
-		.chip	= {
-			.base	= S5P6450_GPP(0),
-			.ngpio	= S5P6450_GPIO_P_NR,
-			.label	= "GPP",
-		},
-	}, {
-		.base	= S5P6450_GPQ_BASE,
-		.config	= &samsung_gpio_cfgs[5],
-		.chip	= {
-			.base	= S5P6450_GPQ(0),
-			.ngpio	= S5P6450_GPIO_Q_NR,
-			.label	= "GPQ",
-		},
-	}, {
-		.base	= S5P6450_GPS_BASE,
-		.config	= &samsung_gpio_cfgs[6],
-		.chip	= {
-			.base	= S5P6450_GPS(0),
-			.ngpio	= S5P6450_GPIO_S_NR,
-			.label	= "GPS",
-		},
-	},
-#endif
-};
-
-/*
  * S5PC100 GPIO bank summary:
  *
  * Bank	GPIOs	Style	INT Type

@@ -2109,24 +1681,6 @@ static __init int samsung_gpiolib_init(void)
 				S3C64XX_VA_GPIO);
 		samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2,
 				ARRAY_SIZE(s3c64xx_gpios_4bit2));
-	} else if (soc_is_s5p6440()) {
-		samsung_gpiolib_add_2bit_chips(s5p6440_gpios_2bit,
-				ARRAY_SIZE(s5p6440_gpios_2bit), NULL, 0x0);
-		samsung_gpiolib_add_4bit_chips(s5p6440_gpios_4bit,
-				ARRAY_SIZE(s5p6440_gpios_4bit), S5P_VA_GPIO);
-		samsung_gpiolib_add_4bit2_chips(s5p6440_gpios_4bit2,
-				ARRAY_SIZE(s5p6440_gpios_4bit2));
-		s5p64x0_gpiolib_add_rbank(s5p6440_gpios_rbank,
-				ARRAY_SIZE(s5p6440_gpios_rbank));
-	} else if (soc_is_s5p6450()) {
-		samsung_gpiolib_add_2bit_chips(s5p6450_gpios_2bit,
-				ARRAY_SIZE(s5p6450_gpios_2bit), NULL, 0x0);
-		samsung_gpiolib_add_4bit_chips(s5p6450_gpios_4bit,
-				ARRAY_SIZE(s5p6450_gpios_4bit), S5P_VA_GPIO);
-		samsung_gpiolib_add_4bit2_chips(s5p6450_gpios_4bit2,
-				ARRAY_SIZE(s5p6450_gpios_4bit2));
-		s5p64x0_gpiolib_add_rbank(s5p6450_gpios_rbank,
-				ARRAY_SIZE(s5p6450_gpios_rbank));
 	} else if (soc_is_s5pc100()) {
 		group = 0;
 		chip = s5pc100_gpios_4bit;
Signature · 1 line
1.7.10.4
author
#3 lore raw

PATCH 3/17 spi: s3c64xx: remove s5p64x0 related spi codes

In reply to Kukjin Kim

This patch removes s5p64x0 related spi because of no more support for s5p64x0 SoCs. Meanwhile, cleanup SPI DT bindings for s5p6440-spi, it should be s5p64x0-spi instead.

Signed-off-by Kukjin Kim <[email protected]>
Cc Mark Brown <[email protected]>
---
 Documentation/devicetree/bindings/spi/spi-samsung.txt |    1 -
 drivers/spi/spi-s3c64xx.c                             |    9 ---------
 2 files changed, 10 deletions(-)
Documentation/devicetree/bindings/spi/spi-samsung.txt +0 -1
index 86aa061..fe6f903 100644
@@ -8,7 +8,6 @@ Required SoC Specific Properties:
 - compatible: should be one of the following.
     - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
     - samsung,s3c6410-spi: for s3c6410 platforms
-    - samsung,s5p6440-spi: for s5p6440 and s5p6450 platforms
     - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
     - samsung,exynos4210-spi: for exynos4 and exynos5 platforms
drivers/spi/spi-s3c64xx.c +0 -9
index 75a5696..4a1890a 100644
@@ -1323,12 +1323,6 @@ static struct s3c64xx_spi_port_config s3c6410_spi_port_config = {
 	.tx_st_done	= 21,
 };
 
-static struct s3c64xx_spi_port_config s5p64x0_spi_port_config = {
-	.fifo_lvl_mask	= { 0x1ff, 0x7F },
-	.rx_lvl_offset	= 15,
-	.tx_st_done	= 25,
-};
-
 static struct s3c64xx_spi_port_config s5pc100_spi_port_config = {
 	.fifo_lvl_mask	= { 0x7f, 0x7F },
 	.rx_lvl_offset	= 13,

@@ -1368,9 +1362,6 @@ static struct platform_device_id s3c64xx_spi_driver_ids[] = {
 		.name		= "s3c6410-spi",
 		.driver_data	= (kernel_ulong_t)&s3c6410_spi_port_config,
 	}, {
-		.name		= "s5p64x0-spi",
-		.driver_data	= (kernel_ulong_t)&s5p64x0_spi_port_config,
-	}, {
 		.name		= "s5pc100-spi",
 		.driver_data	= (kernel_ulong_t)&s5pc100_spi_port_config,
 	}, {
Signature · 1 line
1.7.10.4
author
#4 lore raw

PATCH 4/17 ASoC: samsung: no more support for S5P6440 and S5P6450 SoCs

In reply to Kukjin Kim

This patch removes s5p64x0 related WM8580 because of removing support for s5p64x0 SoCs.

Signed-off-by Kukjin Kim <[email protected]>
Cc Mark Brown <[email protected]>
---
 sound/soc/samsung/Kconfig          |    2 +-
 sound/soc/samsung/smdk_wm8580pcm.c |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
sound/soc/samsung/Kconfig +1 -1
index 753b8c9..c639e2e 100644
@@ -63,7 +63,7 @@ config SND_SOC_SAMSUNG_JIVE_WM8750
 
 config SND_SOC_SAMSUNG_SMDK_WM8580
 	tristate "SoC I2S Audio support for WM8580 on SMDK"
-	depends on SND_SOC_SAMSUNG && (MACH_SMDK6410 || MACH_SMDKC100 || MACH_SMDK6440 || MACH_SMDK6450 || MACH_SMDKV210 || MACH_SMDKC110)
+	depends on SND_SOC_SAMSUNG && (MACH_SMDK6410 || MACH_SMDKC100 || MACH_SMDKV210 || MACH_SMDKC110)
 	depends on REGMAP_I2C
 	select SND_SOC_WM8580
 	select SND_SAMSUNG_I2S
sound/soc/samsung/smdk_wm8580pcm.c +1 -1
index e119aaa..63d0793 100644
@@ -25,7 +25,7 @@
  *  o '0' means 'OFF'
  *  o 'X' means 'Don't care'
  *
- * SMDK6410, SMDK6440, SMDK6450 Base B/D: CFG1-0000, CFG2-1111
+ * SMDK6410 Base B/D: CFG1-0000, CFG2-1111
  * SMDKC110, SMDKV210: CFGB11-100100, CFGB12-0000
  */
Signature · 1 line
1.7.10.4
author
#5 lore raw

PATCH 5/17 pwm: samsung: remove s5p64x0 related pwm codes

In reply to Kukjin Kim

This patch removes supporting s5p64x0 related pwm codes because of no more support for S5P6440 and S5P6450 SoCs. And this patch changes the name of s5p6440-pwm to exynos-pwm instead.

Signed-off-by Kukjin Kim <[email protected]>
Cc Thierry Reding <[email protected]>
---
 Documentation/devicetree/bindings/pwm/pwm-samsung.txt |    1 -
 arch/arm/boot/dts/exynos4210-universal_c210.dts       |    2 +-
 drivers/clocksource/samsung_pwm_timer.c               |   13 -------------
 drivers/pwm/pwm-samsung.c                             |    5 ++---
 4 files changed, 3 insertions(+), 18 deletions(-)
Documentation/devicetree/bindings/pwm/pwm-samsung.txt +0 -1
index 5538de9..43925d3 100644
@@ -11,7 +11,6 @@ Required properties:
 - compatible : should be one of following:
     samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
     samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-    samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs
     samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
 			  Exynos4210 rev0 SoCs
     samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
arch/arm/boot/dts/exynos4210-universal_c210.dts +1 -1
index d50eb3a..0ca26e0 100644
@@ -461,7 +461,7 @@
 	};
 
 	pwm@139D0000 {
-		compatible = "samsung,s5p6440-pwm";
+		compatible = "samsung,exynos4210-pwm";
 		status = "okay";
 	};
drivers/clocksource/samsung_pwm_timer.c +0 -13
index 5645cfc..e35a9b7 100644
@@ -480,19 +480,6 @@ static void __init s3c64xx_pwm_clocksource_init(struct device_node *np)
 }
 CLOCKSOURCE_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init);
 
-static const struct samsung_pwm_variant s5p64x0_variant = {
-	.bits		= 32,
-	.div_base	= 0,
-	.has_tint_cstat	= true,
-	.tclk_mask	= 0,
-};
-
-static void __init s5p64x0_pwm_clocksource_init(struct device_node *np)
-{
-	samsung_pwm_alloc(np, &s5p64x0_variant);
-}
-CLOCKSOURCE_OF_DECLARE(s5p6440_pwm, "samsung,s5p6440-pwm", s5p64x0_pwm_clocksource_init);
-
 static const struct samsung_pwm_variant s5p_variant = {
 	.bits		= 32,
 	.div_base	= 0,
drivers/pwm/pwm-samsung.c +2 -3
index ba6b650..68f3471 100644
@@ -404,7 +404,7 @@ static const struct samsung_pwm_variant s3c64xx_variant = {
 	.tclk_mask	= BIT(7) | BIT(6) | BIT(5),
 };
 
-static const struct samsung_pwm_variant s5p64x0_variant = {
+static const struct samsung_pwm_variant exynos4210_variant = {
 	.bits		= 32,
 	.div_base	= 0,
 	.has_tint_cstat	= true,

@@ -421,9 +421,8 @@ static const struct samsung_pwm_variant s5pc100_variant = {
 static const struct of_device_id samsung_pwm_matches[] = {
 	{ .compatible = "samsung,s3c2410-pwm", .data = &s3c24xx_variant },
 	{ .compatible = "samsung,s3c6400-pwm", .data = &s3c64xx_variant },
-	{ .compatible = "samsung,s5p6440-pwm", .data = &s5p64x0_variant },
 	{ .compatible = "samsung,s5pc100-pwm", .data = &s5pc100_variant },
-	{ .compatible = "samsung,exynos4210-pwm", .data = &s5p64x0_variant },
+	{ .compatible = "samsung,exynos4210-pwm", .data = &exynos4210_variant },
 	{},
 };
Signature · 1 line
1.7.10.4
#6 lore raw

PATCH 5/17 pwm: samsung: remove s5p64x0 related pwm codes

Hi Kukjin,

Quoted 30 lines · Kukjin Kim

This patch removes supporting s5p64x0 related pwm codes because of no more support for S5P6440 and S5P6450 SoCs. And this patch changes the name of s5p6440-pwm to exynos-pwm instead.

Signed-off-by Kukjin Kim <[email protected]>
Cc Thierry Reding <[email protected]>
---
 Documentation/devicetree/bindings/pwm/pwm-samsung.txt |    1 -
 arch/arm/boot/dts/exynos4210-universal_c210.dts       |    2 +-
 drivers/clocksource/samsung_pwm_timer.c               |   13 -------------
 drivers/pwm/pwm-samsung.c                             |    5 ++---
 4 files changed, 3 insertions(+), 18 deletions(-)
Documentation/devicetree/bindings/pwm/pwm-samsung.txt +0 -1
index 5538de9..43925d3 100644
@@ -11,7 +11,6 @@ Required properties:
 - compatible : should be one of following:
     samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
     samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-    samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs
     samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
 			  Exynos4210 rev0 SoCs
     samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
arch/arm/boot/dts/exynos4210-universal_c210.dts +0 -0
index d50eb3a..0ca26e0 100644

arch/arm/boot/dts/exynos4210-universal_c210.dts line 464

Quoted 5 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +1 -1
@@ -461,7 +461,7 @@
 	};
 
 	pwm at 139D0000 {
-		compatible = "samsung,s5p6440-pwm";
+		compatible = "samsung,exynos4210-pwm";

There is a reason to use a different compatible string for Exynos4210 rev0. The PWM block is used as a timer there, while on newer revs MCT is used. Sorry, but I have to NAK this patch.

As I explained in my reply to patch 11/17, I'd suggest keeping the PWM drivers as is, because there is no need to remove support for DT compatible strings.

Best regards,
Tomasz

author
#7 lore raw

PATCH 5/17 pwm: samsung: remove s5p64x0 related pwm codes

Quoted 2 lines · Tomasz Figa

Hi Kukjin,

Tomasz,

Quoted 33 lines · Kukjin Kim
Quoted 32 lines

This patch removes supporting s5p64x0 related pwm codes because of no more support for S5P6440 and S5P6450 SoCs. And this patch changes the name of s5p6440-pwm to exynos-pwm instead.

Signed-off-by Kukjin Kim<[email protected]>
Cc Thierry Reding<[email protected]>
---
  Documentation/devicetree/bindings/pwm/pwm-samsung.txt |    1 -
  arch/arm/boot/dts/exynos4210-universal_c210.dts       |    2 +-
  drivers/clocksource/samsung_pwm_timer.c               |   13 -------------
  drivers/pwm/pwm-samsung.c                             |    5 ++---
  4 files changed, 3 insertions(+), 18 deletions(-)
Documentation/devicetree/bindings/pwm/pwm-samsung.txt +0 -1
index 5538de9..43925d3 100644
@@ -11,7 +11,6 @@ Required properties:
  - compatible : should be one of following:
      samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
      samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-    samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs
      samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
  			  Exynos4210 rev0 SoCs
      samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
arch/arm/boot/dts/exynos4210-universal_c210.dts +0 -0
index d50eb3a..0ca26e0 100644
@@ -461,7 +461,7 @@
  	};
Quoted 8 lines

arch/arm/boot/dts/exynos4210-universal_c210.dts line 464

Quoted 3 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +1 -1
  	pwm at 139D0000 {
-		compatible = "samsung,s5p6440-pwm";
+		compatible = "samsung,exynos4210-pwm";

There is a reason to use a different compatible string for Exynos4210 rev0. The PWM block is used as a timer there, while on newer revs MCT is used. Sorry, but I have to NAK this patch.

I remember why exynos4210-universal_c210 uses PWM...OK.

Quoted 4 lines

As I explained in my reply to patch 11/17, I'd suggest keeping the PWM drivers as is, because there is no need to remove support for DT compatible strings.

OK, let me remove pwm related patches in this series but I think need to update the compatible strings, at least remove non-support SoC in doc?...

Thanks,
Kukjin

#8 lore raw

PATCH 5/17 pwm: samsung: remove s5p64x0 related pwm codes

Kukjin,

Quoted 46 lines · Kukjin Kim
Quoted 2 lines · Tomasz Figa

Hi Kukjin,

Tomasz,

Quoted 33 lines · Kukjin Kim
Quoted 32 lines

This patch removes supporting s5p64x0 related pwm codes because of no more support for S5P6440 and S5P6450 SoCs. And this patch changes the name of s5p6440-pwm to exynos-pwm instead.

Signed-off-by Kukjin Kim<[email protected]>
Cc Thierry Reding<[email protected]>
---
  Documentation/devicetree/bindings/pwm/pwm-samsung.txt |    1 -
  arch/arm/boot/dts/exynos4210-universal_c210.dts       |    2 +-
  drivers/clocksource/samsung_pwm_timer.c               |   13 -------------
  drivers/pwm/pwm-samsung.c                             |    5 ++---
  4 files changed, 3 insertions(+), 18 deletions(-)
Documentation/devicetree/bindings/pwm/pwm-samsung.txt +0 -1
index 5538de9..43925d3 100644
@@ -11,7 +11,6 @@ Required properties:
  - compatible : should be one of following:
      samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
      samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-    samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs
      samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
  			  Exynos4210 rev0 SoCs
      samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
arch/arm/boot/dts/exynos4210-universal_c210.dts +0 -0
index d50eb3a..0ca26e0 100644
@@ -461,7 +461,7 @@
  	};
Quoted 8 lines

arch/arm/boot/dts/exynos4210-universal_c210.dts line 464

Quoted 3 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +1 -1
  	pwm at 139D0000 {
-		compatible = "samsung,s5p6440-pwm";
+		compatible = "samsung,exynos4210-pwm";

There is a reason to use a different compatible string for Exynos4210 rev0. The PWM block is used as a timer there, while on newer revs MCT is used. Sorry, but I have to NAK this patch.

Quoted 8 lines

I remember why exynos4210-universal_c210 uses PWM...OK.

Quoted 4 lines

As I explained in my reply to patch 11/17, I'd suggest keeping the PWM drivers as is, because there is no need to remove support for DT compatible strings.

OK, let me remove pwm related patches in this series but I think need to update the compatible strings, at least remove non-support SoC in doc?...

Device tree bindings are defined according to the first SoC in which given hardware variant appeared and since they are stable, they should stay as is. I don't think it will have any negative effects on maintenance costs and it doesn't imply that the SoC is still supported.

(Anyway, with DT you can boot virtually any SoC, without the kernel being aware of it, as long as it supports all the necessary IP blocks.)

Best regards,
Tomasz

author
#9 lore raw

PATCH 6/17 video: fbdev: s3c-fb: remove s5p64x0 related fimd codes

In reply to Kukjin Kim

This patch removes fimd codes for s5p6440 and s5p6450 SoCs.

Signed-off-by Kukjin Kim <[email protected]>
Cc Tomi Valkeinen <[email protected]>
---
 .../devicetree/bindings/video/samsung-fimd.txt     |    1 -
 drivers/video/fbdev/Kconfig                        |    2 +-
 drivers/video/fbdev/s3c-fb.c                       |   30 --------------------
 3 files changed, 1 insertion(+), 32 deletions(-)
Documentation/devicetree/bindings/video/samsung-fimd.txt +0 -1
index 2dad41b..741f4a6 100644
@@ -8,7 +8,6 @@ Required properties:
 - compatible: value should be one of the following
 		"samsung,s3c2443-fimd"; /* for S3C24XX SoCs */
 		"samsung,s3c6400-fimd"; /* for S3C64XX SoCs */
-		"samsung,s5p6440-fimd"; /* for S5P64X0 SoCs */
 		"samsung,s5pc100-fimd"; /* for S5PC100 SoC  */
 		"samsung,s5pv210-fimd"; /* for S5PV210 SoC */
 		"samsung,exynos4210-fimd"; /* for Exynos4 SoCs */
drivers/video/fbdev/Kconfig +1 -1
index 59c98bfd..11506e5 100644
@@ -2018,7 +2018,7 @@ config FB_TMIO_ACCELL
 
 config FB_S3C
 	tristate "Samsung S3C framebuffer support"
-	depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || ARCH_S5P64X0 || \
+	depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || \
 		ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
 	select FB_CFB_FILLRECT
 	select FB_CFB_COPYAREA
drivers/video/fbdev/s3c-fb.c +0 -30
index 62acae2..a0cde41 100644
@@ -1970,33 +1970,6 @@ static struct s3c_fb_driverdata s3c_fb_data_s3c2443 = {
 	},
 };
 
-static struct s3c_fb_driverdata s3c_fb_data_s5p64x0 = {
-	.variant = {
-		.nr_windows	= 3,
-		.vidtcon	= VIDTCON0,
-		.wincon		= WINCON(0),
-		.winmap		= WINxMAP(0),
-		.keycon		= WKEYCON,
-		.osd		= VIDOSD_BASE,
-		.osd_stride	= 16,
-		.buf_start	= VIDW_BUF_START(0),
-		.buf_size	= VIDW_BUF_SIZE(0),
-		.buf_end	= VIDW_BUF_END(0),
-
-		.palette = {
-			[0] = 0x2400,
-			[1] = 0x2800,
-			[2] = 0x2c00,
-		},
-
-		.has_blendcon	= 1,
-		.has_fixvclk	= 1,
-	},
-	.win[0] = &s3c_fb_data_s5p_wins[0],
-	.win[1] = &s3c_fb_data_s5p_wins[1],
-	.win[2] = &s3c_fb_data_s5p_wins[2],
-};
-
 static struct platform_device_id s3c_fb_driver_ids[] = {
 	{
 		.name		= "s3c-fb",

@@ -2016,9 +1989,6 @@ static struct platform_device_id s3c_fb_driver_ids[] = {
 	}, {
 		.name		= "s3c2443-fb",
 		.driver_data	= (unsigned long)&s3c_fb_data_s3c2443,
-	}, {
-		.name		= "s5p64x0-fb",
-		.driver_data	= (unsigned long)&s3c_fb_data_s5p64x0,
 	},
 	{},
 };
Signature · 1 line
1.7.10.4
#10 lore raw

PATCH 6/17 video: fbdev: s3c-fb: remove s5p64x0 related fimd codes

Quoted 5 lines · Kukjin Kim

This patch removes fimd codes for s5p6440 and s5p6450 SoCs.

Signed-off-by Kukjin Kim <[email protected]>
Cc Tomi Valkeinen <[email protected]>
Acked-by Jingoo Han <[email protected]>

Best regards,
Jingoo Han

Quoted 82 lines
---
 .../devicetree/bindings/video/samsung-fimd.txt     |    1 -
 drivers/video/fbdev/Kconfig                        |    2 +-
 drivers/video/fbdev/s3c-fb.c                       |   30 --------------------
 3 files changed, 1 insertion(+), 32 deletions(-)
Documentation/devicetree/bindings/video/samsung-fimd.txt +0 -1
index 2dad41b..741f4a6 100644
@@ -8,7 +8,6 @@ Required properties:
 - compatible: value should be one of the following
 		"samsung,s3c2443-fimd"; /* for S3C24XX SoCs */
 		"samsung,s3c6400-fimd"; /* for S3C64XX SoCs */
-		"samsung,s5p6440-fimd"; /* for S5P64X0 SoCs */
 		"samsung,s5pc100-fimd"; /* for S5PC100 SoC  */
 		"samsung,s5pv210-fimd"; /* for S5PV210 SoC */
 		"samsung,exynos4210-fimd"; /* for Exynos4 SoCs */
drivers/video/fbdev/Kconfig +1 -1
index 59c98bfd..11506e5 100644
@@ -2018,7 +2018,7 @@ config FB_TMIO_ACCELL
 
 config FB_S3C
 	tristate "Samsung S3C framebuffer support"
-	depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || ARCH_S5P64X0 || \
+	depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || \
 		ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
 	select FB_CFB_FILLRECT
 	select FB_CFB_COPYAREA
drivers/video/fbdev/s3c-fb.c +0 -31
index 62acae2..a0cde41 100644
@@ -1970,33 +1970,6 @@ static struct s3c_fb_driverdata s3c_fb_data_s3c2443 = {
 	},
 };
 
-static struct s3c_fb_driverdata s3c_fb_data_s5p64x0 = {
-	.variant = {
-		.nr_windows	= 3,
-		.vidtcon	= VIDTCON0,
-		.wincon		= WINCON(0),
-		.winmap		= WINxMAP(0),
-		.keycon		= WKEYCON,
-		.osd		= VIDOSD_BASE,
-		.osd_stride	= 16,
-		.buf_start	= VIDW_BUF_START(0),
-		.buf_size	= VIDW_BUF_SIZE(0),
-		.buf_end	= VIDW_BUF_END(0),
-
-		.palette = {
-			[0] = 0x2400,
-			[1] = 0x2800,
-			[2] = 0x2c00,
-		},
-
-		.has_blendcon	= 1,
-		.has_fixvclk	= 1,
-	},
-	.win[0] = &s3c_fb_data_s5p_wins[0],
-	.win[1] = &s3c_fb_data_s5p_wins[1],
-	.win[2] = &s3c_fb_data_s5p_wins[2],
-};
-
 static struct platform_device_id s3c_fb_driver_ids[] = {
 	{
 		.name		= "s3c-fb",

@@ -2016,9 +1989,6 @@ static struct platform_device_id s3c_fb_driver_ids[] = {
 	}, {
 		.name		= "s3c2443-fb",
 		.driver_data	= (unsigned long)&s3c_fb_data_s3c2443,
-	}, {
-		.name		= "s5p64x0-fb",
-		.driver_data	= (unsigned long)&s3c_fb_data_s5p64x0,
 	},
 	{},
 };
--

1.7.10.4

#11 lore raw

PATCH 6/17 video: fbdev: s3c-fb: remove s5p64x0 related fimd codes

In reply to Kukjin Kim
Quoted 9 lines · Kukjin Kim

This patch removes fimd codes for s5p6440 and s5p6450 SoCs.

Signed-off-by Kukjin Kim <[email protected]>
Cc Tomi Valkeinen <[email protected]>
---
 .../devicetree/bindings/video/samsung-fimd.txt     |    1 -
 drivers/video/fbdev/Kconfig                        |    2 +-
 drivers/video/fbdev/s3c-fb.c                       |   30 --------------------
 3 files changed, 1 insertion(+), 32 deletions(-)

Shall I queue this and patch 15/17 via fbdev tree, or are there dependencies and the whole series should go as one?

If the latter, for this and 15/17:

Acked-by Tomi Valkeinen <[email protected]>

Tomi

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author
#12 lore raw

PATCH 7/17 serial: samsung: no more support for S5P6440 and S5P6450 SoCs

In reply to Kukjin Kim

This patch removes s5p64x0 related serial because of removing support for s5p64x0 SoCs.

Signed-off-by Kukjin Kim <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
---
 drivers/tty/serial/Kconfig   |    1 -
 drivers/tty/serial/samsung.c |    1 -
 2 files changed, 2 deletions(-)
drivers/tty/serial/Kconfig +0 -1
index fb57159..7039238 100644
@@ -238,7 +238,6 @@ config SERIAL_SAMSUNG_UARTS_4
 config SERIAL_SAMSUNG_UARTS
 	int
 	depends on PLAT_SAMSUNG
-	default 6 if CPU_S5P6450
 	default 4 if SERIAL_SAMSUNG_UARTS_4 || CPU_S3C2416
 	default 3
 	help
drivers/tty/serial/samsung.c +0 -1
index c1d3ebd..39b1219 100644
@@ -1713,7 +1713,6 @@ static struct s3c24xx_serial_drv_data s3c2440_serial_drv_data = {
 #endif
 
 #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) || \
-	defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) || \
 	defined(CONFIG_CPU_S5PC100)
 static struct s3c24xx_serial_drv_data s3c6400_serial_drv_data = {
 	.info = &(struct s3c24xx_uart_info) {
Signature · 1 line
1.7.10.4
author
#13 lore raw

PATCH 9/17 gpio: samsung: remov s5pc100 related gpio codes

In reply to Kukjin Kim

This patch removes gpio codes for s5pc100 SoC.

Signed-off-by Kukjin Kim <[email protected]>
Cc Linus Walleij <[email protected]>
---
 drivers/gpio/gpio-samsung.c |  276 -------------------------------------------
 1 file changed, 276 deletions(-)
drivers/gpio/gpio-samsung.c +0 -276
index d12945c..7d4281e 100644
@@ -1170,267 +1170,6 @@ static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = {
 };
 
 /*
- * S5PC100 GPIO bank summary:
- *
- * Bank	GPIOs	Style	INT Type
- * A0	8	4Bit	GPIO_INT0
- * A1	5	4Bit	GPIO_INT1
- * B	8	4Bit	GPIO_INT2
- * C	5	4Bit	GPIO_INT3
- * D	7	4Bit	GPIO_INT4
- * E0	8	4Bit	GPIO_INT5
- * E1	6	4Bit	GPIO_INT6
- * F0	8	4Bit	GPIO_INT7
- * F1	8	4Bit	GPIO_INT8
- * F2	8	4Bit	GPIO_INT9
- * F3	4	4Bit	GPIO_INT10
- * G0	8	4Bit	GPIO_INT11
- * G1	3	4Bit	GPIO_INT12
- * G2	7	4Bit	GPIO_INT13
- * G3	7	4Bit	GPIO_INT14
- * H0	8	4Bit	WKUP_INT
- * H1	8	4Bit	WKUP_INT
- * H2	8	4Bit	WKUP_INT
- * H3	8	4Bit	WKUP_INT
- * I	8	4Bit	GPIO_INT15
- * J0	8	4Bit	GPIO_INT16
- * J1	5	4Bit	GPIO_INT17
- * J2	8	4Bit	GPIO_INT18
- * J3	8	4Bit	GPIO_INT19
- * J4	4	4Bit	GPIO_INT20
- * K0	8	4Bit	None
- * K1	6	4Bit	None
- * K2	8	4Bit	None
- * K3	8	4Bit	None
- * L0	8	4Bit	None
- * L1	8	4Bit	None
- * L2	8	4Bit	None
- * L3	8	4Bit	None
- */
-
-static struct samsung_gpio_chip s5pc100_gpios_4bit[] = {
-#ifdef CONFIG_CPU_S5PC100
-	{
-		.chip	= {
-			.base	= S5PC100_GPA0(0),
-			.ngpio	= S5PC100_GPIO_A0_NR,
-			.label	= "GPA0",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPA1(0),
-			.ngpio	= S5PC100_GPIO_A1_NR,
-			.label	= "GPA1",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPB(0),
-			.ngpio	= S5PC100_GPIO_B_NR,
-			.label	= "GPB",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPC(0),
-			.ngpio	= S5PC100_GPIO_C_NR,
-			.label	= "GPC",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPD(0),
-			.ngpio	= S5PC100_GPIO_D_NR,
-			.label	= "GPD",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPE0(0),
-			.ngpio	= S5PC100_GPIO_E0_NR,
-			.label	= "GPE0",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPE1(0),
-			.ngpio	= S5PC100_GPIO_E1_NR,
-			.label	= "GPE1",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPF0(0),
-			.ngpio	= S5PC100_GPIO_F0_NR,
-			.label	= "GPF0",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPF1(0),
-			.ngpio	= S5PC100_GPIO_F1_NR,
-			.label	= "GPF1",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPF2(0),
-			.ngpio	= S5PC100_GPIO_F2_NR,
-			.label	= "GPF2",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPF3(0),
-			.ngpio	= S5PC100_GPIO_F3_NR,
-			.label	= "GPF3",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPG0(0),
-			.ngpio	= S5PC100_GPIO_G0_NR,
-			.label	= "GPG0",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPG1(0),
-			.ngpio	= S5PC100_GPIO_G1_NR,
-			.label	= "GPG1",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPG2(0),
-			.ngpio	= S5PC100_GPIO_G2_NR,
-			.label	= "GPG2",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPG3(0),
-			.ngpio	= S5PC100_GPIO_G3_NR,
-			.label	= "GPG3",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPI(0),
-			.ngpio	= S5PC100_GPIO_I_NR,
-			.label	= "GPI",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPJ0(0),
-			.ngpio	= S5PC100_GPIO_J0_NR,
-			.label	= "GPJ0",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPJ1(0),
-			.ngpio	= S5PC100_GPIO_J1_NR,
-			.label	= "GPJ1",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPJ2(0),
-			.ngpio	= S5PC100_GPIO_J2_NR,
-			.label	= "GPJ2",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPJ3(0),
-			.ngpio	= S5PC100_GPIO_J3_NR,
-			.label	= "GPJ3",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPJ4(0),
-			.ngpio	= S5PC100_GPIO_J4_NR,
-			.label	= "GPJ4",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPK0(0),
-			.ngpio	= S5PC100_GPIO_K0_NR,
-			.label	= "GPK0",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPK1(0),
-			.ngpio	= S5PC100_GPIO_K1_NR,
-			.label	= "GPK1",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPK2(0),
-			.ngpio	= S5PC100_GPIO_K2_NR,
-			.label	= "GPK2",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPK3(0),
-			.ngpio	= S5PC100_GPIO_K3_NR,
-			.label	= "GPK3",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPL0(0),
-			.ngpio	= S5PC100_GPIO_L0_NR,
-			.label	= "GPL0",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPL1(0),
-			.ngpio	= S5PC100_GPIO_L1_NR,
-			.label	= "GPL1",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPL2(0),
-			.ngpio	= S5PC100_GPIO_L2_NR,
-			.label	= "GPL2",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPL3(0),
-			.ngpio	= S5PC100_GPIO_L3_NR,
-			.label	= "GPL3",
-		},
-	}, {
-		.chip	= {
-			.base	= S5PC100_GPL4(0),
-			.ngpio	= S5PC100_GPIO_L4_NR,
-			.label	= "GPL4",
-		},
-	}, {
-		.base	= (S5P_VA_GPIO + 0xC00),
-		.irq_base = IRQ_EINT(0),
-		.chip	= {
-			.base	= S5PC100_GPH0(0),
-			.ngpio	= S5PC100_GPIO_H0_NR,
-			.label	= "GPH0",
-			.to_irq = samsung_gpiolib_to_irq,
-		},
-	}, {
-		.base	= (S5P_VA_GPIO + 0xC20),
-		.irq_base = IRQ_EINT(8),
-		.chip	= {
-			.base	= S5PC100_GPH1(0),
-			.ngpio	= S5PC100_GPIO_H1_NR,
-			.label	= "GPH1",
-			.to_irq = samsung_gpiolib_to_irq,
-		},
-	}, {
-		.base	= (S5P_VA_GPIO + 0xC40),
-		.irq_base = IRQ_EINT(16),
-		.chip	= {
-			.base	= S5PC100_GPH2(0),
-			.ngpio	= S5PC100_GPIO_H2_NR,
-			.label	= "GPH2",
-			.to_irq = samsung_gpiolib_to_irq,
-		},
-	}, {
-		.base	= (S5P_VA_GPIO + 0xC60),
-		.irq_base = IRQ_EINT(24),
-		.chip	= {
-			.base	= S5PC100_GPH3(0),
-			.ngpio	= S5PC100_GPIO_H3_NR,
-			.label	= "GPH3",
-			.to_irq = samsung_gpiolib_to_irq,
-		},
-	},
-#endif
-};
-
-/*
  * Followings are the gpio banks in S5PV210/S5PC110
  *
  * The 'config' member when left to NULL, is initialized to the default

@@ -1681,21 +1420,6 @@ static __init int samsung_gpiolib_init(void)
 				S3C64XX_VA_GPIO);
 		samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2,
 				ARRAY_SIZE(s3c64xx_gpios_4bit2));
-	} else if (soc_is_s5pc100()) {
-		group = 0;
-		chip = s5pc100_gpios_4bit;
-		nr_chips = ARRAY_SIZE(s5pc100_gpios_4bit);
-
-		for (i = 0; i < nr_chips; i++, chip++) {
-			if (!chip->config) {
-				chip->config = &samsung_gpio_cfgs[3];
-				chip->group = group++;
-			}
-		}
-		samsung_gpiolib_add_4bit_chips(s5pc100_gpios_4bit, nr_chips, S5P_VA_GPIO);
-#if defined(CONFIG_CPU_S5PC100) && defined(CONFIG_S5P_GPIO_INT)
-		s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR);
-#endif
 	} else if (soc_is_s5pv210()) {
 		group = 0;
 		chip = s5pv210_gpios_4bit;
Signature · 1 line
1.7.10.4
author
#15 lore raw

PATCH 10/17 spi: s3c64xx: remove s5pc100 related spi codes

In reply to Kukjin Kim

This patch removes sp5c100 related spi because of no more support s5pc100 SoC.

Signed-off-by Kukjin Kim <[email protected]>
Cc Mark Brown <[email protected]>
---
 drivers/spi/spi-s3c64xx.c |   13 -------------
 1 file changed, 13 deletions(-)
drivers/spi/spi-s3c64xx.c +0 -13
index 4a1890a..a771a3a 100644
@@ -1323,13 +1323,6 @@ static struct s3c64xx_spi_port_config s3c6410_spi_port_config = {
 	.tx_st_done	= 21,
 };
 
-static struct s3c64xx_spi_port_config s5pc100_spi_port_config = {
-	.fifo_lvl_mask	= { 0x7f, 0x7F },
-	.rx_lvl_offset	= 13,
-	.tx_st_done	= 21,
-	.high_speed	= true,
-};
-
 static struct s3c64xx_spi_port_config s5pv210_spi_port_config = {
 	.fifo_lvl_mask	= { 0x1ff, 0x7F },
 	.rx_lvl_offset	= 15,

@@ -1362,9 +1355,6 @@ static struct platform_device_id s3c64xx_spi_driver_ids[] = {
 		.name		= "s3c6410-spi",
 		.driver_data	= (kernel_ulong_t)&s3c6410_spi_port_config,
 	}, {
-		.name		= "s5pc100-spi",
-		.driver_data	= (kernel_ulong_t)&s5pc100_spi_port_config,
-	}, {
 		.name		= "s5pv210-spi",
 		.driver_data	= (kernel_ulong_t)&s5pv210_spi_port_config,
 	}, {

@@ -1381,9 +1371,6 @@ static const struct of_device_id s3c64xx_spi_dt_match[] = {
 	{ .compatible = "samsung,s3c6410-spi",
 			.data = (void *)&s3c6410_spi_port_config,
 	},
-	{ .compatible = "samsung,s5pc100-spi",
-			.data = (void *)&s5pc100_spi_port_config,
-	},
 	{ .compatible = "samsung,s5pv210-spi",
 			.data = (void *)&s5pv210_spi_port_config,
 	},
Signature · 1 line
1.7.10.4
author
#16 lore raw

PATCH 11/17 pwm: samsung: remove s5pc100 related pwm codes

In reply to Kukjin Kim

This patch removes supporting s5pc100 related pwm codes.

Signed-off-by Kukjin Kim <[email protected]>
Cc Thierry Reding <[email protected]>
---
 Documentation/devicetree/bindings/pwm/pwm-samsung.txt |    2 --
 drivers/clocksource/samsung_pwm_timer.c               |   12 ------------
 drivers/pwm/pwm-samsung.c                             |    8 --------
 3 files changed, 22 deletions(-)
Documentation/devicetree/bindings/pwm/pwm-samsung.txt +0 -2
index 43925d3..82c7f6b 100644
@@ -11,8 +11,6 @@ Required properties:
 - compatible : should be one of following:
     samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
     samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-    samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
-			  Exynos4210 rev0 SoCs
     samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
                           Exynos4x12, Exynos5250 and Exynos5420 SoCs
 - reg: base address and size of register area
drivers/clocksource/samsung_pwm_timer.c +0 -12
index e35a9b7..d846caa 100644
@@ -480,16 +480,4 @@ static void __init s3c64xx_pwm_clocksource_init(struct device_node *np)
 }
 CLOCKSOURCE_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init);
 
-static const struct samsung_pwm_variant s5p_variant = {
-	.bits		= 32,
-	.div_base	= 0,
-	.has_tint_cstat	= true,
-	.tclk_mask	= (1 << 5),
-};
-
-static void __init s5p_pwm_clocksource_init(struct device_node *np)
-{
-	samsung_pwm_alloc(np, &s5p_variant);
-}
-CLOCKSOURCE_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init);
 #endif
drivers/pwm/pwm-samsung.c +0 -8
index 68f3471..d40364a 100644
@@ -411,17 +411,9 @@ static const struct samsung_pwm_variant exynos4210_variant = {
 	.tclk_mask	= 0,
 };
 
-static const struct samsung_pwm_variant s5pc100_variant = {
-	.bits		= 32,
-	.div_base	= 0,
-	.has_tint_cstat	= true,
-	.tclk_mask	= BIT(5),
-};
-
 static const struct of_device_id samsung_pwm_matches[] = {
 	{ .compatible = "samsung,s3c2410-pwm", .data = &s3c24xx_variant },
 	{ .compatible = "samsung,s3c6400-pwm", .data = &s3c64xx_variant },
-	{ .compatible = "samsung,s5pc100-pwm", .data = &s5pc100_variant },
 	{ .compatible = "samsung,exynos4210-pwm", .data = &exynos4210_variant },
 	{},
 };
Signature · 1 line
1.7.10.4
#17 lore raw

PATCH 11/17 pwm: samsung: remove s5pc100 related pwm codes

Hi Kukjin,

Quoted 15 lines · Kukjin Kim

This patch removes supporting s5pc100 related pwm codes.

Signed-off-by Kukjin Kim <[email protected]>
Cc Thierry Reding <[email protected]>
---
 Documentation/devicetree/bindings/pwm/pwm-samsung.txt |    2 --
 drivers/clocksource/samsung_pwm_timer.c               |   12 ------------
 drivers/pwm/pwm-samsung.c                             |    8 --------
 3 files changed, 22 deletions(-)
Documentation/devicetree/bindings/pwm/pwm-samsung.txt +0 -0
index 43925d3..82c7f6b 100644

Documentation/devicetree/bindings/pwm/pwm-samsung.txt Required properties: · line 15

Quoted 5 lines
Documentation/devicetree/bindings/pwm/pwm-samsung.txt +0 -2
@@ -11,8 +11,6 @@ Required properties:
 - compatible : should be one of following:
     samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
     samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-    samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
-			  Exynos4210 rev0 SoCs

As you can see here, this variant is used for more than S5PC100. It is needed for S5PV210 and Exynos4210 rev0 SoCs as well. So this patch should be dropped.

Best regards,
Tomasz

author
#18 lore raw

PATCH 11/17 pwm: samsung: remove s5pc100 related pwm codes

Quoted 3 lines · Tomasz Figa

Hi Kukjin,

Hi,

Quoted 13 lines · Kukjin Kim

Review

Quoted 11 lines

This patch removes supporting s5pc100 related pwm codes.

Signed-off-by Kukjin Kim <[email protected]>
Cc Thierry Reding <[email protected]>
---
 Documentation/devicetree/bindings/pwm/pwm-samsung.txt |    2 --
 drivers/clocksource/samsung_pwm_timer.c               |   12 ------------
 drivers/pwm/pwm-samsung.c                             |    8 --------
 3 files changed, 22 deletions(-)
(quoted diff) +0 -0

b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt

Quoted 13 lines

Documentation/devicetree/bindings/pwm/pwm-samsung.txt Required properties: · line 15

Quoted 9 lines

index 43925d3..82c7f6b 100644

Documentation/devicetree/bindings/pwm/pwm-samsung.txt +0 -2
@@ -11,8 +11,6 @@ Required properties:
 - compatible : should be one of following:
     samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
     samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-    samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
-			  Exynos4210 rev0 SoCs

As you can see here, this variant is used for more than S5PC100. It is needed for S5PV210 and Exynos4210 rev0 SoCs as well. So this patch should be dropped.

Oh, I just now checked its datasheets and s5pv210 and early exynos4210 are using BIT(5) for tclk_mask. You're right. But I couldn't its usage in mainline when I created the patch. Anyway it can be used for s5pv210 so how about following?

pwm: samsung: change s5pc100-pwm to s5pv210-pwm for support s5pv210 SoC

Reported-by Tomasz Figa <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
Cc Thierry Reding <[email protected]>

---

Documentation/devicetree/bindings/pwm/pwm-samsung.txt +2 -2
index 43925d3..ce005c0 100644
@@ -11,8 +11,8 @@ Required properties:
 - compatible : should be one of following:
     samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
     samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-    samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
-			  Exynos4210 rev0 SoCs
+    samsung,s5pv210-pwm - for 32-bit timers present on S5PV210 and
+                          Exynos4210 rev0 SoCs
     samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
                           Exynos4x12, Exynos5250 and Exynos5420 SoCs
 - reg: base address and size of register area
drivers/clocksource/samsung_pwm_timer.c +4 -4
index e35a9b7..f0a5918 100644
@@ -480,16 +480,16 @@ static void __init s3c64xx_pwm_clocksource_init(struct device_node *np)
 }
 CLOCKSOURCE_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init);
 
-static const struct samsung_pwm_variant s5p_variant = {
+static const struct samsung_pwm_variant s5pv210_variant = {
 	.bits		= 32,
 	.div_base	= 0,
 	.has_tint_cstat	= true,
 	.tclk_mask	= (1 << 5),
 };
 
-static void __init s5p_pwm_clocksource_init(struct device_node *np)
+static void __init s5pv210_pwm_clocksource_init(struct device_node *np)
 {
-	samsung_pwm_alloc(np, &s5p_variant);
+	samsung_pwm_alloc(np, &s5pv210_variant);
 }
-CLOCKSOURCE_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init);
+CLOCKSOURCE_OF_DECLARE(s5pv210_pwm, "samsung,s5pv210-pwm", s5pv210_pwm_clocksource_init);
 #endif
drivers/pwm/pwm-samsung.c +5 -5
index 68f3471..a2bafc9 100644
@@ -404,24 +404,24 @@ static const struct samsung_pwm_variant s3c64xx_variant = {
 	.tclk_mask	= BIT(7) | BIT(6) | BIT(5),
 };
 
-static const struct samsung_pwm_variant exynos4210_variant = {
+static const struct samsung_pwm_variant s5pv210_variant = {
 	.bits		= 32,
 	.div_base	= 0,
 	.has_tint_cstat	= true,
-	.tclk_mask	= 0,
+	.tclk_mask	= BIT(5),
 };
 
-static const struct samsung_pwm_variant s5pc100_variant = {
+static const struct samsung_pwm_variant exynos4210_variant = {
 	.bits		= 32,
 	.div_base	= 0,
 	.has_tint_cstat	= true,
-	.tclk_mask	= BIT(5),
+	.tclk_mask	= 0,
 };
 
 static const struct of_device_id samsung_pwm_matches[] = {
 	{ .compatible = "samsung,s3c2410-pwm", .data = &s3c24xx_variant },
 	{ .compatible = "samsung,s3c6400-pwm", .data = &s3c64xx_variant },
-	{ .compatible = "samsung,s5pc100-pwm", .data = &s5pc100_variant },
+	{ .compatible = "samsung,s5pv210-pwm", .data = &s5pv210_variant },
 	{ .compatible = "samsung,exynos4210-pwm", .data = &exynos4210_variant },
 	{},
 };
#19 lore raw

PATCH 11/17 pwm: samsung: remove s5pc100 related pwm codes

Quoted 33 lines · Kukjin Kim
Quoted 3 lines · Tomasz Figa

Hi Kukjin,

Hi,

Quoted 13 lines · Kukjin Kim

Review

Quoted 11 lines

This patch removes supporting s5pc100 related pwm codes.

Signed-off-by Kukjin Kim <[email protected]>
Cc Thierry Reding <[email protected]>
---
 Documentation/devicetree/bindings/pwm/pwm-samsung.txt |    2 --
 drivers/clocksource/samsung_pwm_timer.c               |   12 ------------
 drivers/pwm/pwm-samsung.c                             |    8 --------
 3 files changed, 22 deletions(-)
(quoted diff) +0 -0

b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt

Quoted 13 lines

Documentation/devicetree/bindings/pwm/pwm-samsung.txt Required properties: · line 15

Quoted 9 lines

index 43925d3..82c7f6b 100644

Documentation/devicetree/bindings/pwm/pwm-samsung.txt +0 -2
@@ -11,8 +11,6 @@ Required properties:
 - compatible : should be one of following:
     samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
     samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-    samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
-			  Exynos4210 rev0 SoCs

As you can see here, this variant is used for more than S5PC100. It is needed for S5PV210 and Exynos4210 rev0 SoCs as well. So this patch should be dropped.

Quoted 4 lines

Oh, I just now checked its datasheets and s5pv210 and early exynos4210 are using BIT(5) for tclk_mask. You're right. But I couldn't its usage in mainline when I created the patch. Anyway it can be used for s5pv210 so how about following?

Hmm, sorry for the confusion, but actually this seems to be a mistake in the binding documentation. On Exynos4210 rev0, "samsung,s5p6440-pwm" is supposed to be used and "samsung,s5pc100" supports both S5PC100 and S5PV210.

However I'm not sure why you want to change existing DT bindings. The rule is to name the compatible string after first existing SoC for which it can be used, so removing support for this SoC doesn't imply removing this compatible string because it can be used for future SoCs as well, if they turn out to be compatible.

My suggestion is to keep this as it was.

Best regards,
Tomasz

author
#20 lore raw

PATCH 12/17 serial: samsung: no more support for S5PC100 SoC

In reply to Kukjin Kim

This patch removes s5pc100 related serial.

Signed-off-by Kukjin Kim <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
---
 drivers/tty/serial/samsung.c |    3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
drivers/tty/serial/samsung.c +1 -2
index 39b1219..36c7747 100644
@@ -1712,8 +1712,7 @@ static struct s3c24xx_serial_drv_data s3c2440_serial_drv_data = {
 #define S3C2440_SERIAL_DRV_DATA (kernel_ulong_t)NULL
 #endif
 
-#if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) || \
-	defined(CONFIG_CPU_S5PC100)
+#if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
 static struct s3c24xx_serial_drv_data s3c6400_serial_drv_data = {
 	.info = &(struct s3c24xx_uart_info) {
 		.name		= "Samsung S3C6400 UART",
Signature · 1 line
1.7.10.4
author
#21 lore raw

PATCH 13/17 ata: pata_samsung_cf: removes s5pc100 related ata codes

In reply to Kukjin Kim

This patch removes support for s5pc100 ata because of no more support S5PC100 SoC in mainline.

Signed-off-by Kukjin Kim <[email protected]>
Cc Tejun Heo <[email protected]>

gpio: samsung: remove s5p64x0 related gpio codes

This patch removes gpio codes for s5p6440 and s5p6450 SoCs.

---
 drivers/ata/pata_samsung_cf.c                |   13 -------------
 include/linux/platform_data/ata-samsung_cf.h |    1 -
 2 files changed, 14 deletions(-)
drivers/ata/pata_samsung_cf.c +0 -13
index fb52883..2578fc1 100644
@@ -54,7 +54,6 @@
 
 enum s3c_cpu_type {
 	TYPE_S3C64XX,
-	TYPE_S5PC100,
 	TYPE_S5PV210,
 };
 

@@ -476,10 +475,6 @@ static void pata_s3c_hwinit(struct s3c_ide_info *info,
 		writel(0x1b, info->ide_addr + S3C_ATA_IRQ_MSK);
 		break;
 
-	case TYPE_S5PC100:
-		pata_s3c_cfg_mode(info->sfr_addr);
-		/* FALLTHROUGH */
-
 	case TYPE_S5PV210:
 		/* Configure as little endian */
 		pata_s3c_set_endian(info->ide_addr, 0);

@@ -549,11 +544,6 @@ static int __init pata_s3c_probe(struct platform_device *pdev)
 		info->sfr_addr = info->ide_addr + 0x1800;
 		info->ide_addr += 0x1900;
 		info->fifo_status_reg = 0x94;
-	} else if (cpu_type == TYPE_S5PC100) {
-		ap->ops = &pata_s5p_port_ops;
-		info->sfr_addr = info->ide_addr + 0x1800;
-		info->ide_addr += 0x1900;
-		info->fifo_status_reg = 0x84;
 	} else {
 		ap->ops = &pata_s5p_port_ops;
 		info->fifo_status_reg = 0x84;

@@ -653,9 +643,6 @@ static struct platform_device_id pata_s3c_driver_ids[] = {
 		.name		= "s3c64xx-pata",
 		.driver_data	= TYPE_S3C64XX,
 	}, {
-		.name		= "s5pc100-pata",
-		.driver_data	= TYPE_S5PC100,
-	}, {
 		.name		= "s5pv210-pata",
 		.driver_data	= TYPE_S5PV210,
 	},
include/linux/platform_data/ata-samsung_cf.h +0 -1
index c2049e3..748e716 100644
@@ -29,7 +29,6 @@ extern void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata);
 
 /* architecture-specific IDE configuration */
 extern void s3c64xx_ide_setup_gpio(void);
-extern void s5pc100_ide_setup_gpio(void);
 extern void s5pv210_ide_setup_gpio(void);
 
 #endif /*__ATA_SAMSUNG_CF_H */
Signature · 1 line
1.7.10.4
Applied
#22 lore raw

PATCH 13/17 ata: pata_samsung_cf: removes s5pc100 related ata codes

Quoted 5 lines · Kukjin Kim

This patch removes support for s5pc100 ata because of no more support S5PC100 SoC in mainline.

Signed-off-by Kukjin Kim <[email protected]>
Cc Tejun Heo <[email protected]>

Applied to libata/for-3.17.

Thanks.

Signature · 1 line
tejun
author
#23 lore raw

PATCH 14/17 mtd: onenand: remove s5pc100 related onenand codes

In reply to Kukjin Kim

This patch removes s5pc100 related onenand codes because of no more support for S5PC100 SoC in mainline.

Signed-off-by Kukjin Kim <[email protected]>
Cc Kyungmin Park <[email protected]>
Cc David Woodhouse <[email protected]>
Cc Brian Norris <[email protected]>
---
 drivers/mtd/onenand/Kconfig   |    4 ++--
 drivers/mtd/onenand/samsung.c |   25 +------------------------
 2 files changed, 3 insertions(+), 26 deletions(-)
drivers/mtd/onenand/Kconfig +2 -2
index ab26072..dcae2f6 100644
@@ -32,10 +32,10 @@ config MTD_ONENAND_OMAP2
 
 config MTD_ONENAND_SAMSUNG
         tristate "OneNAND on Samsung SOC controller support"
-        depends on ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4
+        depends on ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS4
         help
           Support for a OneNAND flash device connected to an Samsung SOC.
-          S3C64XX/S5PC100 use command mapping method.
+          S3C64XX uses command mapping method.
           S5PC110/S5PC210 use generic OneNAND method.
 
 config MTD_ONENAND_OTP
drivers/mtd/onenand/samsung.c +1 -24
index efb819c..19cfb97 100644
@@ -10,7 +10,7 @@
  * published by the Free Software Foundation.
  *
  * Implementation:
- *	S3C64XX and S5PC100: emulate the pseudo BufferRAM
+ *	S3C64XX: emulate the pseudo BufferRAM
  *	S5PC110: use DMA
  */
 

@@ -32,7 +32,6 @@
 enum soc_type {
 	TYPE_S3C6400,
 	TYPE_S3C6410,
-	TYPE_S5PC100,
 	TYPE_S5PC110,
 };
 

@@ -59,7 +58,6 @@ enum soc_type {
 #define MAP_11				(0x3)
 
 #define S3C64XX_CMD_MAP_SHIFT		24
-#define S5PC100_CMD_MAP_SHIFT		26
 
 #define S3C6400_FBA_SHIFT		10
 #define S3C6400_FPA_SHIFT		4

@@ -69,10 +67,6 @@ enum soc_type {
 #define S3C6410_FPA_SHIFT		6
 #define S3C6410_FSA_SHIFT		4
 
-#define S5PC100_FBA_SHIFT		13
-#define S5PC100_FPA_SHIFT		7
-#define S5PC100_FSA_SHIFT		5
-
 /* S5PC110 specific definitions */
 #define S5PC110_DMA_SRC_ADDR		0x400
 #define S5PC110_DMA_SRC_CFG		0x404

@@ -195,11 +189,6 @@ static unsigned int s3c64xx_cmd_map(unsigned type, unsigned val)
 	return (type << S3C64XX_CMD_MAP_SHIFT) | val;
 }
 
-static unsigned int s5pc1xx_cmd_map(unsigned type, unsigned val)
-{
-	return (type << S5PC100_CMD_MAP_SHIFT) | val;
-}
-
 static unsigned int s3c6400_mem_addr(int fba, int fpa, int fsa)
 {
 	return (fba << S3C6400_FBA_SHIFT) | (fpa << S3C6400_FPA_SHIFT) |

@@ -212,12 +201,6 @@ static unsigned int s3c6410_mem_addr(int fba, int fpa, int fsa)
 		(fsa << S3C6410_FSA_SHIFT);
 }
 
-static unsigned int s5pc100_mem_addr(int fba, int fpa, int fsa)
-{
-	return (fba << S5PC100_FBA_SHIFT) | (fpa << S5PC100_FPA_SHIFT) |
-		(fsa << S5PC100_FSA_SHIFT);
-}
-
 static void s3c_onenand_reset(void)
 {
 	unsigned long timeout = 0x10000;

@@ -835,9 +818,6 @@ static void s3c_onenand_setup(struct mtd_info *mtd)
 	} else if (onenand->type == TYPE_S3C6410) {
 		onenand->mem_addr = s3c6410_mem_addr;
 		onenand->cmd_map = s3c64xx_cmd_map;
-	} else if (onenand->type == TYPE_S5PC100) {
-		onenand->mem_addr = s5pc100_mem_addr;
-		onenand->cmd_map = s5pc1xx_cmd_map;
 	} else if (onenand->type == TYPE_S5PC110) {
 		/* Use generic onenand functions */
 		this->read_bufferram = s5pc110_read_bufferram;

@@ -1111,9 +1091,6 @@ static struct platform_device_id s3c_onenand_driver_ids[] = {
 		.name		= "s3c6410-onenand",
 		.driver_data	= TYPE_S3C6410,
 	}, {
-		.name		= "s5pc100-onenand",
-		.driver_data	= TYPE_S5PC100,
-	}, {
 		.name		= "s5pc110-onenand",
 		.driver_data	= TYPE_S5PC110,
 	}, { },
Signature · 1 line
1.7.10.4
#24 lore raw

PATCH 14/17 mtd: onenand: remove s5pc100 related onenand codes

+ linux-mtd (please CC for anything driver/mtd/*; see MAINTAINERS)

Quoted 117 lines · Kukjin Kim

This patch removes s5pc100 related onenand codes because of no more support for S5PC100 SoC in mainline.

Signed-off-by Kukjin Kim <[email protected]>
Cc Kyungmin Park <[email protected]>
Cc David Woodhouse <[email protected]>
Cc Brian Norris <[email protected]>
---
 drivers/mtd/onenand/Kconfig   |    4 ++--
 drivers/mtd/onenand/samsung.c |   25 +------------------------
 2 files changed, 3 insertions(+), 26 deletions(-)
drivers/mtd/onenand/Kconfig +2 -2
index ab26072..dcae2f6 100644
@@ -32,10 +32,10 @@ config MTD_ONENAND_OMAP2
 
 config MTD_ONENAND_SAMSUNG
         tristate "OneNAND on Samsung SOC controller support"
-        depends on ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4
+        depends on ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS4
         help
           Support for a OneNAND flash device connected to an Samsung SOC.
-          S3C64XX/S5PC100 use command mapping method.
+          S3C64XX uses command mapping method.
           S5PC110/S5PC210 use generic OneNAND method.
 
 config MTD_ONENAND_OTP
drivers/mtd/onenand/samsung.c +1 -24
index efb819c..19cfb97 100644
@@ -10,7 +10,7 @@
  * published by the Free Software Foundation.
  *
  * Implementation:
- *	S3C64XX and S5PC100: emulate the pseudo BufferRAM
+ *	S3C64XX: emulate the pseudo BufferRAM
  *	S5PC110: use DMA
  */
 

@@ -32,7 +32,6 @@
 enum soc_type {
 	TYPE_S3C6400,
 	TYPE_S3C6410,
-	TYPE_S5PC100,
 	TYPE_S5PC110,
 };
 

@@ -59,7 +58,6 @@ enum soc_type {
 #define MAP_11				(0x3)
 
 #define S3C64XX_CMD_MAP_SHIFT		24
-#define S5PC100_CMD_MAP_SHIFT		26
 
 #define S3C6400_FBA_SHIFT		10
 #define S3C6400_FPA_SHIFT		4

@@ -69,10 +67,6 @@ enum soc_type {
 #define S3C6410_FPA_SHIFT		6
 #define S3C6410_FSA_SHIFT		4
 
-#define S5PC100_FBA_SHIFT		13
-#define S5PC100_FPA_SHIFT		7
-#define S5PC100_FSA_SHIFT		5
-
 /* S5PC110 specific definitions */
 #define S5PC110_DMA_SRC_ADDR		0x400
 #define S5PC110_DMA_SRC_CFG		0x404

@@ -195,11 +189,6 @@ static unsigned int s3c64xx_cmd_map(unsigned type, unsigned val)
 	return (type << S3C64XX_CMD_MAP_SHIFT) | val;
 }
 
-static unsigned int s5pc1xx_cmd_map(unsigned type, unsigned val)
-{
-	return (type << S5PC100_CMD_MAP_SHIFT) | val;
-}
-
 static unsigned int s3c6400_mem_addr(int fba, int fpa, int fsa)
 {
 	return (fba << S3C6400_FBA_SHIFT) | (fpa << S3C6400_FPA_SHIFT) |

@@ -212,12 +201,6 @@ static unsigned int s3c6410_mem_addr(int fba, int fpa, int fsa)
 		(fsa << S3C6410_FSA_SHIFT);
 }
 
-static unsigned int s5pc100_mem_addr(int fba, int fpa, int fsa)
-{
-	return (fba << S5PC100_FBA_SHIFT) | (fpa << S5PC100_FPA_SHIFT) |
-		(fsa << S5PC100_FSA_SHIFT);
-}
-
 static void s3c_onenand_reset(void)
 {
 	unsigned long timeout = 0x10000;

@@ -835,9 +818,6 @@ static void s3c_onenand_setup(struct mtd_info *mtd)
 	} else if (onenand->type == TYPE_S3C6410) {
 		onenand->mem_addr = s3c6410_mem_addr;
 		onenand->cmd_map = s3c64xx_cmd_map;
-	} else if (onenand->type == TYPE_S5PC100) {
-		onenand->mem_addr = s5pc100_mem_addr;
-		onenand->cmd_map = s5pc1xx_cmd_map;
 	} else if (onenand->type == TYPE_S5PC110) {
 		/* Use generic onenand functions */
 		this->read_bufferram = s5pc110_read_bufferram;

@@ -1111,9 +1091,6 @@ static struct platform_device_id s3c_onenand_driver_ids[] = {
 		.name		= "s3c6410-onenand",
 		.driver_data	= TYPE_S3C6410,
 	}, {
-		.name		= "s5pc100-onenand",
-		.driver_data	= TYPE_S5PC100,
-	}, {
 		.name		= "s5pc110-onenand",
 		.driver_data	= TYPE_S5PC110,
 	}, { },
Signature · 1 line
1.7.10.4
author
#25 lore raw

PATCH 15/17 video: fbdev: s3c-fb: remove s5pc100 related fimd and fb codes

In reply to Kukjin Kim

This patch removes fimd and fb codes for s5pc100 SoC.

Signed-off-by Kukjin Kim <[email protected]>
Cc Tomi Valkeinen <[email protected]>
---
 .../devicetree/bindings/video/samsung-fimd.txt     |    1 -
 drivers/video/fbdev/Kconfig                        |    2 +-
 drivers/video/fbdev/s3c-fb.c                       |   35 --------------------
 include/video/samsung_fimd.h                       |    2 +-
 4 files changed, 2 insertions(+), 38 deletions(-)
Documentation/devicetree/bindings/video/samsung-fimd.txt +0 -1
index 741f4a6..7794260 100644
@@ -8,7 +8,6 @@ Required properties:
 - compatible: value should be one of the following
 		"samsung,s3c2443-fimd"; /* for S3C24XX SoCs */
 		"samsung,s3c6400-fimd"; /* for S3C64XX SoCs */
-		"samsung,s5pc100-fimd"; /* for S5PC100 SoC  */
 		"samsung,s5pv210-fimd"; /* for S5PV210 SoC */
 		"samsung,exynos4210-fimd"; /* for Exynos4 SoCs */
 		"samsung,exynos5250-fimd"; /* for Exynos5 SoCs */
drivers/video/fbdev/Kconfig +1 -1
index 11506e5..79708b2 100644
@@ -2019,7 +2019,7 @@ config FB_TMIO_ACCELL
 config FB_S3C
 	tristate "Samsung S3C framebuffer support"
 	depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || \
-		ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
+		ARCH_S5PV210 || ARCH_EXYNOS)
 	select FB_CFB_FILLRECT
 	select FB_CFB_COPYAREA
 	select FB_CFB_IMAGEBLIT
drivers/video/fbdev/s3c-fb.c +0 -35
index a0cde41..b33abb0 100644
@@ -1805,38 +1805,6 @@ static struct s3c_fb_driverdata s3c_fb_data_64xx = {
 	.win[4]	= &s3c_fb_data_64xx_wins[4],
 };
 
-static struct s3c_fb_driverdata s3c_fb_data_s5pc100 = {
-	.variant = {
-		.nr_windows	= 5,
-		.vidtcon	= VIDTCON0,
-		.wincon		= WINCON(0),
-		.winmap		= WINxMAP(0),
-		.keycon		= WKEYCON,
-		.osd		= VIDOSD_BASE,
-		.osd_stride	= 16,
-		.buf_start	= VIDW_BUF_START(0),
-		.buf_size	= VIDW_BUF_SIZE(0),
-		.buf_end	= VIDW_BUF_END(0),
-
-		.palette = {
-			[0] = 0x2400,
-			[1] = 0x2800,
-			[2] = 0x2c00,
-			[3] = 0x3000,
-			[4] = 0x3400,
-		},
-
-		.has_prtcon	= 1,
-		.has_blendcon	= 1,
-		.has_clksel	= 1,
-	},
-	.win[0]	= &s3c_fb_data_s5p_wins[0],
-	.win[1]	= &s3c_fb_data_s5p_wins[1],
-	.win[2]	= &s3c_fb_data_s5p_wins[2],
-	.win[3]	= &s3c_fb_data_s5p_wins[3],
-	.win[4]	= &s3c_fb_data_s5p_wins[4],
-};
-
 static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = {
 	.variant = {
 		.nr_windows	= 5,

@@ -1975,9 +1943,6 @@ static struct platform_device_id s3c_fb_driver_ids[] = {
 		.name		= "s3c-fb",
 		.driver_data	= (unsigned long)&s3c_fb_data_64xx,
 	}, {
-		.name		= "s5pc100-fb",
-		.driver_data	= (unsigned long)&s3c_fb_data_s5pc100,
-	}, {
 		.name		= "s5pv210-fb",
 		.driver_data	= (unsigned long)&s3c_fb_data_s5pv210,
 	}, {
include/video/samsung_fimd.h +1 -1
index b039320..8af0c61 100644
@@ -107,7 +107,7 @@
 #define VIDCON2_ORGYCbCr			(1 << 8)
 #define VIDCON2_YUVORDCrCb			(1 << 7)
 
-/* PRTCON (S3C6410, S5PC100)
+/* PRTCON (S3C6410)
  * Might not be present in the S3C6410 documentation,
  * but tests prove it's there almost for sure; shouldn't hurt in any case.
  */
Signature · 1 line
1.7.10.4
#26 lore raw

PATCH 15/17 video: fbdev: s3c-fb: remove s5pc100 related fimd and fb codes

Quoted 5 lines · Kukjin Kim

This patch removes fimd and fb codes for s5pc100 SoC.

Signed-off-by Kukjin Kim <[email protected]>
Cc Tomi Valkeinen <[email protected]>
Acked-by Jingoo Han <[email protected]>

Best regards,
Jingoo Han

Quoted 101 lines
---
 .../devicetree/bindings/video/samsung-fimd.txt     |    1 -
 drivers/video/fbdev/Kconfig                        |    2 +-
 drivers/video/fbdev/s3c-fb.c                       |   35 --------------------
 include/video/samsung_fimd.h                       |    2 +-
 4 files changed, 2 insertions(+), 38 deletions(-)
Documentation/devicetree/bindings/video/samsung-fimd.txt +0 -1
index 741f4a6..7794260 100644
@@ -8,7 +8,6 @@ Required properties:
 - compatible: value should be one of the following
 		"samsung,s3c2443-fimd"; /* for S3C24XX SoCs */
 		"samsung,s3c6400-fimd"; /* for S3C64XX SoCs */
-		"samsung,s5pc100-fimd"; /* for S5PC100 SoC  */
 		"samsung,s5pv210-fimd"; /* for S5PV210 SoC */
 		"samsung,exynos4210-fimd"; /* for Exynos4 SoCs */
 		"samsung,exynos5250-fimd"; /* for Exynos5 SoCs */
drivers/video/fbdev/Kconfig +1 -1
index 11506e5..79708b2 100644
@@ -2019,7 +2019,7 @@ config FB_TMIO_ACCELL
 config FB_S3C
 	tristate "Samsung S3C framebuffer support"
 	depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || \
-		ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
+		ARCH_S5PV210 || ARCH_EXYNOS)
 	select FB_CFB_FILLRECT
 	select FB_CFB_COPYAREA
 	select FB_CFB_IMAGEBLIT
drivers/video/fbdev/s3c-fb.c +0 -35
index a0cde41..b33abb0 100644
@@ -1805,38 +1805,6 @@ static struct s3c_fb_driverdata s3c_fb_data_64xx = {
 	.win[4]	= &s3c_fb_data_64xx_wins[4],
 };
 
-static struct s3c_fb_driverdata s3c_fb_data_s5pc100 = {
-	.variant = {
-		.nr_windows	= 5,
-		.vidtcon	= VIDTCON0,
-		.wincon		= WINCON(0),
-		.winmap		= WINxMAP(0),
-		.keycon		= WKEYCON,
-		.osd		= VIDOSD_BASE,
-		.osd_stride	= 16,
-		.buf_start	= VIDW_BUF_START(0),
-		.buf_size	= VIDW_BUF_SIZE(0),
-		.buf_end	= VIDW_BUF_END(0),
-
-		.palette = {
-			[0] = 0x2400,
-			[1] = 0x2800,
-			[2] = 0x2c00,
-			[3] = 0x3000,
-			[4] = 0x3400,
-		},
-
-		.has_prtcon	= 1,
-		.has_blendcon	= 1,
-		.has_clksel	= 1,
-	},
-	.win[0]	= &s3c_fb_data_s5p_wins[0],
-	.win[1]	= &s3c_fb_data_s5p_wins[1],
-	.win[2]	= &s3c_fb_data_s5p_wins[2],
-	.win[3]	= &s3c_fb_data_s5p_wins[3],
-	.win[4]	= &s3c_fb_data_s5p_wins[4],
-};
-
 static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = {
 	.variant = {
 		.nr_windows	= 5,

@@ -1975,9 +1943,6 @@ static struct platform_device_id s3c_fb_driver_ids[] = {
 		.name		= "s3c-fb",
 		.driver_data	= (unsigned long)&s3c_fb_data_64xx,
 	}, {
-		.name		= "s5pc100-fb",
-		.driver_data	= (unsigned long)&s3c_fb_data_s5pc100,
-	}, {
 		.name		= "s5pv210-fb",
 		.driver_data	= (unsigned long)&s3c_fb_data_s5pv210,
 	}, {
include/video/samsung_fimd.h +1 -2
index b039320..8af0c61 100644
@@ -107,7 +107,7 @@
 #define VIDCON2_ORGYCbCr			(1 << 8)
 #define VIDCON2_YUVORDCrCb			(1 << 7)
 
-/* PRTCON (S3C6410, S5PC100)
+/* PRTCON (S3C6410)
  * Might not be present in the S3C6410 documentation,
  * but tests prove it's there almost for sure; shouldn't hurt in any case.
  */
--

1.7.10.4

author
#27 lore raw

PATCH 16/17 exynos4-is: removes s5pc100 related fimc codes

In reply to Kukjin Kim

This patch removes s5pc100 related fimc codes because of no more support S5PC100 SoC in mainline.

Signed-off-by Kukjin Kim <[email protected]>
Cc Sylwester Nawrocki <[email protected]>
Cc Mauro Carvalho Chehab <[email protected]>
---
 Documentation/video4linux/fimc.txt            |    2 +-
 drivers/media/platform/exynos4-is/fimc-core.c |   15 ---------------
 2 files changed, 1 insertion(+), 16 deletions(-)
Documentation/video4linux/fimc.txt +1 -1
index e0c6b8b..1441fcf 100644
@@ -15,7 +15,7 @@ drivers/media/platform/exynos4-is directory.
 1. Supported SoCs
 =================
 
-S5PC100 (mem-to-mem only), S5PV210, EXYNOS4210
+S5PV210, EXYNOS4210
 
 2. Supported features
 =====================
drivers/media/platform/exynos4-is/fimc-core.c +0 -15
index b70fd99..5c800b4 100644
@@ -1204,18 +1204,6 @@ static const struct fimc_variant fimc2_variant_s5pv210 = {
 	.pix_limit	 = &s5p_pix_limit[2],
 };
 
-/* S5PC100 */
-static const struct fimc_drvdata fimc_drvdata_s5p = {
-	.variant = {
-		[0] = &fimc0_variant_s5p,
-		[1] = &fimc0_variant_s5p,
-		[2] = &fimc2_variant_s5p,
-	},
-	.num_entities	= 3,
-	.lclk_frequency = 133000000UL,
-	.out_buf_count	= 4,
-};
-
 /* S5PV210, S5PC110 */
 static const struct fimc_drvdata fimc_drvdata_s5pv210 = {
 	.variant = {

@@ -1251,9 +1239,6 @@ static const struct fimc_drvdata fimc_drvdata_exynos4x12 = {
 
 static const struct platform_device_id fimc_driver_ids[] = {
 	{
-		.name		= "s5p-fimc",
-		.driver_data	= (unsigned long)&fimc_drvdata_s5p,
-	}, {
 		.name		= "s5pv210-fimc",
 		.driver_data	= (unsigned long)&fimc_drvdata_s5pv210,
 	}, {
Signature · 1 line
1.7.10.4
maintainer
#28 lore raw

PATCH 16/17 exynos4-is: removes s5pc100 related fimc codes

Quoted 2 lines · Kukjin Kim

This patch removes s5pc100 related fimc codes because of no more support S5PC100 SoC in mainline.

I have applied this patch to my tree. It's also fine if you would like to merge the whole series together. In such case feel free to add:

Acked-by Sylwester Nawrocki <[email protected]>

Please let me know if you want me to drop this patch from the media tree.

--
Regards,
Sylwester

Quoted 54 lines
Signed-off-by Kukjin Kim <[email protected]>
Cc Sylwester Nawrocki <[email protected]>
Cc Mauro Carvalho Chehab <[email protected]>
---
 Documentation/video4linux/fimc.txt            |    2 +-
 drivers/media/platform/exynos4-is/fimc-core.c |   15 ---------------
 2 files changed, 1 insertion(+), 16 deletions(-)
Documentation/video4linux/fimc.txt +1 -1
index e0c6b8b..1441fcf 100644
@@ -15,7 +15,7 @@ drivers/media/platform/exynos4-is directory.
 1. Supported SoCs
 =================
 
-S5PC100 (mem-to-mem only), S5PV210, EXYNOS4210
+S5PV210, EXYNOS4210
 
 2. Supported features
 =====================
drivers/media/platform/exynos4-is/fimc-core.c +0 -15
index b70fd99..5c800b4 100644
@@ -1204,18 +1204,6 @@ static const struct fimc_variant fimc2_variant_s5pv210 = {
 	.pix_limit	 = &s5p_pix_limit[2],
 };
 
-/* S5PC100 */
-static const struct fimc_drvdata fimc_drvdata_s5p = {
-	.variant = {
-		[0] = &fimc0_variant_s5p,
-		[1] = &fimc0_variant_s5p,
-		[2] = &fimc2_variant_s5p,
-	},
-	.num_entities	= 3,
-	.lclk_frequency = 133000000UL,
-	.out_buf_count	= 4,
-};
-
 /* S5PV210, S5PC110 */
 static const struct fimc_drvdata fimc_drvdata_s5pv210 = {
 	.variant = {

@@ -1251,9 +1239,6 @@ static const struct fimc_drvdata fimc_drvdata_exynos4x12 = {
 
 static const struct platform_device_id fimc_driver_ids[] = {
 	{
-		.name		= "s5p-fimc",
-		.driver_data	= (unsigned long)&fimc_drvdata_s5p,
-	}, {
 		.name		= "s5pv210-fimc",
 		.driver_data	= (unsigned long)&fimc_drvdata_s5pv210,
 	}, {
author
#29 lore raw

PATCH 17/17 ASoC: Samsung: remove s5pc100 related codes

In reply to Kukjin Kim

This patch removes s5pc100 related codes in
<linux/platform_data/asoc-s3c.h>.

Signed-off-by Kukjin Kim <[email protected]>
Cc Mark Brown <[email protected]>
---
 include/linux/platform_data/asoc-s3c.h |    9 ---------
 1 file changed, 9 deletions(-)
include/linux/platform_data/asoc-s3c.h +0 -9
index 709c6f7..a6591c6 100644
@@ -15,15 +15,6 @@
 #define S3C64XX_AC97_GPE  1
 extern void s3c64xx_ac97_setup_gpio(int);
 
-/*
- * The machine init code calls s5p*_spdif_setup_gpio with
- * one of these defines in order to select appropriate bank
- * of GPIO for S/PDIF pins
- */
-#define S5PC100_SPDIF_GPD  0
-#define S5PC100_SPDIF_GPG3 1
-extern void s5pc100_spdif_setup_gpio(int);
-
 struct samsung_i2s {
 /* If the Primary DAI has 5.1 Channels */
 #define QUIRK_PRI_6CHAN		(1 << 0)
Signature · 1 line
1.7.10.4
maintainer
#30 lore raw

PATCH 17/17 ASoC: Samsung: remove s5pc100 related codes

Quoted 2 lines · Kukjin Kim

This patch removes s5pc100 related codes in
<linux/platform_data/asoc-s3c.h>.

Applied, thanks.
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#31 lore raw

cover ARM: S5P64X0, S5PC100: no more support in mainline

In reply to Kukjin Kim
Quoted 4 lines · On Tuesday 01 July 2014 06:32:10 Kukjin Kim wrote:

This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree.

Acked-by Arnd Bergmann <[email protected]>

Your patch 1/17 has not made it to the mailing list, it's probably too large. Can you try recreating the patch using 'git format-patch -D'?

I'd like to see the changes to arch/arm/plat-samsung.

Arnd

#32 lore raw

cover ARM: S5P64X0, S5PC100: no more support in mainline

Quoted 7 lines · Arnd Bergmann
Quoted 4 lines · On Tuesday 01 July 2014 06:32:10 Kukjin Kim wrote:

This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree.

Acked-by Arnd Bergmann <[email protected]>

It seems like I'm not completely up-to-date. What happened to our prime directive never to remove support for boards? Why is this special? What about people that still use this hardware? The commit message says that there are no longer any users. How was this determined?

Thierry
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#33 lore raw

cover ARM: S5P64X0, S5PC100: no more support in mainline

Quoted 7 lines · On Monday 30 June 2014 16:22:25 Thierry Reding wrote:
Quoted 6 lines · Arnd Bergmann
Quoted 4 lines · On Tuesday 01 July 2014 06:32:10 Kukjin Kim wrote:

This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree.

Quoted 8 lines
Quoted 1 line
Acked-by Arnd Bergmann <[email protected]>

It seems like I'm not completely up-to-date. What happened to our prime directive never to remove support for boards? Why is this special? What about people that still use this hardware? The commit message says that there are no longer any users. How was this determined?

From what I can tell, the supported machines on these two platforms are

all the official development prototypes, not production boards, and they came out in rather small quantities, probably Samsung-internal for the most part. The maintainers have previously assured me they are not aware of anybody using it, and I trust their judgment.

I'm totally fine with removing support for these machines, and we have removed a number of similar platforms in the past. The rule is not that we never remove stuff, the rule is that we never break things for active users.

As always, if it turns out that we missed some active users, we will revert these patches, or bring support back another way.

This should probably all be spelled out explicitly in the changelog for patch 1, which I admit I have not seen.

Arnd

author
#34 lore raw

cover ARM: S5P64X0, S5PC100: no more support in mainline

Quoted 9 lines · Arnd Bergmann
Quoted 7 lines · On Monday 30 June 2014 16:22:25 Thierry Reding wrote:
Quoted 6 lines · Arnd Bergmann
Quoted 4 lines · On Tuesday 01 July 2014 06:32:10 Kukjin Kim wrote:

This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree.

Quoted 7 lines
Quoted 6 lines
Quoted 1 line
Acked-by Arnd Bergmann <[email protected]>

It seems like I'm not completely up-to-date. What happened to our prime directive never to remove support for boards? Why is this special? What about people that still use this hardware? The commit message says that there are no longer any users. How was this determined?

I asked whether we may remove its supporting in mainline before not just one time and then no objection at that time...

Quoted 6 lines

From what I can tell, the supported machines on these two platforms are all the official development prototypes, not production boards, and they came out in rather small quantities, probably Samsung-internal for the most part. The maintainers have previously assured me they are not aware of anybody using it, and I trust their judgment.

Yeah, I think so ;-)

Quoted 2 lines

I'm totally fine with removing support for these machines, and we have removed a number of similar platforms in the past. The rule is not that

S5P6442. I did commit a73ddc61 'ARM: S5P6442: Removing ARCH_S5P6442' in 2011 because that could not be mass-produced.

Quoted 3 lines

we never remove stuff, the rule is that we never break things for active users.

YES.

Quoted 3 lines

As always, if it turns out that we missed some active users, we will revert these patches, or bring support back another way.

Sure, so please let us know if you have any objection on this removing.

Quoted 3 lines

This should probably all be spelled out explicitly in the changelog for patch 1, which I admit I have not seen.

It's my fault, sorry I forgot it and I'm resending 1/17 and 8/17 with -D.

Thanks,
Kukjin

#35 lore raw

cover ARM: S5P64X0, S5PC100: no more support in mainline

In reply to Kukjin Kim
Quoted 13 lines · Kukjin Kim

This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree.

[PATCH 01/17] ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs [PATCH 02/17] gpio: samsung: remove s5p64x0 related gpio codes [PATCH 03/17] spi: s3c64xx: remove s5p64x0 related spi codes [PATCH 04/17] ASoC: samsung: no more support for S5P6440 and S5P6450 [PATCH 05/17] pwm: samsung: remove s5p64x0 related pwm codes [PATCH 06/17] video: fbdev: s3c-fb: remove s5p64x0 related fimd [PATCH 07/17] serial: samsung: no more support for S5P6440 and [PATCH 08/17] ARM: S5PC100: no more support S5PC100 SoC [PATCH 09/17] gpio: samsung: remov s5pc100 related gpio codes

Quoted 9 lines

[PATCH 10/17] spi: s3c64xx: remove s5pc100 related spi codes [PATCH 11/17] pwm: samsung: remove s5pc100 related pwm codes [PATCH 12/17] serial: samsung: no more support for S5PC100 SoC [PATCH 13/17] ata: pata_samsung_cf: removes s5pc100 related ata [PATCH 14/17] mtd: onenand: remove s5pc100 related onenand codes [PATCH 15/17] video: fbdev: s3c-fb: remove s5pc100 related fimd and [PATCH 16/17] [media] exynos4-is: removes s5pc100 related fimc codes [PATCH 17/17] ASoC: Samsung: remove s5pc100 related codes

One more reference to S5PC100 can be found at drivers/irqchip/Kconfig.

drivers/irqchip/Kconfig +0 -1
index 131f185..9f39cc6 100644
@@ -23,7 +23,6 @@ config ARM_VIC
 config ARM_VIC_NR
        int
        default 4 if ARCH_S5PV210
-       default 3 if ARCH_S5PC100
        default 2
        depends on ARM_VIC
        help
Quoted 7 lines

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Signature · 1 line
Tushar Behera
author
#36 lore raw

cover ARM: S5P64X0, S5PC100: no more support in mainline

Quoted 32 lines · Tushar Behera
Quoted 13 lines · Kukjin Kim

This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree.

[PATCH 01/17] ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs [PATCH 02/17] gpio: samsung: remove s5p64x0 related gpio codes [PATCH 03/17] spi: s3c64xx: remove s5p64x0 related spi codes [PATCH 04/17] ASoC: samsung: no more support for S5P6440 and S5P6450 [PATCH 05/17] pwm: samsung: remove s5p64x0 related pwm codes [PATCH 06/17] video: fbdev: s3c-fb: remove s5p64x0 related fimd [PATCH 07/17] serial: samsung: no more support for S5P6440 and [PATCH 08/17] ARM: S5PC100: no more support S5PC100 SoC [PATCH 09/17] gpio: samsung: remov s5pc100 related gpio codes

Quoted 9 lines

[PATCH 10/17] spi: s3c64xx: remove s5pc100 related spi codes [PATCH 11/17] pwm: samsung: remove s5pc100 related pwm codes [PATCH 12/17] serial: samsung: no more support for S5PC100 SoC [PATCH 13/17] ata: pata_samsung_cf: removes s5pc100 related ata [PATCH 14/17] mtd: onenand: remove s5pc100 related onenand codes [PATCH 15/17] video: fbdev: s3c-fb: remove s5pc100 related fimd and [PATCH 16/17] [media] exynos4-is: removes s5pc100 related fimc codes [PATCH 17/17] ASoC: Samsung: remove s5pc100 related codes

One more reference to S5PC100 can be found at drivers/irqchip/Kconfig.

drivers/irqchip/Kconfig +0 -0
index 131f185..9f39cc6 100644

drivers/irqchip/Kconfig config ARM_VIC · line 28

Quoted 7 lines
drivers/irqchip/Kconfig +0 -1
@@ -23,7 +23,6 @@ config ARM_VIC
 config ARM_VIC_NR
        int
        default 4 if ARCH_S5PV210
-       default 3 if ARCH_S5PC100
        default 2
        depends on ARM_VIC
        help

Tushar, thanks.

BTW, it should be included in 8/17 patch. But not shown in mailing list because of
big changes so I'm resending 1/17 and 8/17 now after re-creating as per Arnd's suggestion.

Thanks,
Kukjin

#37 lore raw

cover ARM: S5P64X0, S5PC100: no more support in mainline

In reply to Kukjin Kim

Hi Kukjin,

Quoted 13 lines · Kukjin Kim

This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree.

[PATCH 01/17] ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs [PATCH 02/17] gpio: samsung: remove s5p64x0 related gpio codes [PATCH 03/17] spi: s3c64xx: remove s5p64x0 related spi codes [PATCH 04/17] ASoC: samsung: no more support for S5P6440 and S5P6450 [PATCH 05/17] pwm: samsung: remove s5p64x0 related pwm codes [PATCH 06/17] video: fbdev: s3c-fb: remove s5p64x0 related fimd [PATCH 07/17] serial: samsung: no more support for S5P6440 and [PATCH 08/17] ARM: S5PC100: no more support S5PC100 SoC [PATCH 09/17] gpio: samsung: remov s5pc100 related gpio codes

Quoted 8 lines

[PATCH 10/17] spi: s3c64xx: remove s5pc100 related spi codes [PATCH 11/17] pwm: samsung: remove s5pc100 related pwm codes [PATCH 12/17] serial: samsung: no more support for S5PC100 SoC [PATCH 13/17] ata: pata_samsung_cf: removes s5pc100 related ata [PATCH 14/17] mtd: onenand: remove s5pc100 related onenand codes [PATCH 15/17] video: fbdev: s3c-fb: remove s5pc100 related fimd and [PATCH 16/17] [media] exynos4-is: removes s5pc100 related fimc codes [PATCH 17/17] ASoC: Samsung: remove s5pc100 related codes

Thanks for this series.

Just letting you know that I have rebased my s5pv210 DT migration series on top of this and will be sending the patches after some more testing.

Best regards,
Tomasz

author
#38 lore raw

cover ARM: S5P64X0, S5PC100: no more support in mainline

Quoted 2 lines · Tomasz Figa

Hi Kukjin,

Hi,

Quoted 23 lines · Kukjin Kim
Quoted 13 lines

This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree.

[PATCH 01/17] ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs [PATCH 02/17] gpio: samsung: remove s5p64x0 related gpio codes [PATCH 03/17] spi: s3c64xx: remove s5p64x0 related spi codes [PATCH 04/17] ASoC: samsung: no more support for S5P6440 and S5P6450 [PATCH 05/17] pwm: samsung: remove s5p64x0 related pwm codes [PATCH 06/17] video: fbdev: s3c-fb: remove s5p64x0 related fimd [PATCH 07/17] serial: samsung: no more support for S5P6440 and [PATCH 08/17] ARM: S5PC100: no more support S5PC100 SoC [PATCH 09/17] gpio: samsung: remov s5pc100 related gpio codes

Quoted 8 lines

[PATCH 10/17] spi: s3c64xx: remove s5pc100 related spi codes [PATCH 11/17] pwm: samsung: remove s5pc100 related pwm codes [PATCH 12/17] serial: samsung: no more support for S5PC100 SoC [PATCH 13/17] ata: pata_samsung_cf: removes s5pc100 related ata [PATCH 14/17] mtd: onenand: remove s5pc100 related onenand codes [PATCH 15/17] video: fbdev: s3c-fb: remove s5pc100 related fimd and [PATCH 16/17] [media] exynos4-is: removes s5pc100 related fimc codes [PATCH 17/17] ASoC: Samsung: remove s5pc100 related codes

Quoted 5 lines

Thanks for this series.

Just letting you know that I have rebased my s5pv210 DT migration series on top of this and will be sending the patches after some more testing.

Just note since I've missed one more change in the series, I amended it just now but it should be fine with your series I think.

Please see v3.17-next/cleanup-s5p branch.

Thanks for your support for s5pv210 dt migration.

- Kukjin

#39 lore raw

cover ARM: S5P64X0, S5PC100: no more support in mainline

Hi Kukjin,

Quoted 34 lines · Kukjin Kim
Quoted 3 lines · Tomasz Figa

Hi Kukjin,

Hi,

Quoted 27 lines · Kukjin Kim
Quoted 14 lines

This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree.

[PATCH 01/17] ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs [PATCH 02/17] gpio: samsung: remove s5p64x0 related gpio codes [PATCH 03/17] spi: s3c64xx: remove s5p64x0 related spi codes [PATCH 04/17] ASoC: samsung: no more support for S5P6440 and S5P6450 [PATCH 05/17] pwm: samsung: remove s5p64x0 related pwm codes [PATCH 06/17] video: fbdev: s3c-fb: remove s5p64x0 related fimd [PATCH 07/17] serial: samsung: no more support for S5P6440 and [PATCH 08/17] ARM: S5PC100: no more support S5PC100 SoC [PATCH 09/17] gpio: samsung: remov s5pc100 related gpio codes

Quoted 8 lines

[PATCH 10/17] spi: s3c64xx: remove s5pc100 related spi codes [PATCH 11/17] pwm: samsung: remove s5pc100 related pwm codes [PATCH 12/17] serial: samsung: no more support for S5PC100 SoC [PATCH 13/17] ata: pata_samsung_cf: removes s5pc100 related ata [PATCH 14/17] mtd: onenand: remove s5pc100 related onenand codes [PATCH 15/17] video: fbdev: s3c-fb: remove s5pc100 related fimd and [PATCH 16/17] [media] exynos4-is: removes s5pc100 related fimc codes [PATCH 17/17] ASoC: Samsung: remove s5pc100 related codes

Thanks for this series.

Quoted 7 lines
Quoted 3 lines

Just letting you know that I have rebased my s5pv210 DT migration series on top of this and will be sending the patches after some more testing.

Just note since I've missed one more change in the series, I amended it just now but it should be fine with your series I think.

Please see v3.17-next/cleanup-s5p branch.

Can you please push out the other patches that you applied last week?

Thanks.

Signature · 2 lines
Regards,
Sachin.
author
#40 lore raw

cover ARM: S5P64X0, S5PC100: no more support in mainline

Quoted 3 lines · Sachin Kamat

Hi Kukjin,

Hi,

Quoted 38 lines · Kukjin Kim
Quoted 37 lines · Tomasz Figa
Quoted 3 lines

Hi Kukjin,

Hi,

Quoted 30 lines · Kukjin Kim
Quoted 14 lines

This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree.

[PATCH 01/17] ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs [PATCH 02/17] gpio: samsung: remove s5p64x0 related gpio codes [PATCH 03/17] spi: s3c64xx: remove s5p64x0 related spi codes [PATCH 04/17] ASoC: samsung: no more support for S5P6440 and S5P6450 [PATCH 05/17] pwm: samsung: remove s5p64x0 related pwm codes [PATCH 06/17] video: fbdev: s3c-fb: remove s5p64x0 related fimd [PATCH 07/17] serial: samsung: no more support for S5P6440 and [PATCH 08/17] ARM: S5PC100: no more support S5PC100 SoC [PATCH 09/17] gpio: samsung: remov s5pc100 related gpio codes

Quoted 8 lines

[PATCH 10/17] spi: s3c64xx: remove s5pc100 related spi codes [PATCH 11/17] pwm: samsung: remove s5pc100 related pwm codes [PATCH 12/17] serial: samsung: no more support for S5PC100 SoC [PATCH 13/17] ata: pata_samsung_cf: removes s5pc100 related ata [PATCH 14/17] mtd: onenand: remove s5pc100 related onenand codes [PATCH 15/17] video: fbdev: s3c-fb: remove s5pc100 related fimd and [PATCH 16/17] [media] exynos4-is: removes s5pc100 related fimc codes [PATCH 17/17] ASoC: Samsung: remove s5pc100 related codes

Thanks for this series.

Just letting you know that I have rebased my s5pv210 DT migration series on top of this and will be sending the patches after some more testing.

Quoted 7 lines
Quoted 4 lines

Just note since I've missed one more change in the series, I amended it just now but it should be fine with your series I think.

Please see v3.17-next/cleanup-s5p branch.

Can you please push out the other patches that you applied last week?

You mean whole patches in this series? OK, I will in this weekend. Note, as you know, missing patches in my tree are handled by other maintainer.

Thanks,
Kukjin