ARM: at91: move aic driver to drivers/irqchips

PATCH Superseded Boris BREZILLON 4 participants 25 messages Jun 20, 2014 – Jul 9, 2014

Subsystems (6)

Device tree bindings Arm (32-bit) Arm sub-architectures Arm/Microchip (AT91) SoC support +2 more subsystems

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Boris BREZILLON

author

2014-06-20 15:01 UTC #0 lore raw

v3 cover ARM: at91: move aic driver to drivers/irqchips

Hello,

This series moves the AIC driver to the irqchip directory and make use of the generic chip framework whenever possible.

This driver only support DT boards (all legacy board files should be soon replaced by their DT versions).

Best Regards,

Boris

Changes since v2:
- remove irq line muxing definition
- rework Kconfig options

Changes since v1:
- rework the irq-mux bindings

Boris BREZILLON (7):
genirq: generic chip: export irq_map_generic_chip function
irqchip: atmel-aic: move binding doc to interrupt-controller directory
irqchip: atmel-aic: add new atmel AIC driver
ARM: at91: introduce OLD_IRQ_AT91 Kconfig option
ARM: at91: enclose at91_aic_xx calls in
IS_ENABLED(CONFIG_OLD_IRQ_AT91) blocks
ARM: at91: make use of the new AIC driver for dt enabled boards
ARM: at91: remove old irq material

 .../devicetree/bindings/arm/atmel-aic.txt          |  42 --
 .../bindings/interrupt-controller/atmel,aic.txt    |  42 ++
 arch/arm/mach-at91/Kconfig                         |  17 +-
 arch/arm/mach-at91/Kconfig.non_dt                  |   6 +
 arch/arm/mach-at91/Makefile                        |   3 +-
 arch/arm/mach-at91/board-dt-rm9200.c               |  13 -
 arch/arm/mach-at91/board-dt-sam9.c                 |  13 -
 arch/arm/mach-at91/board-dt-sama5.c                |  13 -
 arch/arm/mach-at91/irq.c                           | 270 +-------
 arch/arm/mach-at91/pm.c                            |  32 +-
 arch/arm/mach-at91/setup.c                         |   3 +-
 drivers/irqchip/Kconfig                            |   7 +
 drivers/irqchip/Makefile                           |   1 +
 drivers/irqchip/irq-atmel-aic.c                    | 700 +++++++++++++++++++++
 include/linux/irq.h                                |   2 +
 kernel/irq/generic-chip.c                          |   5 +-
 16 files changed, 800 insertions(+), 369 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/atmel-aic.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt
 create mode 100644 drivers/irqchip/irq-atmel-aic.c

Signature · 1 line

1.8.3.2

Boris BREZILLON

author

2014-06-20 15:01 UTC #1 lore raw

PATCH v3 1/7 genirq: generic chip: export irq_map_generic_chip function

Export the generic irq map function in order to provide irq_domain ops with generic mapping and specific of xlate function (needed by the new atmel AIC driver).

Signed-off-by Boris BREZILLON <[email protected]>

---
 include/linux/irq.h       | 2 ++
 kernel/irq/generic-chip.c | 5 +++--
 2 files changed, 5 insertions(+), 2 deletions(-)

include/linux/irq.h +2 -0

index 0d998d8..62af592 100644
@@ -771,6 +771,8 @@ void irq_gc_eoi(struct irq_data *d);
 int irq_gc_set_wake(struct irq_data *d, unsigned int on);
 
 /* Setup functions for irq_chip_generic */
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq);
 struct irq_chip_generic *
 irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
 		       void __iomem *reg_base, irq_flow_handler_t handler);

kernel/irq/generic-chip.c +3 -2

index 452d6f2..cf80e7b 100644
@@ -341,8 +341,8 @@ static struct lock_class_key irq_nested_lock_class;
 /*
  * irq_map_generic_chip - Map a generic chip for an irq domain
  */
-static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
-				irq_hw_number_t hw_irq)
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq)
 {
 	struct irq_data *data = irq_get_irq_data(virq);
 	struct irq_domain_chip_generic *dgc = d->gc;

@@ -394,6 +394,7 @@ static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
 	irq_modify_status(virq, dgc->irq_flags_to_clear, dgc->irq_flags_to_set);
 	return 0;
 }
+EXPORT_SYMBOL_GPL(irq_map_generic_chip);
 
 struct irq_domain_ops irq_generic_chip_ops = {
 	.map	= irq_map_generic_chip,

Signature · 1 line

1.8.3.2

Jason Cooper

2014-06-21 23:51 UTC #2 lore raw

PATCH v3 1/7 genirq: generic chip: export irq_map_generic_chip function

Quoted 39 lines · Boris BREZILLON

Export the generic irq map function in order to provide irq_domain ops with generic mapping and specific of xlate function (needed by the new atmel AIC driver).

Signed-off-by Boris BREZILLON <[email protected]>

---
 include/linux/irq.h       | 2 ++
 kernel/irq/generic-chip.c | 5 +++--
 2 files changed, 5 insertions(+), 2 deletions(-)

include/linux/irq.h +2 -0

index 0d998d8..62af592 100644
@@ -771,6 +771,8 @@ void irq_gc_eoi(struct irq_data *d);
 int irq_gc_set_wake(struct irq_data *d, unsigned int on);
 
 /* Setup functions for irq_chip_generic */
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq);
 struct irq_chip_generic *
 irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
 		       void __iomem *reg_base, irq_flow_handler_t handler);

kernel/irq/generic-chip.c +2 -2

index 452d6f2..cf80e7b 100644
@@ -341,8 +341,8 @@ static struct lock_class_key irq_nested_lock_class;
 /*
  * irq_map_generic_chip - Map a generic chip for an irq domain
  */
-static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
-				irq_hw_number_t hw_irq)
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq)
 {
 	struct irq_data *data = irq_get_irq_data(virq);
 	struct irq_domain_chip_generic *dgc = d->gc;

kernel/irq/generic-chip.c static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq, · line 400

Quoted 7 lines

kernel/irq/generic-chip.c +1 -0

@@ -394,6 +394,7 @@ static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
 	irq_modify_status(virq, dgc->irq_flags_to_clear, dgc->irq_flags_to_set);
 	return 0;
 }
+EXPORT_SYMBOL_GPL(irq_map_generic_chip);
 
 struct irq_domain_ops irq_generic_chip_ops = {
 	.map	= irq_map_generic_chip,

Why can't you use irq_generic_chip_ops.map in your code and avoid this patch entirely?

thx,

Jason.

Boris BREZILLON

author

2014-06-22 07:59 UTC #3 lore raw

PATCH v3 1/7 genirq: generic chip: export irq_map_generic_chip function

Quoted 45 lines · Jason Cooper

Quoted 44 lines · Boris BREZILLON

Export the generic irq map function in order to provide irq_domain ops with generic mapping and specific of xlate function (needed by the new atmel AIC driver).

Signed-off-by Boris BREZILLON <[email protected]>

---
 include/linux/irq.h       | 2 ++
 kernel/irq/generic-chip.c | 5 +++--
 2 files changed, 5 insertions(+), 2 deletions(-)

include/linux/irq.h +2 -0

index 0d998d8..62af592 100644
@@ -771,6 +771,8 @@ void irq_gc_eoi(struct irq_data *d);
 int irq_gc_set_wake(struct irq_data *d, unsigned int on);
 
 /* Setup functions for irq_chip_generic */
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq);
 struct irq_chip_generic *
 irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
 		       void __iomem *reg_base, irq_flow_handler_t handler);

kernel/irq/generic-chip.c +3 -2

index 452d6f2..cf80e7b 100644
@@ -341,8 +341,8 @@ static struct lock_class_key irq_nested_lock_class;
 /*
  * irq_map_generic_chip - Map a generic chip for an irq domain
  */
-static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
-				irq_hw_number_t hw_irq)
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq)
 {
 	struct irq_data *data = irq_get_irq_data(virq);
 	struct irq_domain_chip_generic *dgc = d->gc;

@@ -394,6 +394,7 @@ static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
 	irq_modify_status(virq, dgc->irq_flags_to_clear, dgc->irq_flags_to_set);
 	return 0;
 }
+EXPORT_SYMBOL_GPL(irq_map_generic_chip);

Quoted 4 lines

kernel/irq/generic-chip.c static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq, · line 400
Quoted 2 lines
kernel/irq/generic-chip.c +0 -0
 struct irq_domain_ops irq_generic_chip_ops = {
 	.map	= irq_map_generic_chip,
Why can't you use irq_generic_chip_ops.map in your code and avoid this patch entirely?

Because in this case I'll have to remove constness from my irq_domain_ops struct and initialize it in my init function. This is not a big concern, but in general I tend to declare ops struct with a const constraint.

Tell me if you still want me to drop this patch and rework my init process.

Best Regards,

Boris

Signature · 3 lines

Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Jason Cooper

2014-06-23 13:07 UTC #4 lore raw

PATCH v3 1/7 genirq: generic chip: export irq_map_generic_chip function

Quoted 47 lines · Boris BREZILLON

Quoted 45 lines · Jason Cooper

Quoted 44 lines · Boris BREZILLON

Export the generic irq map function in order to provide irq_domain ops with generic mapping and specific of xlate function (needed by the new atmel AIC driver).

Signed-off-by Boris BREZILLON <[email protected]>

---
 include/linux/irq.h       | 2 ++
 kernel/irq/generic-chip.c | 5 +++--
 2 files changed, 5 insertions(+), 2 deletions(-)

include/linux/irq.h +2 -0

index 0d998d8..62af592 100644
@@ -771,6 +771,8 @@ void irq_gc_eoi(struct irq_data *d);
 int irq_gc_set_wake(struct irq_data *d, unsigned int on);
 
 /* Setup functions for irq_chip_generic */
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq);
 struct irq_chip_generic *
 irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
 		       void __iomem *reg_base, irq_flow_handler_t handler);

kernel/irq/generic-chip.c +3 -2

index 452d6f2..cf80e7b 100644
@@ -341,8 +341,8 @@ static struct lock_class_key irq_nested_lock_class;
 /*
  * irq_map_generic_chip - Map a generic chip for an irq domain
  */
-static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
-				irq_hw_number_t hw_irq)
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq)
 {
 	struct irq_data *data = irq_get_irq_data(virq);
 	struct irq_domain_chip_generic *dgc = d->gc;

@@ -394,6 +394,7 @@ static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
 	irq_modify_status(virq, dgc->irq_flags_to_clear, dgc->irq_flags_to_set);
 	return 0;
 }
+EXPORT_SYMBOL_GPL(irq_map_generic_chip);

Quoted 3 lines

Quoted 3 lines
kernel/irq/generic-chip.c static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq, · line 400
Quoted 2 lines
kernel/irq/generic-chip.c +0 -0
 struct irq_domain_ops irq_generic_chip_ops = {
 	.map	= irq_map_generic_chip,
Why can't you use irq_generic_chip_ops.map in your code and avoid this

s/code/declaration/, sorry for the misunderstanding.

Quoted 6 lines

Quoted 1 line
patch entirely?
Because in this case I'll have to remove constness from my irq_domain_ops struct and initialize it in my init function. This is not a big concern, but in general I tend to declare ops struct with a const constraint.

/*
* We're the only user of irq_map_generic_chip() who
* doesn't also use irq_domain_xlate_onetwocell() */
static const struct irq_domain_ops aic_irq_ops = {
.map = irq_generic_chip_ops.map,
.xlate = aic_irq_domain_xlate,
};

Wouldn't work?

Quoted 1 line

Tell me if you still want me to drop this patch and rework my init process.

If the above is satisfactory for you, please do so. If we get a few more chips that need one function, but not the other, then we'll revisit what we're exporting. The comment should bring the issue up in a future grep.

thx,

Jason.

Boris BREZILLON

author

2014-06-23 15:07 UTC #5 lore raw

PATCH v3 1/7 genirq: generic chip: export irq_map_generic_chip function

Quoted 66 lines · Jason Cooper

Quoted 46 lines · Boris BREZILLON
Quoted 45 lines · Jason Cooper
Quoted 44 lines · Boris BREZILLON
Export the generic irq map function in order to provide irq_domain ops with generic mapping and specific of xlate function (needed by the new atmel AIC driver).
Signed-off-by Boris BREZILLON <[email protected]>
---
 include/linux/irq.h       | 2 ++
 kernel/irq/generic-chip.c | 5 +++--
 2 files changed, 5 insertions(+), 2 deletions(-)
include/linux/irq.h +2 -0
index 0d998d8..62af592 100644
@@ -771,6 +771,8 @@ void irq_gc_eoi(struct irq_data *d);
 int irq_gc_set_wake(struct irq_data *d, unsigned int on);
 
 /* Setup functions for irq_chip_generic */
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq);
 struct irq_chip_generic *
 irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
 		       void __iomem *reg_base, irq_flow_handler_t handler);
kernel/irq/generic-chip.c +3 -2
index 452d6f2..cf80e7b 100644
@@ -341,8 +341,8 @@ static struct lock_class_key irq_nested_lock_class;
 /*
  * irq_map_generic_chip - Map a generic chip for an irq domain
  */
-static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
-				irq_hw_number_t hw_irq)
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq)
 {
 	struct irq_data *data = irq_get_irq_data(virq);
 	struct irq_domain_chip_generic *dgc = d->gc;
@@ -394,6 +394,7 @@ static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
 	irq_modify_status(virq, dgc->irq_flags_to_clear, dgc->irq_flags_to_set);
 	return 0;
 }
+EXPORT_SYMBOL_GPL(irq_map_generic_chip);
 
Quoted 3 lines
Quoted 3 lines
kernel/irq/generic-chip.c static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq, · line 400
Quoted 2 lines
kernel/irq/generic-chip.c +0 -0
 struct irq_domain_ops irq_generic_chip_ops = {
 	.map	= irq_map_generic_chip,
Why can't you use irq_generic_chip_ops.map in your code and avoid this
s/code/declaration/, sorry for the misunderstanding.
Quoted 5 lines
Quoted 1 line
patch entirely?
Because in this case I'll have to remove constness from my irq_domain_ops struct and initialize it in my init function. This is not a big concern, but in general I tend to declare ops struct with a const constraint.
/*
* We're the only user of irq_map_generic_chip() who
* doesn't also use irq_domain_xlate_onetwocell() */
static const struct irq_domain_ops aic_irq_ops = {
.map = irq_generic_chip_ops.map,
.xlate = aic_irq_domain_xlate,
};

Quoted 1 line

Wouldn't work?

No, it fails with :

"error: initializer element is not constant"

Quoted 10 lines

Quoted 2 lines
Tell me if you still want me to drop this patch and rework my init process.
If the above is satisfactory for you, please do so. If we get a few more chips that need one function, but not the other, then we'll revisit what we're exporting. The comment should bring the issue up in a future grep.
thx,
Jason.

Signature · 3 lines

Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Jason Cooper

2014-06-23 17:50 UTC #6 lore raw

PATCH v3 1/7 genirq: generic chip: export irq_map_generic_chip function

Quoted 68 lines · Boris BREZILLON

Quoted 66 lines · Jason Cooper
Quoted 46 lines · Boris BREZILLON
Quoted 45 lines · Jason Cooper
Quoted 44 lines · Boris BREZILLON
Export the generic irq map function in order to provide irq_domain ops with generic mapping and specific of xlate function (needed by the new atmel AIC driver).
Signed-off-by Boris BREZILLON <[email protected]>
---
 include/linux/irq.h       | 2 ++
 kernel/irq/generic-chip.c | 5 +++--
 2 files changed, 5 insertions(+), 2 deletions(-)
include/linux/irq.h +2 -0
index 0d998d8..62af592 100644
@@ -771,6 +771,8 @@ void irq_gc_eoi(struct irq_data *d);
 int irq_gc_set_wake(struct irq_data *d, unsigned int on);
 
 /* Setup functions for irq_chip_generic */
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq);
 struct irq_chip_generic *
 irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
 		       void __iomem *reg_base, irq_flow_handler_t handler);
kernel/irq/generic-chip.c +3 -2
index 452d6f2..cf80e7b 100644
@@ -341,8 +341,8 @@ static struct lock_class_key irq_nested_lock_class;
 /*
  * irq_map_generic_chip - Map a generic chip for an irq domain
  */
-static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
-				irq_hw_number_t hw_irq)
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq)
 {
 	struct irq_data *data = irq_get_irq_data(virq);
 	struct irq_domain_chip_generic *dgc = d->gc;
@@ -394,6 +394,7 @@ static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
 	irq_modify_status(virq, dgc->irq_flags_to_clear, dgc->irq_flags_to_set);
 	return 0;
 }
+EXPORT_SYMBOL_GPL(irq_map_generic_chip);
 
Quoted 3 lines
Quoted 3 lines
kernel/irq/generic-chip.c static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq, · line 400
Quoted 2 lines
kernel/irq/generic-chip.c +0 -0
 struct irq_domain_ops irq_generic_chip_ops = {
 	.map	= irq_map_generic_chip,
Why can't you use irq_generic_chip_ops.map in your code and avoid this
s/code/declaration/, sorry for the misunderstanding.
Quoted 5 lines
Quoted 1 line
patch entirely?
Because in this case I'll have to remove constness from my irq_domain_ops struct and initialize it in my init function. This is not a big concern, but in general I tend to declare ops struct with a const constraint.
/*
* We're the only user of irq_map_generic_chip() who
* doesn't also use irq_domain_xlate_onetwocell() */
static const struct irq_domain_ops aic_irq_ops = {
.map = irq_generic_chip_ops.map,
.xlate = aic_irq_domain_xlate,
};

Quoted 5 lines

Quoted 1 line
Wouldn't work?
No, it fails with :
"error: initializer element is not constant"

Gah! Of course. That's what I get for pseudo-coding without sufficient coffee. :)

I won't have a chance to dig deeper into this until tonight or the next few days. But my primary concern is that they chose to export the struct for a reason. I'd like to dig through the history and find out why.

Assuming there's no big reason not to export the function(s) directly, I'm fine with exporting them. But it would be nice to get Thomas' Ack before I take the original patch since it touches core code.

thx,

Jason.

Boris BREZILLON

author

2014-06-23 20:10 UTC #7 lore raw

PATCH v3 1/7 genirq: generic chip: export irq_map_generic_chip function

Quoted 71 lines · Jason Cooper

Quoted 70 lines · Boris BREZILLON
Quoted 66 lines · Jason Cooper
Quoted 46 lines · Boris BREZILLON
Quoted 45 lines · Jason Cooper
Quoted 44 lines · Boris BREZILLON
Export the generic irq map function in order to provide irq_domain ops with generic mapping and specific of xlate function (needed by the new atmel AIC driver).
Signed-off-by Boris BREZILLON <[email protected]>
---
 include/linux/irq.h       | 2 ++
 kernel/irq/generic-chip.c | 5 +++--
 2 files changed, 5 insertions(+), 2 deletions(-)
include/linux/irq.h +2 -0
index 0d998d8..62af592 100644
@@ -771,6 +771,8 @@ void irq_gc_eoi(struct irq_data *d);
 int irq_gc_set_wake(struct irq_data *d, unsigned int on);
 
 /* Setup functions for irq_chip_generic */
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq);
 struct irq_chip_generic *
 irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
 		       void __iomem *reg_base, irq_flow_handler_t handler);
kernel/irq/generic-chip.c +3 -2
index 452d6f2..cf80e7b 100644
@@ -341,8 +341,8 @@ static struct lock_class_key irq_nested_lock_class;
 /*
  * irq_map_generic_chip - Map a generic chip for an irq domain
  */
-static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
-				irq_hw_number_t hw_irq)
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq)
 {
 	struct irq_data *data = irq_get_irq_data(virq);
 	struct irq_domain_chip_generic *dgc = d->gc;
@@ -394,6 +394,7 @@ static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
 	irq_modify_status(virq, dgc->irq_flags_to_clear, dgc->irq_flags_to_set);
 	return 0;
 }
+EXPORT_SYMBOL_GPL(irq_map_generic_chip);
 
Quoted 3 lines
Quoted 3 lines
kernel/irq/generic-chip.c static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq, · line 400
Quoted 2 lines
kernel/irq/generic-chip.c +0 -0
 struct irq_domain_ops irq_generic_chip_ops = {
 	.map	= irq_map_generic_chip,
Why can't you use irq_generic_chip_ops.map in your code and avoid this
s/code/declaration/, sorry for the misunderstanding.
Quoted 5 lines
Quoted 1 line
patch entirely?
Because in this case I'll have to remove constness from my irq_domain_ops struct and initialize it in my init function. This is not a big concern, but in general I tend to declare ops struct with a const constraint.
/*
* We're the only user of irq_map_generic_chip() who
* doesn't also use irq_domain_xlate_onetwocell() */
static const struct irq_domain_ops aic_irq_ops = {
.map = irq_generic_chip_ops.map,
.xlate = aic_irq_domain_xlate,
};
Quoted 1 line
Wouldn't work?
No, it fails with :

Quoted 8 lines

Quoted 1 line
"error: initializer element is not constant"
Gah! Of course. That's what I get for pseudo-coding without sufficient coffee. :)
I won't have a chance to dig deeper into this until tonight or the next few days. But my primary concern is that they chose to export the struct for a reason. I'd like to dig through the history and find out why.

IMHO exporting both (the struct and the functions independently) makes sense.
The struct can be used by drivers that have a standard behaviour for both xslate and map functions, and functions (irq_map_generic_chip or irq_domain_xlate_onetwocell) could be used when only one end of the implementation is standard.

BTW, shouldn't we declare irq_generic_chip_ops as a const instance to prevent users from modifying its content ?

Quoted 4 lines

Assuming there's no big reason not to export the function(s) directly, I'm fine with exporting them. But it would be nice to get Thomas' Ack before I take the original patch since it touches core code.

Sure.

Thanks for your help.

Best Regards,

Boris

Signature · 3 lines

Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Jason Cooper

2014-06-23 22:14 UTC #8 lore raw

PATCH v3 1/7 genirq: generic chip: export irq_map_generic_chip function

Quoted 1 line · Jason Cooper

...

Quoted 4 lines

Quoted 4 lines
I won't have a chance to dig deeper into this until tonight or the next few days. But my primary concern is that they chose to export the struct for a reason. I'd like to dig through the history and find out why.

Ok, I took a look. It seems that was the most expedient way to implement the linear domain registration. No mention of avoiding exporting the functions directly. :)

thx,

Jason.

Jason Cooper

2014-06-23 22:17 UTC #9 lore raw

PATCH v3 1/7 genirq: generic chip: export irq_map_generic_chip function

In reply to Boris BREZILLON

Thomas,

Would you mind Acking this and letting me know how you'd like me to handle it? It's a build requirement for the rest of the series, but it's in core code.

I can do a separate topic branch for you or just merge it in with irqchip/core. Whichever is easiest for you.

Quoted 49 lines · Boris BREZILLON

Export the generic irq map function in order to provide irq_domain ops with generic mapping and specific of xlate function (needed by the new atmel AIC driver).

Signed-off-by Boris BREZILLON <[email protected]>

---
 include/linux/irq.h       | 2 ++
 kernel/irq/generic-chip.c | 5 +++--
 2 files changed, 5 insertions(+), 2 deletions(-)

include/linux/irq.h +2 -0

index 0d998d8..62af592 100644
@@ -771,6 +771,8 @@ void irq_gc_eoi(struct irq_data *d);
 int irq_gc_set_wake(struct irq_data *d, unsigned int on);
 
 /* Setup functions for irq_chip_generic */
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq);
 struct irq_chip_generic *
 irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
 		       void __iomem *reg_base, irq_flow_handler_t handler);

kernel/irq/generic-chip.c +3 -2

index 452d6f2..cf80e7b 100644
@@ -341,8 +341,8 @@ static struct lock_class_key irq_nested_lock_class;
 /*
  * irq_map_generic_chip - Map a generic chip for an irq domain
  */
-static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
-				irq_hw_number_t hw_irq)
+int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
+			 irq_hw_number_t hw_irq)
 {
 	struct irq_data *data = irq_get_irq_data(virq);
 	struct irq_domain_chip_generic *dgc = d->gc;

@@ -394,6 +394,7 @@ static int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
 	irq_modify_status(virq, dgc->irq_flags_to_clear, dgc->irq_flags_to_set);
 	return 0;
 }
+EXPORT_SYMBOL_GPL(irq_map_generic_chip);
 
 struct irq_domain_ops irq_generic_chip_ops = {
 	.map	= irq_map_generic_chip,

Signature · 1 line

1.8.3.2

thx,

Jason.

Thomas Gleixner

2014-06-23 22:40 UTC #10 lore raw

PATCH v3 1/7 genirq: generic chip: export irq_map_generic_chip function

Quoted 8 lines · Jason Cooper

Thomas,
Would you mind Acking this and letting me know how you'd like me to handle it? It's a build requirement for the rest of the series, but it's in core code.
I can do a separate topic branch for you or just merge it in with irqchip/core. Whichever is easiest for you.

Just keep it in the series.

Acked-by Thomas Gleixner <[email protected]>

Boris BREZILLON

author

2014-06-20 15:01 UTC #11 lore raw

PATCH v3 2/7 irqchip: atmel-aic: move binding doc to interrupt-controller directory

In reply to Boris BREZILLON

Move atmel aic driver doc to the interrupt-controller directory as the new driver now lays in drivers/irqchip/atmel-aic.c.

Signed-off-by Boris BREZILLON <[email protected]>

---
 .../devicetree/bindings/arm/atmel-aic.txt          | 42 ----------------------
 .../bindings/interrupt-controller/atmel,aic.txt    | 42 ++++++++++++++++++++++
 2 files changed, 42 insertions(+), 42 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/atmel-aic.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt

Documentation/devicetree/bindings/arm/atmel-aic.txt deleted +0 ~~-42~~

deleted file mode 100644
index 2742e9c..0000000
@@ -1,42 +0,0 @@
-* Advanced Interrupt Controller (AIC)
-
-Required properties:
-- compatible: Should be "atmel,<chip>-aic"
-  <chip> can be "at91rm9200" or "sama5d3"
-- interrupt-controller: Identifies the node as an interrupt controller.
-- interrupt-parent: For single AIC system, it is an empty property.
-- #interrupt-cells: The number of cells to define the interrupts. It should be 3.
-  The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).
-  The second cell is used to specify flags:
-    bits[3:0] trigger type and level flags:
-      1 = low-to-high edge triggered.
-      2 = high-to-low edge triggered.
-      4 = active high level-sensitive.
-      8 = active low level-sensitive.
-      Valid combinations are 1, 2, 3, 4, 8.
-      Default flag for internal sources should be set to 4 (active high).
-  The third cell is used to specify the irq priority from 0 (lowest) to 7
-  (highest).
-- reg: Should contain AIC registers location and length
-- atmel,external-irqs: u32 array of external irqs.
-
-Examples:
-	/*
-	 * AIC
-	 */
-	aic: interrupt-controller at fffff000 {
-		compatible = "atmel,at91rm9200-aic";
-		interrupt-controller;
-		interrupt-parent;
-		#interrupt-cells = <3>;
-		reg = <0xfffff000 0x200>;
-	};
-
-	/*
-	 * An interrupt generating device that is wired to an AIC.
-	 */
-	dma: dma-controller at ffffec00 {
-		compatible = "atmel,at91sam9g45-dma";
-		reg = <0xffffec00 0x200>;
-		interrupts = <21 4 5>;
-	};

Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt new file +42 -0

42 lines not on this page · raw message

Signature · 1 line

1.8.3.2

Boris BREZILLON

author

2014-06-20 15:01 UTC #12 lore raw

PATCH v3 3/7 irqchip: atmel-aic: add new atmel AIC driver

In reply to Boris BREZILLON

Add new atmel AIC (Advanced Interrupt Controller) driver based on the generic chip infrastructure.

This driver is only compatible with dt enabled board and replaces the old implementation found in arch/arm/mach-at91/irq.c.

Signed-off-by Boris BREZILLON <[email protected]>

---
 drivers/irqchip/Kconfig         |   7 +
 drivers/irqchip/Makefile        |   1 +
 drivers/irqchip/irq-atmel-aic.c | 700 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 708 insertions(+)
 create mode 100644 drivers/irqchip/irq-atmel-aic.c

drivers/irqchip/Kconfig +7 -0

index bbb746e..6a7ad81 100644
@@ -30,6 +30,13 @@ config ARM_VIC_NR
 	  The maximum number of VICs available in the system, for
 	  power management.
 
+config ATMEL_AIC_IRQ
+	bool
+	select GENERIC_IRQ_CHIP
+	select IRQ_DOMAIN
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+
 config BRCMSTB_L2_IRQ
 	bool
 	depends on ARM

drivers/irqchip/Makefile +1 -0

index 62a13e5..c60929c 100644
@@ -18,6 +18,7 @@ obj-$(CONFIG_ARCH_SPEAR3XX)		+= spear-shirq.o
 obj-$(CONFIG_ARM_GIC)			+= irq-gic.o
 obj-$(CONFIG_ARM_NVIC)			+= irq-nvic.o
 obj-$(CONFIG_ARM_VIC)			+= irq-vic.o
+obj-$(CONFIG_ATMEL_AIC_IRQ)		+= irq-atmel-aic.o
 obj-$(CONFIG_IMGPDC_IRQ)		+= irq-imgpdc.o
 obj-$(CONFIG_SIRF_IRQ)			+= irq-sirfsoc.o
 obj-$(CONFIG_RENESAS_INTC_IRQPIN)	+= irq-renesas-intc-irqpin.o

drivers/irqchip/irq-atmel-aic.c new file +700 -0

700 lines not on this page · raw message

Signature · 1 line

1.8.3.2

Boris BREZILLON

author

2014-06-22 20:56 UTC #13 lore raw

PATCH v3 3/7 irqchip: atmel-aic: add new atmel AIC driver

Quoted 22 lines · Boris BREZILLON

Add new atmel AIC (Advanced Interrupt Controller) driver based on the generic chip infrastructure.
This driver is only compatible with dt enabled board and replaces the old implementation found in arch/arm/mach-at91/irq.c.
Signed-off-by Boris BREZILLON <[email protected]>
---
 drivers/irqchip/Kconfig         |   7 +
 drivers/irqchip/Makefile        |   1 +
 drivers/irqchip/irq-atmel-aic.c | 700 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 708 insertions(+)
 create mode 100644 drivers/irqchip/irq-atmel-aic.c
drivers/irqchip/Kconfig +0 -0
index bbb746e..6a7ad81 100644
@@ -30,6 +30,13 @@ config ARM_VIC_NR
 	  The maximum number of VICs available in the system, for
 	  power management.
 

[...]

drivers/irqchip/Kconfig

Quoted 2 lines

drivers/irqchip/Kconfig +2 -0

+
+static int at91_aic_common_irq_domain_xlate(struct irq_domain *d,

This function should be named aic_common_irq_domain_xslate to be consistent with other function names.
I'll fix that for the next version.

Best Regards,

Boris

Signature · 3 lines

Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Jason Cooper

2014-06-24 12:56 UTC #14 lore raw

PATCH v3 3/7 irqchip: atmel-aic: add new atmel AIC driver

Boris,

Quoted 27 lines · Boris BREZILLON

Quoted 22 lines · Boris BREZILLON
Add new atmel AIC (Advanced Interrupt Controller) driver based on the generic chip infrastructure.
This driver is only compatible with dt enabled board and replaces the old implementation found in arch/arm/mach-at91/irq.c.
Signed-off-by Boris BREZILLON <[email protected]>
---
 drivers/irqchip/Kconfig         |   7 +
 drivers/irqchip/Makefile        |   1 +
 drivers/irqchip/irq-atmel-aic.c | 700 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 708 insertions(+)
 create mode 100644 drivers/irqchip/irq-atmel-aic.c
drivers/irqchip/Kconfig +0 -0
index bbb746e..6a7ad81 100644
@@ -30,6 +30,13 @@ config ARM_VIC_NR
 	  The maximum number of VICs available in the system, for
 	  power management.
 
[...]

Quoted 6 lines

drivers/irqchip/Kconfig
Quoted 2 lines
drivers/irqchip/Kconfig +2 -0
+
+static int at91_aic_common_irq_domain_xlate(struct irq_domain *d,
This function should be named aic_common_irq_domain_xslate to be consistent with other function names.
I'll fix that for the next version.

Other than this one change, this series looks good wrt to irqchip. When you respin, please adjust the patch subject lines like so:

irqchip: atmel-aic: Add new atmel AIC driver

Note the capitalization. Also, if you could add Thomas' Ack to the first patch, that would be appreciated.

Once you post the new series, I assume it's ok to apply patches 1-3 to irqchip/core, or are there some dependency considerations?

thx,

Jason.

Boris BREZILLON

author

2014-06-24 16:14 UTC #15 lore raw

PATCH v3 3/7 irqchip: atmel-aic: add new atmel AIC driver

Hello Jason,

Quoted 33 lines · Jason Cooper

Boris,
Quoted 25 lines · Boris BREZILLON
Quoted 22 lines · Boris BREZILLON
Add new atmel AIC (Advanced Interrupt Controller) driver based on the generic chip infrastructure.
This driver is only compatible with dt enabled board and replaces the old implementation found in arch/arm/mach-at91/irq.c.
Signed-off-by Boris BREZILLON <[email protected]>
---
 drivers/irqchip/Kconfig         |   7 +
 drivers/irqchip/Makefile        |   1 +
 drivers/irqchip/irq-atmel-aic.c | 700 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 708 insertions(+)
 create mode 100644 drivers/irqchip/irq-atmel-aic.c
drivers/irqchip/Kconfig +0 -0
index bbb746e..6a7ad81 100644
@@ -30,6 +30,13 @@ config ARM_VIC_NR
 	  The maximum number of VICs available in the system, for
 	  power management.
 
[...]
Quoted 5 lines
drivers/irqchip/Kconfig
Quoted 2 lines
drivers/irqchip/Kconfig +2 -0
+
+static int at91_aic_common_irq_domain_xlate(struct irq_domain *d,
This function should be named aic_common_irq_domain_xslate to be consistent with other function names.
I'll fix that for the next version.

Quoted 7 lines

Other than this one change, this series looks good wrt to irqchip. When you respin, please adjust the patch subject lines like so:
irqchip: atmel-aic: Add new atmel AIC driver
Note the capitalization. Also, if you could add Thomas' Ack to the first patch, that would be appreciated.

Sure, I'll fix the commit message and add Thomas' ack.

Quoted 3 lines

Once you post the new series, I assume it's ok to apply patches 1-3 to irqchip/core, or are there some dependency considerations?

Patches 6 and 7 depend on the 3 first patches, but we should be able to merge them through the at91/arm-soc tree (Nicolas might have to rebase its tree for 3.17 on irqchip/core after you have applied patches 1-3).

Anyway, I'd like to wait for at91 maintainers/developers reviews before posting a new version.

Thanks for your support on this series.

Best Regards,

Boris

Signature · 3 lines

Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Jason Cooper

2014-06-24 20:00 UTC #16 lore raw

PATCH v3 3/7 irqchip: atmel-aic: add new atmel AIC driver

Quoted 1 line · Boris BREZILLON

On 24/06/2014 14:56, Jason Cooper wrote:

...

Quoted 6 lines

Quoted 2 lines
Once you post the new series, I assume it's ok to apply patches 1-3 to irqchip/core, or are there some dependency considerations?
Patches 6 and 7 depend on the 3 first patches, but we should be able to merge them through the at91/arm-soc tree (Nicolas might have to rebase its tree for 3.17 on irqchip/core after you have applied patches 1-3).

I'll create a topic branch for you when the time comes. That way arm-soc doesn't have to pull in any code it doesn't actually need (helps with for-next testing).

Please give me a gentle reminder in the coverletter or comments when you send the next version.

Quoted 2 lines

Anyway, I'd like to wait for at91 maintainers/developers reviews before posting a new version.

Sure.

thx,

Jason.

Boris BREZILLON

author

2014-06-26 20:20 UTC #17 lore raw

PATCH v3 3/7 irqchip: atmel-aic: add new atmel AIC driver

In reply to Boris BREZILLON

Quoted 19 lines · Boris BREZILLON

Add new atmel AIC (Advanced Interrupt Controller) driver based on the generic chip infrastructure.
This driver is only compatible with dt enabled board and replaces the old implementation found in arch/arm/mach-at91/irq.c.
Signed-off-by Boris BREZILLON <[email protected]>
---
 drivers/irqchip/Kconfig         |   7 +
 drivers/irqchip/Makefile        |   1 +
 drivers/irqchip/irq-atmel-aic.c | 700 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 708 insertions(+)
 create mode 100644 drivers/irqchip/irq-atmel-aic.c
drivers/irqchip/Kconfig +0 -0
index bbb746e..6a7ad81 100644

drivers/irqchip/Kconfig config ARM_VIC_NR · line 39

Quoted 10 lines

drivers/irqchip/Kconfig +7 -0

@@ -30,6 +30,13 @@ config ARM_VIC_NR
 	  The maximum number of VICs available in the system, for
 	  power management.
 
+config ATMEL_AIC_IRQ
+	bool
+	select GENERIC_IRQ_CHIP
+	select IRQ_DOMAIN
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+

I just though a bit about it and it might be better to split AIC and AIC5 support in 2 different drivers, because the AIC is only available on at91sam9/at91rm9200 SoCs and AIC5 only available on sama5 SoCs, and AFAICT there is no combination of both controller in a singler SoC.

Jason, Thomas, let me know if you think this worth the trouble, and if so, should I keep a common implementation (in irq-atmel-aic-common.c/.h) for the shared functions/structures.

Best Regards,

Boris

Signature · 3 lines

Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Jason Cooper

2014-06-26 20:30 UTC #18 lore raw

PATCH v3 3/7 irqchip: atmel-aic: add new atmel AIC driver

Quoted 37 lines · Boris BREZILLON

Quoted 19 lines · Boris BREZILLON
Add new atmel AIC (Advanced Interrupt Controller) driver based on the generic chip infrastructure.
This driver is only compatible with dt enabled board and replaces the old implementation found in arch/arm/mach-at91/irq.c.
Signed-off-by Boris BREZILLON <[email protected]>
---
 drivers/irqchip/Kconfig         |   7 +
 drivers/irqchip/Makefile        |   1 +
 drivers/irqchip/irq-atmel-aic.c | 700 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 708 insertions(+)
 create mode 100644 drivers/irqchip/irq-atmel-aic.c
drivers/irqchip/Kconfig +0 -0
index bbb746e..6a7ad81 100644
drivers/irqchip/Kconfig config ARM_VIC_NR · line 39
Quoted 10 lines
drivers/irqchip/Kconfig +7 -0
@@ -30,6 +30,13 @@ config ARM_VIC_NR
 	  The maximum number of VICs available in the system, for
 	  power management.
 
+config ATMEL_AIC_IRQ
+	bool
+	select GENERIC_IRQ_CHIP
+	select IRQ_DOMAIN
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+
I just though a bit about it and it might be better to split AIC and AIC5 support in 2 different drivers, because the AIC is only available on at91sam9/at91rm9200 SoCs and AIC5 only available on sama5 SoCs, and AFAICT there is no combination of both controller in a singler SoC.

Quoted 3 lines

Jason, Thomas, let me know if you think this worth the trouble, and if so, should I keep a common implementation (in irq-atmel-aic-common.c/.h) for the shared functions/structures.

It sounds sensible, and we have a similar situation brewing with the gic family. I'd like to hear from the at91 maintainers, though.

thx,

Jason.

Nicolas Ferre

2014-07-09 16:38 UTC #19 lore raw

PATCH v3 3/7 irqchip: atmel-aic: add new atmel AIC driver

On 26/06/2014 22:30, Jason Cooper :

Quoted 38 lines · Boris BREZILLON

Quoted 37 lines · Boris BREZILLON
Quoted 19 lines
Add new atmel AIC (Advanced Interrupt Controller) driver based on the generic chip infrastructure.
This driver is only compatible with dt enabled board and replaces the old implementation found in arch/arm/mach-at91/irq.c.
Signed-off-by Boris BREZILLON <[email protected]>
---
 drivers/irqchip/Kconfig         |   7 +
 drivers/irqchip/Makefile        |   1 +
 drivers/irqchip/irq-atmel-aic.c | 700 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 708 insertions(+)
 create mode 100644 drivers/irqchip/irq-atmel-aic.c
drivers/irqchip/Kconfig +0 -0
index bbb746e..6a7ad81 100644
drivers/irqchip/Kconfig config ARM_VIC_NR · line 39
Quoted 10 lines
drivers/irqchip/Kconfig +7 -0
@@ -30,6 +30,13 @@ config ARM_VIC_NR
 	  The maximum number of VICs available in the system, for
 	  power management.
 
+config ATMEL_AIC_IRQ
+	bool
+	select GENERIC_IRQ_CHIP
+	select IRQ_DOMAIN
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+
I just though a bit about it and it might be better to split AIC and AIC5 support in 2 different drivers, because the AIC is only available on at91sam9/at91rm9200 SoCs and AIC5 only available on sama5 SoCs, and AFAICT there is no combination of both controller in a singler SoC.

Quoted 6 lines

Quoted 3 lines
Jason, Thomas, let me know if you think this worth the trouble, and if so, should I keep a common implementation (in irq-atmel-aic-common.c/.h) for the shared functions/structures.
It sounds sensible, and we have a similar situation brewing with the gic family. I'd like to hear from the at91 maintainers, though.

Absolutely Boris and Jason. Re-reading the new AIC code it seems obvious to split the 2 drivers, now that we have a nice framework in place, no extra code is needed appart from both form of irq chip implementation.

Let's go this way. And of course, you have on the whole series my:

Acked-by Nicolas Ferre <[email protected]>

Thanks, bye,

Signature · 1 line

Nicolas Ferre

Boris BREZILLON

author

2014-06-20 15:01 UTC #20 lore raw

PATCH v3 4/7 ARM: at91: introduce OLD_IRQ_AT91 Kconfig option

In reply to Boris BREZILLON

Introduce the OLD_IRQ_AT91 Kconfig option to prepare migration to the new AIC driver.

Select this option for all at91 SoCs and all available boards so that we can later move DT enabled boards to the new irq driver and keep the old implementation when legacy boards are selected.

Signed-off-by Boris BREZILLON <[email protected]>

---
 arch/arm/mach-at91/Kconfig        | 17 +++++++++--------
 arch/arm/mach-at91/Kconfig.non_dt |  6 ++++++
 arch/arm/mach-at91/Makefile       |  3 ++-
 3 files changed, 17 insertions(+), 9 deletions(-)

arch/arm/mach-at91/Kconfig +9 -8

index 45b55e0..fbc1b68 100644
@@ -28,6 +28,11 @@ config OLD_CLK_AT91
 	bool
 	default AT91_PMC_UNIT && AT91_USE_OLD_CLK
 
+config OLD_IRQ_AT91
+	bool
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+
 config AT91_SAM9_ALT_RESET
 	bool
 	default !ARCH_AT91X40

@@ -47,16 +52,12 @@ config SOC_AT91SAM9
 	select AT91_SAM9_TIME
 	select CPU_ARM926T
 	select GENERIC_CLOCKEVENTS
-	select MULTI_IRQ_HANDLER
-	select SPARSE_IRQ
 
 config SOC_SAMA5
 	bool
 	select AT91_SAM9_TIME
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
-	select MULTI_IRQ_HANDLER
-	select SPARSE_IRQ
 	select USE_OF
 
 menu "Atmel AT91 System-on-Chip"

@@ -70,8 +71,7 @@ config ARCH_AT91X40
 	depends on !MMU
 	select CPU_ARM7TDMI
 	select ARCH_USES_GETTIMEOFFSET
-	select MULTI_IRQ_HANDLER
-	select SPARSE_IRQ
+	select OLD_IRQ_AT91
 
 	help
 	  Select this if you are using one of Atmel's AT91X40 SoC.

@@ -111,8 +111,6 @@ config SOC_AT91RM9200
 	select CPU_ARM920T
 	select GENERIC_CLOCKEVENTS
 	select HAVE_AT91_DBGU0
-	select MULTI_IRQ_HANDLER
-	select SPARSE_IRQ
 	select AT91_USE_OLD_CLK
 	select HAVE_AT91_USB_CLK

@@ -200,6 +198,7 @@ config MACH_AT91RM9200_DT
 	bool "Atmel AT91RM9200 Evaluation Kits with device-tree support"
 	depends on SOC_AT91RM9200
 	select USE_OF
+	select OLD_IRQ_AT91
 	help
 	  Select this if you want to experiment device-tree with
 	  an Atmel RM9200 Evaluation Kit.

@@ -208,6 +207,7 @@ config MACH_AT91SAM9_DT
 	bool "Atmel AT91SAM Evaluation Kits with device-tree support"
 	depends on SOC_AT91SAM9
 	select USE_OF
+	select OLD_IRQ_AT91
 	help
 	  Select this if you want to experiment device-tree with
 	  an Atmel Evaluation Kit.

@@ -216,6 +216,7 @@ config MACH_SAMA5_DT
 	bool "Atmel SAMA5 Evaluation Kits with device-tree support"
 	depends on SOC_SAMA5
 	select USE_OF
+	select OLD_IRQ_AT91
 	select PHYLIB if NETDEVICES
 	help
 	  Select this if you want to experiment device-tree with

arch/arm/mach-at91/Kconfig.non_dt +6 -0

index 44ace32..b774c3d 100644
@@ -14,31 +14,37 @@ config ARCH_AT91RM9200
 	bool "AT91RM9200"
 	select SOC_AT91RM9200
 	select AT91_USE_OLD_CLK
+	select OLD_IRQ_AT91
 
 config ARCH_AT91SAM9260
 	bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20"
 	select SOC_AT91SAM9260
 	select AT91_USE_OLD_CLK
+	select OLD_IRQ_AT91
 
 config ARCH_AT91SAM9261
 	bool "AT91SAM9261 or AT91SAM9G10"
 	select SOC_AT91SAM9261
 	select AT91_USE_OLD_CLK
+	select OLD_IRQ_AT91
 
 config ARCH_AT91SAM9263
 	bool "AT91SAM9263"
 	select SOC_AT91SAM9263
 	select AT91_USE_OLD_CLK
+	select OLD_IRQ_AT91
 
 config ARCH_AT91SAM9RL
 	bool "AT91SAM9RL"
 	select SOC_AT91SAM9RL
 	select AT91_USE_OLD_CLK
+	select OLD_IRQ_AT91
 
 config ARCH_AT91SAM9G45
 	bool "AT91SAM9G45"
 	select SOC_AT91SAM9G45
 	select AT91_USE_OLD_CLK
+	select OLD_IRQ_AT91
 
 endchoice

arch/arm/mach-at91/Makefile +2 -1

index 78e9cec..d972fd6 100644
@@ -2,11 +2,12 @@
 # Makefile for the linux kernel.
 #
 
-obj-y		:= irq.o gpio.o setup.o sysirq_mask.o
+obj-y		:= gpio.o setup.o sysirq_mask.o
 obj-m		:=
 obj-n		:=
 obj-		:=
 
+obj-$(CONFIG_OLD_IRQ_AT91)	+= irq.o
 obj-$(CONFIG_OLD_CLK_AT91)	+= clock.o
 obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
 obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o

Signature · 1 line

1.8.3.2

Boris BREZILLON

author

2014-06-20 15:01 UTC #21 lore raw

PATCH v3 5/7 ARM: at91: enclose at91_aic_xx calls in IS_ENABLED(CONFIG_OLD_IRQ_AT91) blocks

In reply to Boris BREZILLON

Enclose at91_aic_xx calls in IS_ENABLED(CONFIG_OLD_IRQ_AT91) blocks in order to prepare migration to the new AIC driver.

In the new AIC driver the suspend/resume functions are called by the generic irq framework and are no longer needed in the PM specific code.

Moreover, the new AIC driver no longer exposes the at91_aic_base variable which is used by the at91_aic_read functions.

Signed-off-by Boris BREZILLON <[email protected]>

---
 arch/arm/mach-at91/pm.c    | 32 ++++++++++++++++++++------------
 arch/arm/mach-at91/setup.c |  3 ++-
 2 files changed, 22 insertions(+), 13 deletions(-)

arch/arm/mach-at91/pm.c +20 ~~-12~~

index e955545..5920373 100644
@@ -206,16 +206,19 @@ static int at91_pm_enter(suspend_state_t state)
 		at91_pinctrl_gpio_suspend();
 	else
 		at91_gpio_suspend();
-	at91_irq_suspend();
 
-	pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
-			/* remember all the always-wake irqs */
-			(at91_pmc_read(AT91_PMC_PCSR)
-					| (1 << AT91_ID_FIQ)
-					| (1 << AT91_ID_SYS)
-					| (at91_get_extern_irq()))
-				& at91_aic_read(AT91_AIC_IMR),
-			state);
+	if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base) {
+		at91_irq_suspend();
+
+		pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
+				/* remember all the always-wake irqs */
+				(at91_pmc_read(AT91_PMC_PCSR)
+						| (1 << AT91_ID_FIQ)
+						| (1 << AT91_ID_SYS)
+						| (at91_get_extern_irq()))
+					& at91_aic_read(AT91_AIC_IMR),
+				state);
+	}
 
 	switch (state) {
 		/*

@@ -280,12 +283,17 @@ static int at91_pm_enter(suspend_state_t state)
 			goto error;
 	}
 
-	pr_debug("AT91: PM - wakeup %08x\n",
-			at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
+	if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base)
+		pr_debug("AT91: PM - wakeup %08x\n",
+			 at91_aic_read(AT91_AIC_IPR) &
+			 at91_aic_read(AT91_AIC_IMR));
 
 error:
 	target_state = PM_SUSPEND_ON;
-	at91_irq_resume();
+
+	if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base)
+		at91_irq_resume();
+
 	if (of_have_populated_dt())
 		at91_pinctrl_gpio_resume();
 	else

arch/arm/mach-at91/setup.c +2 -1

index f7a07a5..0bf893a 100644
@@ -49,7 +49,8 @@ void __init at91_init_irq_default(void)
 void __init at91_init_interrupts(unsigned int *priority)
 {
 	/* Initialize the AIC interrupt controller */
-	at91_aic_init(priority, at91_boot_soc.extern_irq);
+	if (IS_ENABLED(CONFIG_OLD_IRQ_AT91))
+		at91_aic_init(priority, at91_boot_soc.extern_irq);
 
 	/* Enable GPIO interrupts */
 	at91_gpio_irq_setup();

Signature · 1 line

1.8.3.2

Boris BREZILLON

author

2014-06-20 15:01 UTC #22 lore raw

PATCH v3 6/7 ARM: at91: make use of the new AIC driver for dt enabled boards

In reply to Boris BREZILLON

Remove selection of OLD_IRQ_AT91 when selecting dt boards. Select ATMEL_AIC_IRQ for sama5 SoCs (a kernel compiled for this SoC will always use ATMEL_AIC_IRQ driver).
Select ATMEL_AIC_IRQ for at91rm9200 and at91sam9 SoCs only if OLD_IRQ_AT91 is not selected (which means we are compiling a pure DT kernel, without any legacy board support).

Remove specific irq init code in all dt board files: this init procedure is automatically handled in of_irq_init which is called by the arm irq core code and is in charge of calling the appropriate aic init functions.

Signed-off-by Boris BREZILLON <[email protected]>

---
 arch/arm/mach-at91/Kconfig           |  6 +++---
 arch/arm/mach-at91/board-dt-rm9200.c | 13 -------------
 arch/arm/mach-at91/board-dt-sam9.c   | 13 -------------
 arch/arm/mach-at91/board-dt-sama5.c  | 13 -------------
 4 files changed, 3 insertions(+), 42 deletions(-)

arch/arm/mach-at91/Kconfig +3 -3

index fbc1b68..7526a93 100644
@@ -52,12 +52,14 @@ config SOC_AT91SAM9
 	select AT91_SAM9_TIME
 	select CPU_ARM926T
 	select GENERIC_CLOCKEVENTS
+	select ATMEL_AIC_IRQ if !OLD_IRQ_AT91
 
 config SOC_SAMA5
 	bool
 	select AT91_SAM9_TIME
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
+	select ATMEL_AIC_IRQ
 	select USE_OF
 
 menu "Atmel AT91 System-on-Chip"

@@ -111,6 +113,7 @@ config SOC_AT91RM9200
 	select CPU_ARM920T
 	select GENERIC_CLOCKEVENTS
 	select HAVE_AT91_DBGU0
+	select ATMEL_AIC_IRQ if !OLD_IRQ_AT91
 	select AT91_USE_OLD_CLK
 	select HAVE_AT91_USB_CLK

@@ -198,7 +201,6 @@ config MACH_AT91RM9200_DT
 	bool "Atmel AT91RM9200 Evaluation Kits with device-tree support"
 	depends on SOC_AT91RM9200
 	select USE_OF
-	select OLD_IRQ_AT91
 	help
 	  Select this if you want to experiment device-tree with
 	  an Atmel RM9200 Evaluation Kit.

@@ -207,7 +209,6 @@ config MACH_AT91SAM9_DT
 	bool "Atmel AT91SAM Evaluation Kits with device-tree support"
 	depends on SOC_AT91SAM9
 	select USE_OF
-	select OLD_IRQ_AT91
 	help
 	  Select this if you want to experiment device-tree with
 	  an Atmel Evaluation Kit.

@@ -216,7 +217,6 @@ config MACH_SAMA5_DT
 	bool "Atmel SAMA5 Evaluation Kits with device-tree support"
 	depends on SOC_SAMA5
 	select USE_OF
-	select OLD_IRQ_AT91
 	select PHYLIB if NETDEVICES
 	help
 	  Select this if you want to experiment device-tree with

arch/arm/mach-at91/board-dt-rm9200.c +0 ~~-13~~

index 3a185fa..61ea214 100644
@@ -24,17 +24,6 @@
 #include "at91_aic.h"
 #include "generic.h"
 
-
-static const struct of_device_id irq_of_match[] __initconst = {
-	{ .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
-	{ /*sentinel*/ }
-};
-
-static void __init at91rm9200_dt_init_irq(void)
-{
-	of_irq_init(irq_of_match);
-}
-
 static const char *at91rm9200_dt_board_compat[] __initdata = {
 	"atmel,at91rm9200",
 	NULL

@@ -43,8 +32,6 @@ static const char *at91rm9200_dt_board_compat[] __initdata = {
 DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)")
 	.init_time      = at91rm9200_timer_init,
 	.map_io		= at91_map_io,
-	.handle_irq	= at91_aic_handle_irq,
 	.init_early	= at91rm9200_dt_initialize,
-	.init_irq	= at91rm9200_dt_init_irq,
 	.dt_compat	= at91rm9200_dt_board_compat,
 MACHINE_END

arch/arm/mach-at91/board-dt-sam9.c +0 ~~-13~~

index 575b0be..dfa8d48 100644
@@ -34,17 +34,6 @@ static void __init sam9_dt_timer_init(void)
 	at91sam926x_pit_init();
 }
 
-static const struct of_device_id irq_of_match[] __initconst = {
-
-	{ .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
-	{ /*sentinel*/ }
-};
-
-static void __init at91_dt_init_irq(void)
-{
-	of_irq_init(irq_of_match);
-}
-
 static const char *at91_dt_board_compat[] __initdata = {
 	"atmel,at91sam9",
 	NULL

@@ -54,8 +43,6 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
 	/* Maintainer: Atmel */
 	.init_time	= sam9_dt_timer_init,
 	.map_io		= at91_map_io,
-	.handle_irq	= at91_aic_handle_irq,
 	.init_early	= at91_dt_initialize,
-	.init_irq	= at91_dt_init_irq,
 	.dt_compat	= at91_dt_board_compat,
 MACHINE_END

arch/arm/mach-at91/board-dt-sama5.c +0 ~~-13~~

index 075ec05..d6fe04b 100644
@@ -35,17 +35,6 @@ static void __init sama5_dt_timer_init(void)
 	at91sam926x_pit_init();
 }
 
-static const struct of_device_id irq_of_match[] __initconst = {
-
-	{ .compatible = "atmel,sama5d3-aic", .data = at91_aic5_of_init },
-	{ /*sentinel*/ }
-};
-
-static void __init at91_dt_init_irq(void)
-{
-	of_irq_init(irq_of_match);
-}
-
 static int ksz9021rn_phy_fixup(struct phy_device *phy)
 {
 	int value;

@@ -82,9 +71,7 @@ DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)")
 	/* Maintainer: Atmel */
 	.init_time	= sama5_dt_timer_init,
 	.map_io		= at91_map_io,
-	.handle_irq	= at91_aic5_handle_irq,
 	.init_early	= at91_dt_initialize,
-	.init_irq	= at91_dt_init_irq,
 	.init_machine	= sama5_dt_device_init,
 	.dt_compat	= sama5_dt_board_compat,
 MACHINE_END

Signature · 1 line

1.8.3.2

Boris BREZILLON

author

2014-06-20 15:01 UTC #23 lore raw

PATCH v3 7/7 ARM: at91: remove old irq material

In reply to Boris BREZILLON

Remove all the material related to AIC5 support: this interrupt controller driver is now implemented in drivers/irqchip/atmel-aic.c.

Signed-off-by Boris BREZILLON <[email protected]>

---
 arch/arm/mach-at91/irq.c | 270 ++---------------------------------------------
 1 file changed, 6 insertions(+), 264 deletions(-)

arch/arm/mach-at91/irq.c +6 ~~-264~~

index 3d192c5..cdb3ec9 100644
@@ -48,11 +48,6 @@ void __iomem *at91_aic_base;
 static struct irq_domain *at91_aic_domain;
 static struct device_node *at91_aic_np;
 static unsigned int n_irqs = NR_AIC_IRQS;
-static unsigned long at91_aic_caps = 0;
-
-/* AIC5 introduces a Source Select Register */
-#define AT91_AIC_CAP_AIC5	(1 << 0)
-#define has_aic5()		(at91_aic_caps & AT91_AIC_CAP_AIC5)
 
 #ifdef CONFIG_PM

@@ -92,50 +87,14 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
 
 void at91_irq_suspend(void)
 {
-	int bit = -1;
-
-	if (has_aic5()) {
-		/* disable enabled irqs */
-		while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
-			at91_aic_write(AT91_AIC5_SSR,
-				       bit & AT91_AIC5_INTSEL_MSK);
-			at91_aic_write(AT91_AIC5_IDCR, 1);
-		}
-		/* enable wakeup irqs */
-		bit = -1;
-		while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
-			at91_aic_write(AT91_AIC5_SSR,
-				       bit & AT91_AIC5_INTSEL_MSK);
-			at91_aic_write(AT91_AIC5_IECR, 1);
-		}
-	} else {
-		at91_aic_write(AT91_AIC_IDCR, *backups);
-		at91_aic_write(AT91_AIC_IECR, *wakeups);
-	}
+	at91_aic_write(AT91_AIC_IDCR, *backups);
+	at91_aic_write(AT91_AIC_IECR, *wakeups);
 }
 
 void at91_irq_resume(void)
 {
-	int bit = -1;
-
-	if (has_aic5()) {
-		/* disable wakeup irqs */
-		while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
-			at91_aic_write(AT91_AIC5_SSR,
-				       bit & AT91_AIC5_INTSEL_MSK);
-			at91_aic_write(AT91_AIC5_IDCR, 1);
-		}
-		/* enable irqs disabled for suspend */
-		bit = -1;
-		while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
-			at91_aic_write(AT91_AIC5_SSR,
-				       bit & AT91_AIC5_INTSEL_MSK);
-			at91_aic_write(AT91_AIC5_IECR, 1);
-		}
-	} else {
-		at91_aic_write(AT91_AIC_IDCR, *wakeups);
-		at91_aic_write(AT91_AIC_IECR, *backups);
-	}
+	at91_aic_write(AT91_AIC_IDCR, *wakeups);
+	at91_aic_write(AT91_AIC_IECR, *backups);
 }
 
 #else

@@ -169,21 +128,6 @@ at91_aic_handle_irq(struct pt_regs *regs)
 		handle_IRQ(irqnr, regs);
 }
 
-asmlinkage void __exception_irq_entry
-at91_aic5_handle_irq(struct pt_regs *regs)
-{
-	u32 irqnr;
-	u32 irqstat;
-
-	irqnr = at91_aic_read(AT91_AIC5_IVR);
-	irqstat = at91_aic_read(AT91_AIC5_ISR);
-
-	if (!irqstat)
-		at91_aic_write(AT91_AIC5_EOICR, 0);
-	else
-		handle_IRQ(irqnr, regs);
-}
-
 static void at91_aic_mask_irq(struct irq_data *d)
 {
 	/* Disable interrupt on AIC */

@@ -192,15 +136,6 @@ static void at91_aic_mask_irq(struct irq_data *d)
 	clear_backup(d->hwirq);
 }
 
-static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d)
-{
-	/* Disable interrupt on AIC5 */
-	at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
-	at91_aic_write(AT91_AIC5_IDCR, 1);
-	/* Update ISR cache */
-	clear_backup(d->hwirq);
-}
-
 static void at91_aic_unmask_irq(struct irq_data *d)
 {
 	/* Enable interrupt on AIC */

@@ -209,15 +144,6 @@ static void at91_aic_unmask_irq(struct irq_data *d)
 	set_backup(d->hwirq);
 }
 
-static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d)
-{
-	/* Enable interrupt on AIC5 */
-	at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
-	at91_aic_write(AT91_AIC5_IECR, 1);
-	/* Update ISR cache */
-	set_backup(d->hwirq);
-}
-
 static void at91_aic_eoi(struct irq_data *d)
 {
 	/*

@@ -227,11 +153,6 @@ static void at91_aic_eoi(struct irq_data *d)
 	at91_aic_write(AT91_AIC_EOICR, 0);
 }
 
-static void __maybe_unused at91_aic5_eoi(struct irq_data *d)
-{
-	at91_aic_write(AT91_AIC5_EOICR, 0);
-}
-
 static unsigned long *at91_extern_irq;
 
 u32 at91_get_extern_irq(void)

@@ -282,16 +203,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type)
 	if (srctype < 0)
 		return srctype;
 
-	if (has_aic5()) {
-		at91_aic_write(AT91_AIC5_SSR,
-			       d->hwirq & AT91_AIC5_INTSEL_MSK);
-		smr = at91_aic_read(AT91_AIC5_SMR) & ~AT91_AIC_SRCTYPE;
-		at91_aic_write(AT91_AIC5_SMR, smr | srctype);
-	} else {
-		smr = at91_aic_read(AT91_AIC_SMR(d->hwirq))
-		      & ~AT91_AIC_SRCTYPE;
-		at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype);
-	}
+	smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE;
+	at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype);
 
 	return 0;
 }

@@ -331,177 +244,6 @@ static void __init at91_aic_hw_init(unsigned int spu_vector)
 	at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
 }
 
-static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector)
-{
-	int i;
-
-	/*
-	 * Perform 8 End Of Interrupt Command to make sure AIC
-	 * will not Lock out nIRQ
-	 */
-	for (i = 0; i < 8; i++)
-		at91_aic_write(AT91_AIC5_EOICR, 0);
-
-	/*
-	 * Spurious Interrupt ID in Spurious Vector Register.
-	 * When there is no current interrupt, the IRQ Vector Register
-	 * reads the value stored in AIC_SPU
-	 */
-	at91_aic_write(AT91_AIC5_SPU, spu_vector);
-
-	/* No debugging in AIC: Debug (Protect) Control Register */
-	at91_aic_write(AT91_AIC5_DCR, 0);
-
-	/* Disable and clear all interrupts initially */
-	for (i = 0; i < n_irqs; i++) {
-		at91_aic_write(AT91_AIC5_SSR, i & AT91_AIC5_INTSEL_MSK);
-		at91_aic_write(AT91_AIC5_IDCR, 1);
-		at91_aic_write(AT91_AIC5_ICCR, 1);
-	}
-}
-
-#if defined(CONFIG_OF)
-static unsigned int *at91_aic_irq_priorities;
-
-static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,
-							irq_hw_number_t hw)
-{
-	/* Put virq number in Source Vector Register */
-	at91_aic_write(AT91_AIC_SVR(hw), virq);
-
-	/* Active Low interrupt, with priority */
-	at91_aic_write(AT91_AIC_SMR(hw),
-		       AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);
-
-	irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq);
-	set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
-
-	return 0;
-}
-
-static int at91_aic5_irq_map(struct irq_domain *h, unsigned int virq,
-		irq_hw_number_t hw)
-{
-	at91_aic_write(AT91_AIC5_SSR, hw & AT91_AIC5_INTSEL_MSK);
-
-	/* Put virq number in Source Vector Register */
-	at91_aic_write(AT91_AIC5_SVR, virq);
-
-	/* Active Low interrupt, with priority */
-	at91_aic_write(AT91_AIC5_SMR,
-		       AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);
-
-	irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq);
-	set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
-
-	return 0;
-}
-
-static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
-				const u32 *intspec, unsigned int intsize,
-				irq_hw_number_t *out_hwirq, unsigned int *out_type)
-{
-	if (WARN_ON(intsize < 3))
-		return -EINVAL;
-	if (WARN_ON(intspec[0] >= n_irqs))
-		return -EINVAL;
-	if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY)
-		    || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY)))
-		return -EINVAL;
-
-	*out_hwirq = intspec[0];
-	*out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
-	at91_aic_irq_priorities[*out_hwirq] = intspec[2];
-
-	return 0;
-}
-
-static struct irq_domain_ops at91_aic_irq_ops = {
-	.map	= at91_aic_irq_map,
-	.xlate	= at91_aic_irq_domain_xlate,
-};
-
-int __init at91_aic_of_common_init(struct device_node *node,
-				    struct device_node *parent)
-{
-	struct property *prop;
-	const __be32 *p;
-	u32 val;
-
-	at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs)
-				  * sizeof(*at91_extern_irq), GFP_KERNEL);
-	if (!at91_extern_irq)
-		return -ENOMEM;
-
-	if (at91_aic_pm_init()) {
-		kfree(at91_extern_irq);
-		return -ENOMEM;
-	}
-
-	at91_aic_irq_priorities = kzalloc(n_irqs
-					  * sizeof(*at91_aic_irq_priorities),
-					  GFP_KERNEL);
-	if (!at91_aic_irq_priorities)
-		return -ENOMEM;
-
-	at91_aic_base = of_iomap(node, 0);
-	at91_aic_np = node;
-
-	at91_aic_domain = irq_domain_add_linear(at91_aic_np, n_irqs,
-						&at91_aic_irq_ops, NULL);
-	if (!at91_aic_domain)
-		panic("Unable to add AIC irq domain (DT)\n");
-
-	of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) {
-		if (val >= n_irqs)
-			pr_warn("AIC: external irq %d >= %d skip it\n",
-				val, n_irqs);
-		else
-			set_bit(val, at91_extern_irq);
-	}
-
-	irq_set_default_host(at91_aic_domain);
-
-	return 0;
-}
-
-int __init at91_aic_of_init(struct device_node *node,
-				     struct device_node *parent)
-{
-	int err;
-
-	err = at91_aic_of_common_init(node, parent);
-	if (err)
-		return err;
-
-	at91_aic_hw_init(n_irqs);
-
-	return 0;
-}
-
-int __init at91_aic5_of_init(struct device_node *node,
-				     struct device_node *parent)
-{
-	int err;
-
-	at91_aic_caps |= AT91_AIC_CAP_AIC5;
-	n_irqs = NR_AIC5_IRQS;
-	at91_aic_chip.irq_ack           = at91_aic5_mask_irq;
-	at91_aic_chip.irq_mask		= at91_aic5_mask_irq;
-	at91_aic_chip.irq_unmask	= at91_aic5_unmask_irq;
-	at91_aic_chip.irq_eoi		= at91_aic5_eoi;
-	at91_aic_irq_ops.map		= at91_aic5_irq_map;
-
-	err = at91_aic_of_common_init(node, parent);
-	if (err)
-		return err;
-
-	at91_aic5_hw_init(n_irqs);
-
-	return 0;
-}
-#endif
-
 /*
  * Initialize the AIC interrupt controller.
  */

Signature · 1 line

1.8.3.2

Nicolas Ferre

2014-07-09 16:44 UTC #24 lore raw

v3 cover ARM: at91: move aic driver to drivers/irqchips

In reply to Boris BREZILLON

On 20/06/2014 17:01, Boris BREZILLON :

Quoted 9 lines

Hello,
This series moves the AIC driver to the irqchip directory and make use of the generic chip framework whenever possible.
This driver only support DT boards (all legacy board files should be soon replaced by their DT versions).
Best Regards,

I repeat here for clarity:

Boris,
Once the AIC and AIC5 drivers are split, you can add my:

Acked-by Nicolas Ferre <[email protected]>

And send the whole series to Jason.

Jason,
like you said in your response to patch #3/7, we can share a topic branch so that both arm-soc and yourself have this material in our trees and can go forward with other patch series on top of this one...

Thanks for your work and review. Bye,

Quoted 38 lines

Changes since v2:
- remove irq line muxing definition
- rework Kconfig options

Changes since v1:
- rework the irq-mux bindings

 .../devicetree/bindings/arm/atmel-aic.txt          |  42 --
 .../bindings/interrupt-controller/atmel,aic.txt    |  42 ++
 arch/arm/mach-at91/Kconfig                         |  17 +-
 arch/arm/mach-at91/Kconfig.non_dt                  |   6 +
 arch/arm/mach-at91/Makefile                        |   3 +-
 arch/arm/mach-at91/board-dt-rm9200.c               |  13 -
 arch/arm/mach-at91/board-dt-sam9.c                 |  13 -
 arch/arm/mach-at91/board-dt-sama5.c                |  13 -
 arch/arm/mach-at91/irq.c                           | 270 +-------
 arch/arm/mach-at91/pm.c                            |  32 +-
 arch/arm/mach-at91/setup.c                         |   3 +-
 drivers/irqchip/Kconfig                            |   7 +
 drivers/irqchip/Makefile                           |   1 +
 drivers/irqchip/irq-atmel-aic.c                    | 700 +++++++++++++++++++++
 include/linux/irq.h                                |   2 +
 kernel/irq/generic-chip.c                          |   5 +-
 16 files changed, 800 insertions(+), 369 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/atmel-aic.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt
 create mode 100644 drivers/irqchip/irq-atmel-aic.c

Signature · 1 line

Nicolas Ferre