mx6: Remove duplication of iomuxc structure
Subsystems (2)
Fabio Estevam
reviewerPATCH 1/2 mx6: Remove duplication of iomuxc structure
From: Fabio Estevam <[email protected]>
There is no need to keep iomuxc_base_regs structure as it serves the exact same purpose of the iomuxc structure, which is to provide access to the GPR registers.
The additional fields of iomuxc_base_regs are not used. Other advantage of 'iomuxc' is that it has a shorter name and the variable declarations can fit into a single line.
So remove iomuxc_base_regs structure and use iomuxc instead.
---
This applies against 'next' branch.
arch/arm/imx-common/sata.c | 3 +-- arch/arm/include/asm/arch-mx6/imx-regs.h | 9 --------- board/boundary/nitrogen6x/nitrogen6x.c | 3 +-- board/freescale/mx6slevk/mx6slevk.c | 3 +-- board/gateworks/gw_ventana/gw_ventana.c | 3 +-- board/solidrun/hummingboard/hummingboard.c | 3 +-- 6 files changed, 5 insertions(+), 19 deletions(-)
arch/arm/imx-common/sata.c +1 -2
@@ -12,8 +12,7 @@int setup_sata (void ) { -struct iomuxc_base_regs *const iomuxc_regs - = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR ; +struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR ;int ret;if (!is_cpu_type (MXC_CPU_MX6Q ) && !is_cpu_type (MXC_CPU_MX6D ))
arch/arm/include/asm/arch-mx6/imx-regs.h +0 -9
@@ -764,15 +764,6 @@ struct anatop_regs {#define ANATOP_PFD_CLKGATE_SHIFT (n) (7+((n)*8))#define ANATOP_PFD_CLKGATE_MASK (n) (1<<ANATOP_PFD_CLKGATE_SHIFT(n)) -struct iomuxc_base_regs { -u32 gpr[14 ];/* 0x000 */ -u32 obsrv[5 ];/* 0x038 */ -u32 swmux_ctl[197 ];/* 0x04c */ -u32 swpad_ctl[250 ];/* 0x360 */ -u32 swgrp[26 ];/* 0x748 */ -u32 daisy[104 ];/* 0x7b0..94c */ -}; -struct wdog_regs {u16 wcr;/* Control */ u16 wsr;/* Service */
board/boundary/nitrogen6x/nitrogen6x.c +1 -2
@@ -644,8 +644,7 @@ int overwrite_console(void)int board_init (void ) { -struct iomuxc_base_regs *const iomuxc_regs - = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR ; +struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR ; clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_OTG_ID_MASK,
board/freescale/mx6slevk/mx6slevk.c +1 -2
@@ -130,8 +130,7 @@ int board_eth_init(bd_t *bis)static int setup_fec (void ) { -struct iomuxc_base_regs *iomuxc_regs = - (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR ; +struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR ;int ret;/* clear gpr1[14], gpr1[18:17] to select anatop clock */
board/gateworks/gw_ventana/gw_ventana.c +1 -2
@@ -1122,8 +1122,7 @@ int dram_init(void)int board_init (void ) { -struct iomuxc_base_regs *const iomuxc_regs - = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR ; +struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR ; clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_OTG_ID_MASK,
board/solidrun/hummingboard/hummingboard.c +1 -2
@@ -144,8 +144,7 @@ int board_phy_config(struct phy_device *phydev)int board_eth_init (bd_t *bis) { -struct iomuxc_base_regs *const iomuxc_regs = - (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR ; +struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR ;int ret =enable_fec_anatop_clock (ENET_25MHz);if (ret)
Signature · 1 line
1.8.3.2
Fabio Estevam
reviewerPATCH 2/2 mx6: Adjust the GPR offset for mx6solox
From: Fabio Estevam <[email protected]>
On mx6solox there is an additional 0x4000 offset for the GPR registers.
---
This applies against 'next' branch.
arch/arm/include/asm/arch-mx6/imx-regs.h | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/include/asm/arch-mx6/imx-regs.h +3 -0
@@ -398,6 +398,9 @@ struct src {struct iomuxc { +#ifdef CONFIG_MX6SX +u8 reserved[0x4000 ]; +#endif u32 gpr[14 ];u32 omux[5 ];/* mux and pad registers */
Signature · 1 line
1.8.3.2
PATCH 2/2 mx6: Adjust the GPR offset for mx6solox
Hi Fabio,
Quoted 17 lines · Fabio Estevam
From: Fabio Estevam <[email protected]>
On mx6solox there is an additional
0x4000offset for the GPR registers.Signed-off-by Fabio Estevam <[email protected]>---
This applies against 'next' branch.arch/arm/include/asm/arch-mx6/imx-regs.h | 3 +++ 1 file changed, 3 insertions(+)arch/arm/include/asm/arch-mx6/imx-regs.h +0
-0
arch/arm/include/asm/arch-mx6/imx-regs.h struct src { · line 406
Quoted 9 lines
arch/arm/include/asm/arch-mx6/imx-regs.h +3
-0@@ -398,6 +398,9 @@ struct src {struct iomuxc { +#ifdef CONFIG_MX6SX +u8 reserved[0x4000 ]; +#endif u32 gpr[14 ];u32 omux[5 ];/* mux and pad registers */
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 2/2 mx6: Adjust the GPR offset for mx6solox
In reply to Fabio EstevamQuoted 6 lines · Fabio Estevam
From: Fabio Estevam <[email protected]>
On mx6solox there is an additional
0x4000offset for the GPR registers.Signed-off-by Fabio Estevam <[email protected]>---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 1/2 mx6: Remove duplication of iomuxc structure
In reply to Fabio EstevamHi Fabio,
Quoted 106 lines · Fabio Estevam
From: Fabio Estevam <[email protected]>
There is no need to keep
iomuxc_base_regsstructure as it serves the exact same purpose of the iomuxc structure, which is to provide access to the GPR registers.The additional fields of
iomuxc_base_regsare not used. Other advantage of 'iomuxc' is that it has a shorter name and the variable declarations can fit into a single line.So remove
iomuxc_base_regsstructure and use iomuxc instead.Signed-off-by Fabio Estevam <[email protected]>---
This applies against 'next' branch.arch/arm/imx-common/sata.c | 3 +-- arch/arm/include/asm/arch-mx6/imx-regs.h | 9 --------- board/boundary/nitrogen6x/nitrogen6x.c | 3 +-- board/freescale/mx6slevk/mx6slevk.c | 3 +-- board/gateworks/gw_ventana/gw_ventana.c | 3 +-- board/solidrun/hummingboard/hummingboard.c | 3 +-- 6 files changed, 5 insertions(+), 19 deletions(-)arch/arm/imx-common/sata.c +1
-2@@ -12,8 +12,7 @@int setup_sata (void ) { -struct iomuxc_base_regs *const iomuxc_regs - = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR ; +struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR ;int ret;if (!is_cpu_type (MXC_CPU_MX6Q ) && !is_cpu_type (MXC_CPU_MX6D ))arch/arm/include/asm/arch-mx6/imx-regs.h +0
-9@@ -764,15 +764,6 @@ struct anatop_regs {#define ANATOP_PFD_CLKGATE_SHIFT (n) (7+((n)*8))#define ANATOP_PFD_CLKGATE_MASK (n) (1<<ANATOP_PFD_CLKGATE_SHIFT(n)) -struct iomuxc_base_regs { -u32 gpr[14 ];/* 0x000 */ -u32 obsrv[5 ];/* 0x038 */ -u32 swmux_ctl[197 ];/* 0x04c */ -u32 swpad_ctl[250 ];/* 0x360 */ -u32 swgrp[26 ];/* 0x748 */ -u32 daisy[104 ];/* 0x7b0..94c */ -}; -struct wdog_regs {u16 wcr;/* Control */ u16 wsr;/* Service */ board/boundary/nitrogen6x/nitrogen6x.c +1
-2@@ -644,8 +644,7 @@ int overwrite_console(void)int board_init (void ) { -struct iomuxc_base_regs *const iomuxc_regs - = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR ; +struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR ; clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_OTG_ID_MASK,board/freescale/mx6slevk/mx6slevk.c +1
-2@@ -130,8 +130,7 @@ int board_eth_init(bd_t *bis)static int setup_fec (void ) { -struct iomuxc_base_regs *iomuxc_regs = - (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR ; +struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR ;int ret;/* clear gpr1[14], gpr1[18:17] to select anatop clock */ board/gateworks/gw_ventana/gw_ventana.c +1
-2@@ -1122,8 +1122,7 @@ int dram_init(void)int board_init (void ) { -struct iomuxc_base_regs *const iomuxc_regs - = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR ; +struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR ; clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_OTG_ID_MASK,board/solidrun/hummingboard/hummingboard.c +0
-0
board/solidrun/hummingboard/hummingboard.c int board_phy_config(struct phy_device *phydev) · line 150
Quoted 9 lines
board/solidrun/hummingboard/hummingboard.c +1
-2@@ -144,8 +144,7 @@ int board_phy_config(struct phy_device *phydev)int board_eth_init (bd_t *bis) { -struct iomuxc_base_regs *const iomuxc_regs = - (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR ; +struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR ;int ret =enable_fec_anatop_clock (ENET_25MHz);if (ret)
Good cleanup, thanks !
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 1/2 mx6: Remove duplication of iomuxc structure
In reply to Fabio EstevamQuoted 6 lines · Fabio Estevam
From: Fabio Estevam <[email protected]>
There is no need to keep
iomuxc_base_regsstructure as it serves the exact same purpose of the iomuxc structure, which is to provide access to the GPR registers.
Quoted 8 lines
The additional fields of
iomuxc_base_regsare not used. Other advantage of 'iomuxc' is that it has a shorter name and the variable declarations can fit into a single line.So remove
iomuxc_base_regsstructure and use iomuxc instead.Signed-off-by Fabio Estevam <[email protected]>---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================