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ARM: zynq: Show ECC status on the same line as DRAM size

PATCH New Michal Simek 3 participants 3 messages May 15, 2014 – Jul 23, 2014

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#0 lore raw

PATCH 1/1 ARM: zynq: Show ECC status on the same line as DRAM size

Without this patch is DRAM size one line below DRAM:
which is not nice

Origin:

I2C:   ready
DRAM:  ECC disabled

1 GiB
Now running in RAM - U-Boot at: 3ff59000
MMC: zynq_sdhci: 0

Fixed by this patch:

I2C:   ready
DRAM:  ECC disabled 1 GiB
Now running in RAM - U-Boot at: 3ff59000
MMC:   zynq_sdhci: 0

Using default environment

---

Based on http://patchwork.ozlabs.org/patch/347048/

---
 arch/arm/cpu/armv7/zynq/ddrc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/zynq/ddrc.c +2 -2
index e0ed3bfb4350..1ea086d52079 100644
@@ -34,7 +34,7 @@ void zynq_ddrc_init(void)
 	/* ECC is enabled when memory is in 16bit mode and it is enabled */
 	if ((ecctype == ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED) &&
 	    (width == ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT)) {
-		puts("Memory: ECC enabled\n");
+		puts("ECC enabled ");
 		/*
 		 * Clear the first 1MB because it is not initialized from
 		 * first stage bootloader. To get ECC to work all memory has
@@ -42,6 +42,6 @@ void zynq_ddrc_init(void)
 		 */
 		memset((void *)0, 0, 1 * 1024 * 1024);
 	} else {
-		puts("Memory: ECC disabled\n");
+		puts("ECC disabled ");
 	}
 }

--
1.8.2.3

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#1 lore raw

PATCH 1/1 ARM: zynq: Show ECC status on the same line as DRAM size

Hi Michal,

Quoted 9 lines · On Thu, 15 May 2014 09:46:02 +0200 Michal Simek <[email protected]> wrote:

Without this patch is DRAM size one line below DRAM:
which is not nice

Origin:

I2C:   ready
DRAM:  ECC disabled

1 GiB
Now running in RAM - U-Boot at: 3ff59000
MMC: zynq_sdhci: 0

Strange. "Memory: " is missing.

As far as I tested, Origin should look like:

DRAM: Memory: ECC disabled
1 GiB

The other parts look good!

Best Regards
Masahiro Yamada

#2 lore raw

PATCH 1/1 ARM: zynq: Show ECC status on the same line as DRAM size

Quoted 16 lines · Masahiro Yamada

Hi Michal,

Quoted 9 lines · On Thu, 15 May 2014 09:46:02 +0200 Michal Simek <[email protected]> wrote:

Without this patch is DRAM size one line below DRAM:
which is not nice

Origin:

I2C:   ready
DRAM:  ECC disabled

1 GiB
Now running in RAM - U-Boot at: 3ff59000
MMC: zynq_sdhci: 0

Quoted 8 lines

Strange. "Memory: " is missing.

As far as I tested, Origin should look like:

DRAM: Memory: ECC disabled
1 GiB

you are right. Not sure why it is not here.

Quoted 5 lines

The other parts look good!

I have fixed commit message and applied.

Thanks,
Michal

Signature · 14 lines
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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