Add Marvell Armada XP MV78460 SoC support

index ac886fd..b8186e9 100644
@@ -71,6 +71,7 @@ const struct spi_flash_params spi_flash_params_table[] = {
 	{"M25P32",	   0x202016, 0x0,       64 * 1024,    64,	0,			  0},
 	{"M25P64",	   0x202017, 0x0,       64 * 1024,   128,	0,			  0},
 	{"M25P128",	   0x202018, 0x0,      256 * 1024,    64,	0,			  0},
+	{"M25PX64",	   0x207117, 0x0,       64 * 1024,   128,	0,		    SECT_4K},
 	{"N25Q32",	   0x20ba16, 0x0,       64 * 1024,    64, RD_FULL,	   WR_QPP | SECT_4K},
 	{"N25Q32A",	   0x20bb16, 0x0,       64 * 1024,    64, RD_FULL,	   WR_QPP | SECT_4K},
 	{"N25Q64",	   0x20ba17, 0x0,       64 * 1024,   128, RD_FULL,	   WR_QPP | SECT_4K},

index b1cf614..e512dce 100644
@@ -43,10 +43,10 @@ struct kwspi_registers {
 #define KWSPI_XFERLEN_2BYTE	(1 << 5)
 #define KWSPI_XFERLEN_MASK	(1 << 5)
 #define KWSPI_ADRLEN_1BYTE	0
-#define KWSPI_ADRLEN_2BYTE	1 << 8
-#define KWSPI_ADRLEN_3BYTE	2 << 8
-#define KWSPI_ADRLEN_4BYTE	3 << 8
-#define KWSPI_ADRLEN_MASK	3 << 8
+#define KWSPI_ADRLEN_2BYTE	(1 << 8)
+#define KWSPI_ADRLEN_3BYTE	(2 << 8)
+#define KWSPI_ADRLEN_4BYTE	(3 << 8)
+#define KWSPI_ADRLEN_MASK	(3 << 8)
 #define KWSPI_TIMEOUT		10000
 
 #endif /* __KW_SPI_H__ */

index 942a208..449e9f8 100644
@@ -37,7 +37,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 	if (!slave)
 		return NULL;
 
-	writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl);
+	writel(KWSPI_SMEMRDY, &spireg->ctrl);
 
 	/* calculate spi clock prescaller using max_hz */
 	data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10;

@@ -137,12 +137,12 @@ void spi_init(void)
 
 void spi_cs_activate(struct spi_slave *slave)
 {
-	writel(readl(&spireg->ctrl) | KWSPI_IRQUNMASK, &spireg->ctrl);
+	setbits_le32(&spireg->ctrl, KWSPI_CSN_ACT);
 }
 
 void spi_cs_deactivate(struct spi_slave *slave)
 {
-	writel(readl(&spireg->ctrl) & KWSPI_IRQMASK, &spireg->ctrl);
+	clrbits_le32(&spireg->ctrl, KWSPI_CSN_ACT);
 }
 
 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,

@@ -161,8 +161,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 	 * handle data in 8-bit chunks
 	 * TBD: 2byte xfer mode to be enabled
 	 */
-	writel(((readl(&spireg->cfg) & ~KWSPI_XFERLEN_MASK) |
-		KWSPI_XFERLEN_1BYTE), &spireg->cfg);
+	clrsetbits_le32(&spireg->cfg, KWSPI_XFERLEN_MASK, KWSPI_XFERLEN_1BYTE);
 
 	while (bitlen > 4) {
 		debug("loopstart bitlen %d\n", bitlen);

@@ -172,7 +171,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 		if (dout)
 			tmpdout = *(u32 *) dout & 0x0ff;
 
-		writel(~KWSPI_SMEMRDIRQ, &spireg->irq_cause);
+		clrbits_le32(&spireg->irq_cause, KWSPI_SMEMRDIRQ);
 		writel(tmpdout, &spireg->dout);	/* Write the data out */
 		debug("*** spi_xfer: ... %08x written, bitlen %d\n",
 		      tmpdout, bitlen);

index 449e9f8..7d1c1f9 100644
@@ -18,7 +18,7 @@
 
 static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE;
 
-u32 cs_spi_mpp_back[2];
+static u32 cs_spi_mpp_back[2];
 
 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 				unsigned int max_hz, unsigned int mode)

index 7d1c1f9..3d58bcc 100644
@@ -46,7 +46,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 
 	/* program spi clock prescaller using max_hz */
 	writel(KWSPI_ADRLEN_3BYTE | data, &spireg->cfg);
-	debug("data = 0x%08x \n", data);
+	debug("data = 0x%08x\n", data);
 
 	writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause);
 	writel(KWSPI_IRQMASK, &spireg->irq_mask);

@@ -100,7 +100,6 @@ int spi_claim_bus(struct spi_slave *slave)
 
 	/* set new spi mpp and save current mpp config */
 	kirkwood_mpp_conf(spi_mpp_config, spi_mpp_backup);
-
 #endif
 
 	return board_spi_claim_bus(slave);

@@ -127,7 +126,7 @@ void spi_release_bus(struct spi_slave *slave)
  */
 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
-	return (bus == 0 && (cs == 0 || cs == 1));
+	return bus == 0 && (cs == 0 || cs == 1);
 }
 #endif
 

@@ -169,7 +168,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 
 		/* Shift data so it's msb-justified */
 		if (dout)
-			tmpdout = *(u32 *) dout & 0x0ff;
+			tmpdout = *(u32 *)dout & 0xff;
 
 		clrbits_le32(&spireg->irq_cause, KWSPI_SMEMRDIRQ);
 		writel(tmpdout, &spireg->dout);	/* Write the data out */

@@ -185,12 +184,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 			if (readl(&spireg->irq_cause) & KWSPI_SMEMRDIRQ) {
 				isread = 1;
 				tmpdin = readl(&spireg->din);
-				debug
-					("spi_xfer: din %p..%08x read\n",
-					din, tmpdin);
+				debug("spi_xfer: din %p..%08x read\n",
+				      din, tmpdin);
 
 				if (din) {
-					*((u8 *) din) = (u8) tmpdin;
+					*((u8 *)din) = (u8)tmpdin;
 					din += 1;
 				}
 				if (dout)

similarity index 91%
rename from arch/arm/cpu/arm926ejs/kirkwood/dram.c
rename to arch/arm/mvebu-common/dram.c
index d73ae47..bb5989b 100644
@@ -110,7 +110,13 @@ int dram_init(void)
 		if (gd->bd->bi_dram[i].start != gd->ram_size)
 			break;
 
-		gd->ram_size += gd->bd->bi_dram[i].size;
+		/*
+		 * Don't report more than 3GiB of SDRAM, otherwise there is no
+		 * address space left for the internal registers etc.
+		 */
+		if ((gd->ram_size + gd->bd->bi_dram[i].size != 0) &&
+		    (gd->ram_size + gd->bd->bi_dram[i].size <= (3 << 30)))
+			gd->ram_size += gd->bd->bi_dram[i].size;
 
 	}
 

similarity index 100%
rename from arch/arm/cpu/arm926ejs/kirkwood/timer.c
rename to arch/arm/mvebu-common/timer.c

index da80240..c8f90ba 100644
@@ -12,7 +12,7 @@
 #include <u-boot/md5.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 
 #define BUFLEN	16
 

index 0ba6f09..7222504 100644
@@ -12,7 +12,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 
 static u32 kirkwood_variant(void)

index f7bfa0e..ccc8e4e 100644
@@ -23,7 +23,7 @@
 #error "SOC Name not defined"
 #endif /* CONFIG_KW88F6281 */
 
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #define CONFIG_ARM926EJS	1	/* Basic Architecture */
 #define CONFIG_SYS_CACHELINE_SIZE	32
 				/* default Dcache Line length for kirkwood */

similarity index 100%
rename from arch/arm/include/asm/arch-kirkwood/kirkwood.h
rename to arch/arm/include/asm/arch-kirkwood/soc.h

index bb5989b..e468136 100644
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

index a08f4a1..b7aa645 100644
@@ -7,7 +7,7 @@
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 
 #define UBOOT_CNTR	0	/* counter to use for uboot timer */
 

index 4c3a9ba..471db77 100644
@@ -13,7 +13,7 @@
 #include <command.h>
 #include <i2c.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/arch/gpio.h>
 

index 3773587..6a16e7b 100644
@@ -12,7 +12,7 @@
 #include <common.h>
 #include <command.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/arch/gpio.h>
 

index 2dc5018..53f5d2f 100644
@@ -12,7 +12,7 @@
 #include <common.h>
 #include <command.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/arch/gpio.h>
 

index b53c810..3c286be 100644
@@ -12,7 +12,7 @@
 #include <common.h>
 #include <miiphy.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include "dreamplug.h"
 

index 72bccc8..a5b42b4 100644
@@ -9,7 +9,7 @@
 #include <common.h>
 #include <miiphy.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include "guruplug.h"
 

index e1652c0..ee665c1 100644
@@ -11,7 +11,7 @@
 #include <common.h>
 #include <netdev.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include "mv88f6281gtw_ge.h"
 

index a005a2f..78ebb64 100644
@@ -14,7 +14,7 @@
 #include <common.h>
 #include <miiphy.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include "openrd.h"
 

index 33ef0c7..8248274 100644
@@ -10,7 +10,7 @@
 #include <miiphy.h>
 #include <netdev.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include "rd6281a.h"
 

index 87e49f4..4f17e09 100644
@@ -9,7 +9,7 @@
 #include <common.h>
 #include <miiphy.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include "sheevaplug.h"
 

index ff6a6a0..dc73dfa 100644
@@ -11,7 +11,7 @@
 
 #include <common.h>
 #include <miiphy.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/arch/cpu.h>
 #include <asm/io.h>

index a6598e9..3e4ae89 100644
@@ -14,7 +14,7 @@
 
 #include <common.h>
 #include <miiphy.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/arch/cpu.h>
 #include <asm/io.h>

index 659a124..26b8576 100644
@@ -13,7 +13,7 @@
 #include <malloc.h>
 #include <netdev.h>
 #include <miiphy.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/mpp.h>
 #include <asm/arch/gpio.h>

index 0e63258..ddc3fa6 100644
@@ -13,7 +13,7 @@
 #include <common.h>
 #include <miiphy.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include "pogo_e02.h"
 

index ff70e94..f2f43f5 100644
@@ -14,7 +14,7 @@
 #include <miiphy.h>
 #include <netdev.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/arch/gpio.h>
 #include "dns325.h"

index c3443bd..f376d3d 100644
@@ -9,7 +9,7 @@
 #include <common.h>
 #include <miiphy.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include "iconnect.h"
 

index ed0575c..e877aa3 100644
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <miiphy.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/io.h>
 

index 35402c8..cd508d2 100644
@@ -20,7 +20,7 @@
 #include <spi.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 
 #include "../common/common.h"

index 976ba4c..47956b2 100644
@@ -11,7 +11,7 @@
 #include <miiphy.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include "ib62x0.h"
 

index 574bc40..e54d564 100644
@@ -12,7 +12,7 @@
 #if defined(CONFIG_ORION5X)
 #include <asm/arch/orion5x.h>
 #elif defined(CONFIG_KIRKWOOD)
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #endif
 
 /* SATA port registers */

index 0af75a8..4fca089 100644
@@ -16,7 +16,7 @@
 #include <common.h>
 #include <asm/bitops.h>
 #include <asm/io.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/gpio.h>
 
 static unsigned long gpio_valid_input[BITS_TO_LONGS(GPIO_MAX)];

index ab3ffa0..a2deae6 100644
@@ -21,7 +21,7 @@
 #if defined(CONFIG_ORION5X)
 #include <asm/arch/orion5x.h>
 #elif defined(CONFIG_KIRKWOOD)
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #elif defined(CONFIG_SUNXI)
 #include <asm/arch/i2c.h>
 #else

index 72687a1..ad32700 100644
@@ -8,7 +8,7 @@
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <nand.h>
 
 /* NAND Flash Soc registers */

index 0cd06b6..6ef6cac 100644
@@ -24,7 +24,7 @@
 #include <asm/arch/cpu.h>
 
 #if defined(CONFIG_KIRKWOOD)
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #elif defined(CONFIG_ORION5X)
 #include <asm/arch/orion5x.h>
 #elif defined(CONFIG_DOVE)

index ce7a69b..ebddc12 100644
@@ -12,7 +12,7 @@
 #ifndef _MVRTC_H_
 #define _MVRTC_H_
 
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <compiler.h>
 
 /* RTC registers */

index 3d58bcc..de0e914 100644
@@ -12,7 +12,7 @@
 #include <malloc.h>
 #include <spi.h>
 #include <asm/io.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/spi.h>
 #include <asm/arch/mpp.h>
 

index 52c43fd..1a5fd6e 100644
@@ -13,7 +13,7 @@
 #include <asm/arch/cpu.h>
 
 #if defined(CONFIG_KIRKWOOD)
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #elif defined(CONFIG_ORION5X)
 #include <asm/arch/orion5x.h>
 #endif

similarity index 100%
rename from arch/arm/include/asm/arch-kirkwood/spi.h
rename to arch/arm/include/asm/arch-mvebu/spi.h

index de0e914..9710f12 100644
@@ -13,8 +13,8 @@
 #include <spi.h>
 #include <asm/io.h>
 #include <asm/arch/soc.h>
-#include <asm/arch/spi.h>
 #include <asm/arch/mpp.h>
+#include <asm/arch-mvebu/spi.h>
 
 static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE;
 

index bc207f5..4261c35 100644
@@ -33,7 +33,7 @@
 #define KW_SPI_BASE			(KW_REGISTER(0x10600))
 #define KW_CPU_WIN_BASE			(KW_REGISTER(0x20000))
 #define KW_CPU_REG_BASE			(KW_REGISTER(0x20100))
-#define KW_TIMER_BASE			(KW_REGISTER(0x20300))
+#define MVEBU_TIMER_BASE			(KW_REGISTER(0x20300))
 #define KW_REG_PCIE_BASE		(KW_REGISTER(0x40000))
 #define KW_USB20_BASE			(KW_REGISTER(0x50000))
 #define KW_EGIGA0_BASE			(KW_REGISTER(0x72000))

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index 9710f12..ce2ba96 100644
@@ -13,22 +13,28 @@
 #include <spi.h>
 #include <asm/io.h>
 #include <asm/arch/soc.h>
+#ifdef CONFIG_KIRKWOOD
 #include <asm/arch/mpp.h>
+#endif
 #include <asm/arch-mvebu/spi.h>
 
 static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE;
 
+#ifdef CONFIG_KIRKWOOD
 static u32 cs_spi_mpp_back[2];
+#endif
 
 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 				unsigned int max_hz, unsigned int mode)
 {
 	struct spi_slave *slave;
 	u32 data;
+#ifdef CONFIG_KIRKWOOD
 	static const u32 kwspi_mpp_config[2][2] = {
 		{ MPP0_SPI_SCn, 0 }, /* if cs == 0 */
 		{ MPP7_SPI_SCn, 0 } /* if cs != 0 */
 	};
+#endif
 
 	if (!spi_cs_is_valid(bus, cs))
 		return NULL;

@@ -51,15 +57,19 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 	writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause);
 	writel(KWSPI_IRQMASK, &spireg->irq_mask);
 
+#ifdef CONFIG_KIRKWOOD
 	/* program mpp registers to select  SPI_CSn */
 	kirkwood_mpp_conf(kwspi_mpp_config[cs ? 1 : 0], cs_spi_mpp_back);
+#endif
 
 	return slave;
 }
 
 void spi_free_slave(struct spi_slave *slave)
 {
+#ifdef CONFIG_KIRKWOOD
 	kirkwood_mpp_conf(cs_spi_mpp_back, NULL);
+#endif
 	free(slave);
 }
 

index c8f90ba..00abcfd 100644
@@ -139,23 +139,6 @@ int kw_config_adr_windows(void)
 }
 
 /*
- * kw_config_gpio - GPIO configuration
- */
-void kw_config_gpio(u32 gpp0_oe_val, u32 gpp1_oe_val, u32 gpp0_oe, u32 gpp1_oe)
-{
-	struct kwgpio_registers *gpio0reg =
-		(struct kwgpio_registers *)KW_GPIO0_BASE;
-	struct kwgpio_registers *gpio1reg =
-		(struct kwgpio_registers *)KW_GPIO1_BASE;
-
-	/* Init GPIOS to default values as per board requirement */
-	writel(gpp0_oe_val, &gpio0reg->dout);
-	writel(gpp1_oe_val, &gpio1reg->dout);
-	writel(gpp0_oe, &gpio0reg->oe);
-	writel(gpp1_oe, &gpio1reg->oe);
-}
-
-/*
  * kw_config_mpp - Multi-Purpose Pins Functionality configuration
  *
  * Each MPP can be configured to different functionality through

index 97daa40..5900a15 100644
@@ -144,7 +144,7 @@ unsigned int kw_sdram_bar(enum memory_bank bank);
 unsigned int kw_sdram_bs(enum memory_bank bank);
 void kw_sdram_size_adjust(enum memory_bank bank);
 int kw_config_adr_windows(void);
-void kw_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val,
+void mvebu_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val,
 		unsigned int gpp0_oe, unsigned int gpp1_oe);
 int kw_config_mpp(unsigned int mpp0_7, unsigned int mpp8_15,
 		unsigned int mpp16_23, unsigned int mpp24_31,

index 5f4d786..aa8c5da 100644
@@ -21,14 +21,14 @@
 
 #define GPIO_MAX		50
 #define GPIO_OFF(pin)		(((pin) >> 5) ? 0x0040 : 0x0000)
-#define GPIO_OUT(pin)		(KW_GPIO0_BASE + GPIO_OFF(pin) + 0x00)
-#define GPIO_IO_CONF(pin)	(KW_GPIO0_BASE + GPIO_OFF(pin) + 0x04)
-#define GPIO_BLINK_EN(pin)	(KW_GPIO0_BASE + GPIO_OFF(pin) + 0x08)
-#define GPIO_IN_POL(pin)	(KW_GPIO0_BASE + GPIO_OFF(pin) + 0x0c)
-#define GPIO_DATA_IN(pin)	(KW_GPIO0_BASE + GPIO_OFF(pin) + 0x10)
-#define GPIO_EDGE_CAUSE(pin)	(KW_GPIO0_BASE + GPIO_OFF(pin) + 0x14)
-#define GPIO_EDGE_MASK(pin)	(KW_GPIO0_BASE + GPIO_OFF(pin) + 0x18)
-#define GPIO_LEVEL_MASK(pin)	(KW_GPIO0_BASE + GPIO_OFF(pin) + 0x1c)
+#define GPIO_OUT(pin)		(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x00)
+#define GPIO_IO_CONF(pin)	(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x04)
+#define GPIO_BLINK_EN(pin)	(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x08)
+#define GPIO_IN_POL(pin)	(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x0c)
+#define GPIO_DATA_IN(pin)	(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x10)
+#define GPIO_EDGE_CAUSE(pin)	(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x14)
+#define GPIO_EDGE_MASK(pin)	(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x18)
+#define GPIO_LEVEL_MASK(pin)	(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x1c)
 
 /*
  * Kirkwood-specific GPIO API

index 4261c35..37cbae9 100644
@@ -26,8 +26,8 @@
 #define KW_UART0_BASE			(KW_REGISTER(0x12000))
 #define KW_UART1_BASE			(KW_REGISTER(0x12100))
 #define KW_MPP_BASE			(KW_REGISTER(0x10000))
-#define KW_GPIO0_BASE			(KW_REGISTER(0x10100))
-#define KW_GPIO1_BASE			(KW_REGISTER(0x10140))
+#define MVEBU_GPIO0_BASE			(KW_REGISTER(0x10100))
+#define MVEBU_GPIO1_BASE			(KW_REGISTER(0x10140))
 #define KW_RTC_BASE			(KW_REGISTER(0x10300))
 #define KW_NANDF_BASE			(KW_REGISTER(0x10418))
 #define KW_SPI_BASE			(KW_REGISTER(0x10600))

new file mode 100644
index 0000000..56e54e0
@@ -0,0 +1,30 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/soc.h>
+
+/*
+ * mvebu_config_gpio - GPIO configuration
+ */
+void mvebu_config_gpio(u32 gpp0_oe_val, u32 gpp1_oe_val,
+		       u32 gpp0_oe, u32 gpp1_oe)
+{
+	struct kwgpio_registers *gpio0reg =
+		(struct kwgpio_registers *)MVEBU_GPIO0_BASE;
+	struct kwgpio_registers *gpio1reg =
+		(struct kwgpio_registers *)MVEBU_GPIO1_BASE;
+
+	/* Init GPIOS to default values as per board requirement */
+	writel(gpp0_oe_val, &gpio0reg->dout);
+	writel(gpp1_oe_val, &gpio1reg->dout);
+	writel(gpp0_oe, &gpio0reg->oe);
+	writel(gpp1_oe, &gpio1reg->oe);
+}

index 471db77..12a516e 100644
@@ -26,8 +26,8 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_early_init_f(void)
 {
 	/* GPIO configuration */
-	kw_config_gpio(NET2BIG_V2_OE_VAL_LOW, NET2BIG_V2_OE_VAL_HIGH,
-			NET2BIG_V2_OE_LOW, NET2BIG_V2_OE_HIGH);
+	mvebu_config_gpio(NET2BIG_V2_OE_VAL_LOW, NET2BIG_V2_OE_VAL_HIGH,
+			  NET2BIG_V2_OE_LOW, NET2BIG_V2_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index 6a16e7b..323e34a 100644
@@ -24,8 +24,8 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_early_init_f(void)
 {
 	/* Gpio configuration */
-	kw_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
-			NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
+	mvebu_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
+			  NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index 53f5d2f..15b34a3 100644
@@ -97,8 +97,8 @@ struct mv88e61xx_config swcfg = {
 int board_early_init_f(void)
 {
 	/* Gpio configuration */
-	kw_config_gpio(WIRELESS_SPACE_OE_VAL_LOW, WIRELESS_SPACE_OE_VAL_HIGH,
-			WIRELESS_SPACE_OE_LOW, WIRELESS_SPACE_OE_HIGH);
+	mvebu_config_gpio(WIRELESS_SPACE_OE_VAL_LOW, WIRELESS_SPACE_OE_VAL_HIGH,
+			  WIRELESS_SPACE_OE_LOW, WIRELESS_SPACE_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	kirkwood_mpp_conf(kwmpp_config, NULL);

index 3c286be..07b7496 100644
@@ -25,9 +25,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the  below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(DREAMPLUG_OE_VAL_LOW,
-			DREAMPLUG_OE_VAL_HIGH,
-			DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH);
+	mvebu_config_gpio(DREAMPLUG_OE_VAL_LOW,
+			  DREAMPLUG_OE_VAL_HIGH,
+			  DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index a5b42b4..b18a306 100644
@@ -22,9 +22,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the  below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(GURUPLUG_OE_VAL_LOW,
-			GURUPLUG_OE_VAL_HIGH,
-			GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH);
+	mvebu_config_gpio(GURUPLUG_OE_VAL_LOW,
+			  GURUPLUG_OE_VAL_HIGH,
+			  GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index ee665c1..97fb61b 100644
@@ -24,9 +24,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the  below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(MV88F6281GTW_GE_OE_VAL_LOW,
-			MV88F6281GTW_GE_OE_VAL_HIGH,
-			MV88F6281GTW_GE_OE_LOW, MV88F6281GTW_GE_OE_HIGH);
+	mvebu_config_gpio(MV88F6281GTW_GE_OE_VAL_LOW,
+			  MV88F6281GTW_GE_OE_VAL_HIGH,
+			  MV88F6281GTW_GE_OE_LOW, MV88F6281GTW_GE_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index 78ebb64..52dd083 100644
@@ -27,9 +27,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the  below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(OPENRD_OE_VAL_LOW,
-			OPENRD_OE_VAL_HIGH,
-			OPENRD_OE_LOW, OPENRD_OE_HIGH);
+	mvebu_config_gpio(OPENRD_OE_VAL_LOW,
+			  OPENRD_OE_VAL_HIGH,
+			  OPENRD_OE_LOW, OPENRD_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index 8248274..df5fbea 100644
@@ -23,9 +23,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the  below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(RD6281A_OE_VAL_LOW,
-			RD6281A_OE_VAL_HIGH,
-			RD6281A_OE_LOW, RD6281A_OE_HIGH);
+	mvebu_config_gpio(RD6281A_OE_VAL_LOW,
+			  RD6281A_OE_VAL_HIGH,
+			  RD6281A_OE_LOW, RD6281A_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index 4f17e09..18eeb4c 100644
@@ -22,9 +22,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the  below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(SHEEVAPLUG_OE_VAL_LOW,
-			SHEEVAPLUG_OE_VAL_HIGH,
-			SHEEVAPLUG_OE_LOW, SHEEVAPLUG_OE_HIGH);
+	mvebu_config_gpio(SHEEVAPLUG_OE_VAL_LOW,
+			  SHEEVAPLUG_OE_VAL_HIGH,
+			  SHEEVAPLUG_OE_LOW, SHEEVAPLUG_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index dc73dfa..838f578 100644
@@ -26,9 +26,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the  below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(DOCKSTAR_OE_VAL_LOW,
-			DOCKSTAR_OE_VAL_HIGH,
-			DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH);
+	mvebu_config_gpio(DOCKSTAR_OE_VAL_LOW,
+			  DOCKSTAR_OE_VAL_HIGH,
+			  DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

@@ -143,7 +143,7 @@ void reset_phy(void)
 
 static void set_leds(u32 leds, u32 blinking)
 {
-	struct kwgpio_registers *r = (struct kwgpio_registers *)KW_GPIO1_BASE;
+	struct kwgpio_registers *r = (struct kwgpio_registers *)MVEBU_GPIO1_BASE;
 	u32 oe = readl(&r->oe) | BOTH_LEDS;
 	writel(oe & ~leds, &r->oe);	/* active low */
 	u32 bl = readl(&r->blink_en) & ~BOTH_LEDS;

index 3e4ae89..c3f4cbf 100644
@@ -83,9 +83,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the  below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(GOFLEXHOME_OE_VAL_LOW,
-		       GOFLEXHOME_OE_VAL_HIGH,
-		       GOFLEXHOME_OE_LOW, GOFLEXHOME_OE_HIGH);
+	mvebu_config_gpio(GOFLEXHOME_OE_VAL_LOW,
+			  GOFLEXHOME_OE_VAL_HIGH,
+			  GOFLEXHOME_OE_LOW, GOFLEXHOME_OE_HIGH);
 	kirkwood_mpp_conf(kwmpp_config, NULL);
 	return 0;
 }

@@ -149,7 +149,7 @@ static void set_leds(u32 leds, u32 blinking)
 	u32 oe;
 	u32 bl;
 
-	r = (struct kwgpio_registers *)KW_GPIO1_BASE;
+	r = (struct kwgpio_registers *)MVEBU_GPIO1_BASE;
 	oe = readl(&r->oe) | BOTH_LEDS;
 	writel(oe & ~leds, &r->oe);	/* active low */
 	bl = readl(&r->blink_en) & ~BOTH_LEDS;

index 26b8576..042132e 100644
@@ -51,9 +51,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(LSXL_OE_VAL_LOW,
-			LSXL_OE_VAL_HIGH,
-			LSXL_OE_LOW, LSXL_OE_HIGH);
+	mvebu_config_gpio(LSXL_OE_VAL_LOW,
+			  LSXL_OE_VAL_HIGH,
+			  LSXL_OE_LOW, LSXL_OE_HIGH);
 
 	/*
 	 * Multi-Purpose Pins Functionality configuration

index ddc3fa6..314834f 100644
@@ -26,9 +26,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the  below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(POGO_E02_OE_VAL_LOW,
-			POGO_E02_OE_VAL_HIGH,
-			POGO_E02_OE_LOW, POGO_E02_OE_HIGH);
+	mvebu_config_gpio(POGO_E02_OE_VAL_LOW,
+			  POGO_E02_OE_VAL_HIGH,
+			  POGO_E02_OE_LOW, POGO_E02_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index f2f43f5..fd23696 100644
@@ -24,8 +24,8 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_early_init_f(void)
 {
 	/* Gpio configuration */
-	kw_config_gpio(DNS325_OE_VAL_LOW, DNS325_OE_VAL_HIGH,
-			DNS325_OE_LOW, DNS325_OE_HIGH);
+	mvebu_config_gpio(DNS325_OE_VAL_LOW, DNS325_OE_VAL_HIGH,
+			  DNS325_OE_LOW, DNS325_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index f376d3d..76c945a 100644
@@ -22,9 +22,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(ICONNECT_OE_VAL_LOW,
-			ICONNECT_OE_VAL_HIGH,
-			ICONNECT_OE_LOW, ICONNECT_OE_HIGH);
+	mvebu_config_gpio(ICONNECT_OE_VAL_LOW,
+			  ICONNECT_OE_VAL_HIGH,
+			  ICONNECT_OE_LOW, ICONNECT_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index e877aa3..7aec5f9 100644
@@ -26,9 +26,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the  below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(TK71_OE_VAL_LOW,
-			TK71_OE_VAL_HIGH,
-			TK71_OE_LOW, TK71_OE_HIGH);
+	mvebu_config_gpio(TK71_OE_VAL_LOW,
+			  TK71_OE_VAL_HIGH,
+			  TK71_OE_LOW, TK71_OE_HIGH);
 
 	/* Multi-Purpose Pins Functionality configuration */
 	static const u32 kwmpp_config[] = {

index cd508d2..6621464 100644
@@ -222,8 +222,8 @@ int board_early_init_f(void)
 	u32 tmp;
 
 	/* set the 2 bitbang i2c pins as output gpios */
-	tmp = readl(KW_GPIO0_BASE + 4);
-	writel(tmp & (~KM_KIRKWOOD_SOFT_I2C_GPIOS) , KW_GPIO0_BASE + 4);
+	tmp = readl(MVEBU_GPIO0_BASE + 4);
+	writel(tmp & (~KM_KIRKWOOD_SOFT_I2C_GPIOS) , MVEBU_GPIO0_BASE + 4);
 #endif
 	/* adjust SDRAM size for bank 0 */
 	kw_sdram_size_adjust(0);

index 47956b2..dbcfb43 100644
@@ -24,9 +24,9 @@ int board_early_init_f(void)
 	 * There are maximum 64 gpios controlled through 2 sets of registers
 	 * the below configuration configures mainly initial LED status
 	 */
-	kw_config_gpio(IB62x0_OE_VAL_LOW,
-			IB62x0_OE_VAL_HIGH,
-			IB62x0_OE_LOW, IB62x0_OE_HIGH);
+	mvebu_config_gpio(IB62x0_OE_VAL_LOW,
+			  IB62x0_OE_VAL_HIGH,
+			  IB62x0_OE_LOW, IB62x0_OE_HIGH);
 
 	/* Set SATA activity LEDs to default off */
 	writel(MVSATAHC_LED_POLARITY_CTRL, MVSATAHC_LED_CONF_REG);

index 37cbae9..379ce13 100644
@@ -30,7 +30,7 @@
 #define MVEBU_GPIO1_BASE			(KW_REGISTER(0x10140))
 #define KW_RTC_BASE			(KW_REGISTER(0x10300))
 #define KW_NANDF_BASE			(KW_REGISTER(0x10418))
-#define KW_SPI_BASE			(KW_REGISTER(0x10600))
+#define MVEBU_SPI_BASE			(KW_REGISTER(0x10600))
 #define KW_CPU_WIN_BASE			(KW_REGISTER(0x20000))
 #define KW_CPU_REG_BASE			(KW_REGISTER(0x20100))
 #define MVEBU_TIMER_BASE			(KW_REGISTER(0x20300))

index ce2ba96..e7b0982 100644
@@ -18,7 +18,8 @@
 #endif
 #include <asm/arch-mvebu/spi.h>
 
-static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE;
+static struct kwspi_registers *spireg =
+	(struct kwspi_registers *)MVEBU_SPI_BASE;
 
 #ifdef CONFIG_KIRKWOOD
 static u32 cs_spi_mpp_back[2];

index 5900a15..926d347 100644
@@ -140,9 +140,9 @@ struct kwgpio_registers {
  * functions
  */
 unsigned char get_random_hex(void);
-unsigned int kw_sdram_bar(enum memory_bank bank);
-unsigned int kw_sdram_bs(enum memory_bank bank);
-void kw_sdram_size_adjust(enum memory_bank bank);
+unsigned int mvebu_sdram_bar(enum memory_bank bank);
+unsigned int mvebu_sdram_bs(enum memory_bank bank);
+void mvebu_sdram_size_adjust(enum memory_bank bank);
 int kw_config_adr_windows(void);
 void mvebu_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val,
 		unsigned int gpp0_oe, unsigned int gpp1_oe);

index 379ce13..75120b1 100644
@@ -22,6 +22,7 @@
 #define KW_REG_UNDOC_0x1470		(KW_REGISTER(0x1470))
 #define KW_REG_UNDOC_0x1478		(KW_REGISTER(0x1478))
 
+#define MVEBU_SDRAM_BASE		(KW_REGISTER(0x1500))
 #define KW_TWSI_BASE			(KW_REGISTER(0x11000))
 #define KW_UART0_BASE			(KW_REGISTER(0x12000))
 #define KW_UART1_BASE			(KW_REGISTER(0x12100))

108 lines not on this page · raw message

index 12a516e..263bb54 100644
@@ -77,7 +77,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_NET2BIG_V2;
 
 	/* Boot parameters address */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index 323e34a..17e6296 100644
@@ -73,7 +73,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
 
 	/* Boot parameters address */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index 15b34a3..8620e4b 100644
@@ -112,7 +112,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
 
 	/* Boot parameters address */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index 07b7496..0887d92 100644
@@ -90,7 +90,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index b18a306..b0d5f1e 100644
@@ -92,7 +92,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG;
 
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index 97fb61b..ef08ad8 100644
@@ -94,7 +94,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_MV88F6281GTW_GE;
 
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index 52dd083..55cf525 100644
@@ -104,7 +104,7 @@ int board_init(void)
 #endif
 
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 	return 0;
 }
 

index df5fbea..b0020c9 100644
@@ -93,7 +93,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_RD88F6281;
 
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index 18eeb4c..8907fb5 100644
@@ -92,7 +92,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
 
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index 838f578..83ab1bc 100644
@@ -96,7 +96,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR;
 
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index c3f4cbf..1f4fb92 100644
@@ -98,7 +98,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_GOFLEXHOME;
 
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index 042132e..92292ae 100644
@@ -167,7 +167,7 @@ static void set_led(int state)
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	set_led(LED_POWER_BLINKING);
 

index 314834f..8309d06 100644
@@ -64,7 +64,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* Boot parameters address */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index fd23696..a022daf 100644
@@ -92,7 +92,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* Boot parameters address */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index 76c945a..086a473 100644
@@ -87,7 +87,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index 7aec5f9..35546d2 100644
@@ -97,7 +97,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
 
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

index 6621464..1c7c108 100644
@@ -226,7 +226,7 @@ int board_early_init_f(void)
 	writel(tmp & (~KM_KIRKWOOD_SOFT_I2C_GPIOS) , MVEBU_GPIO0_BASE + 4);
 #endif
 	/* adjust SDRAM size for bank 0 */
-	kw_sdram_size_adjust(0);
+	mvebu_sdram_size_adjust(0);
 	kirkwood_mpp_conf(kwmpp_config, NULL);
 	return 0;
 }

@@ -234,7 +234,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	/*
 	 * The KM_FLASH_GPIO_PIN switches between using a

index dbcfb43..f01fb1c 100644
@@ -62,7 +62,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	return 0;
 }

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index e45dd7a..4691959 100644
@@ -64,6 +64,7 @@ int mpc512x_fec_initialize(bd_t *bis);
 int mpc5xxx_fec_initialize(bd_t *bis);
 int mpc82xx_scc_enet_initialize(bd_t *bis);
 int mvgbe_initialize(bd_t *bis);
+int mvneta_initialize(bd_t *bis, int base_addr, int devnum, int phy_addr);
 int natsemi_initialize(bd_t *bis);
 int ne2k_register(void);
 int npe_initialize(bd_t *bis);

index d3ecd63..713742e 100644
@@ -32,7 +32,9 @@
 #define PHY_10G_FEATURES	(PHY_GBIT_FEATURES | \
 				SUPPORTED_10000baseT_Full)
 
+#ifndef PHY_ANEG_TIMEOUT
 #define PHY_ANEG_TIMEOUT	4000
+#endif
 
 
 typedef enum {

index a2deae6..9b2ca1e 100644
@@ -20,7 +20,7 @@
 
 #if defined(CONFIG_ORION5X)
 #include <asm/arch/orion5x.h>
-#elif defined(CONFIG_KIRKWOOD)
+#elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARMADA_XP))
 #include <asm/arch/soc.h>
 #elif defined(CONFIG_SUNXI)
 #include <asm/arch/i2c.h>

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index 00abcfd..c384565 100644
@@ -9,13 +9,10 @@
 #include <common.h>
 #include <netdev.h>
 #include <asm/cache.h>
-#include <u-boot/md5.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
 
-#define BUFLEN	16
-
 void reset_cpu(unsigned long ignored)
 {
 	struct kwcpu_registers *cpureg =

@@ -29,31 +26,6 @@ void reset_cpu(unsigned long ignored)
 }
 
 /*
- * Generates Ramdom hex number reading some time varient system registers
- * and using md5 algorithm
- */
-unsigned char get_random_hex(void)
-{
-	int i;
-	u32 inbuf[BUFLEN];
-	u8 outbuf[BUFLEN];
-
-	/*
-	 * in case of 88F6281/88F6282/88F6192 A0,
-	 * Bit7 need to reset to generate random values in KW_REG_UNDOC_0x1470
-	 * Soc reg offsets KW_REG_UNDOC_0x1470 and KW_REG_UNDOC_0x1478 are
-	 * reserved regs and does not have names at this moment
-	 * (no errata available)
-	 */
-	writel(readl(KW_REG_UNDOC_0x1478) & ~(1 << 7), KW_REG_UNDOC_0x1478);
-	for (i = 0; i < BUFLEN; i++) {
-		inbuf[i] = readl(KW_REG_UNDOC_0x1470);
-	}
-	md5((u8 *) inbuf, (BUFLEN * sizeof(u32)), outbuf);
-	return outbuf[outbuf[7] % 0x0f];
-}
-
-/*
  * Window Size
  * Used with the Base register to set the address window size and location.
  * Must be programmed from LSB to MSB as sequence of ones followed by

@@ -139,33 +111,6 @@ int kw_config_adr_windows(void)
 }
 
 /*
- * kw_config_mpp - Multi-Purpose Pins Functionality configuration
- *
- * Each MPP can be configured to different functionality through
- * MPP control register, ref (sec 6.1 of kirkwood h/w specification)
- *
- * There are maximum 64 Multi-Pourpose Pins on Kirkwood
- * Each MPP functionality can be configuration by a 4bit value
- * of MPP control reg, the value and associated functionality depends
- * upon used SoC varient
- */
-int kw_config_mpp(u32 mpp0_7, u32 mpp8_15, u32 mpp16_23, u32 mpp24_31,
-		u32 mpp32_39, u32 mpp40_47, u32 mpp48_55)
-{
-	u32 *mppreg = (u32 *) KW_MPP_BASE;
-
-	/* program mpp registers */
-	writel(mpp0_7, &mppreg[0]);
-	writel(mpp8_15, &mppreg[1]);
-	writel(mpp16_23, &mppreg[2]);
-	writel(mpp24_31, &mppreg[3]);
-	writel(mpp32_39, &mppreg[4]);
-	writel(mpp40_47, &mppreg[5]);
-	writel(mpp48_55, &mppreg[6]);
-	return 0;
-}
-
-/*
  * SYSRSTn Duration Counter Support
  *
  * Kirkwood SoC implements a hardware-based SYSRSTn duration counter.

index e773f01..1368b4c 100644
@@ -1,5 +1,6 @@
 /*
- * Boot a Marvell Kirkwood SoC, with Xmodem over UART0.
+ * Boot a Marvell SoC, with Xmodem over UART0.
+ *  supports Kirkwood, Dove, Armada 370, Armada XP
  *
  * (c) 2012 Daniel Stodden <[email protected]>
  *

@@ -37,9 +38,18 @@ static unsigned char kwboot_msg_boot[] = {
 	0xBB, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
 };
 
+static unsigned char kwboot_msg_debug[] = {
+	0xDD, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
+};
+
+/* Defines known to work on Kirkwood */
 #define KWBOOT_MSG_REQ_DELAY	10 /* ms */
 #define KWBOOT_MSG_RSP_TIMEO	50 /* ms */
 
+/* Defines known to work on Armada XP */
+#define KWBOOT_MSG_REQ_DELAY_AXP	1000 /* ms */
+#define KWBOOT_MSG_RSP_TIMEO_AXP	1000 /* ms */
+
 /*
  * Xmodem Transfers
  */

@@ -62,6 +72,9 @@ struct kwboot_block {
 
 static int kwboot_verbose;
 
+static int msg_req_delay = KWBOOT_MSG_REQ_DELAY;
+static int msg_rsp_timeo = KWBOOT_MSG_RSP_TIMEO;
+
 static void
 kwboot_printv(const char *fmt, ...)
 {

@@ -184,6 +197,9 @@ kwboot_tty_send(int fd, const void *buf, size_t len)
 	int rc;
 	ssize_t n;
 
+	if (!buf)
+		return 0;
+
 	rc = -1;
 
 	do {

@@ -268,7 +284,10 @@ kwboot_bootmsg(int tty, void *msg)
 	int rc;
 	char c;
 
-	kwboot_printv("Sending boot message. Please reboot the target...");
+	if (msg == NULL)
+		kwboot_printv("Please reboot the target into UART boot mode...");
+	else
+		kwboot_printv("Sending boot message. Please reboot the target...");
 
 	do {
 		rc = tcflush(tty, TCIOFLUSH);

@@ -277,11 +296,11 @@ kwboot_bootmsg(int tty, void *msg)
 
 		rc = kwboot_tty_send(tty, msg, 8);
 		if (rc) {
-			usleep(KWBOOT_MSG_REQ_DELAY * 1000);
+			usleep(msg_req_delay * 1000);
 			continue;
 		}
 
-		rc = kwboot_tty_recv(tty, &c, 1, KWBOOT_MSG_RSP_TIMEO);
+		rc = kwboot_tty_recv(tty, &c, 1, msg_rsp_timeo);
 
 		kwboot_spinner();
 

@@ -293,6 +312,37 @@ kwboot_bootmsg(int tty, void *msg)
 }
 
 static int
+kwboot_debugmsg(int tty, void *msg)
+{
+	int rc;
+
+	kwboot_printv("Sending debug message. Please reboot the target...");
+
+	do {
+		char buf[16];
+
+		rc = tcflush(tty, TCIOFLUSH);
+		if (rc)
+			break;
+
+		rc = kwboot_tty_send(tty, msg, 8);
+		if (rc) {
+			usleep(msg_req_delay * 1000);
+			continue;
+		}
+
+		rc = kwboot_tty_recv(tty, buf, 16, msg_rsp_timeo);
+
+		kwboot_spinner();
+
+	} while (rc);
+
+	kwboot_printv("\n");
+
+	return rc;
+}
+
+static int
 kwboot_xm_makeblock(struct kwboot_block *block, const void *data,
 		    size_t size, int pnum)
 {

@@ -300,6 +350,7 @@ kwboot_xm_makeblock(struct kwboot_block *block, const void *data,
 	size_t n;
 	int i;
 
+	block->soh = SOH;
 	block->pnum = pnum;
 	block->_pnum = ~block->pnum;
 

@@ -326,9 +377,15 @@ kwboot_xm_sendblock(int fd, struct kwboot_block *block)
 		if (rc)
 			break;
 
-		rc = kwboot_tty_recv(fd, &c, 1, KWBOOT_BLK_RSP_TIMEO);
-		if (rc)
-			break;
+		do {
+			rc = kwboot_tty_recv(fd, &c, 1, KWBOOT_BLK_RSP_TIMEO);
+			if (rc)
+				break;
+
+			if (c != ACK && c != NAK && c != CAN)
+				printf("%c", c);
+
+		} while (c != ACK && c != NAK && c != CAN);
 
 		if (c != ACK)
 			kwboot_progress(-1, '+');

@@ -511,7 +568,6 @@ kwboot_mmap_image(const char *path, size_t *size, int prot)
 	void *img;
 
 	rc = -1;
-	fd = -1;
 	img = NULL;
 
 	fd = open(path, O_RDONLY);

@@ -601,11 +657,16 @@ static void
 kwboot_usage(FILE *stream, char *progname)
 {
 	fprintf(stream,
-		"Usage: %s -b <image> [ -p ] [ -t ] "
-		"[-B <baud> ] <TTY>\n", progname);
+		"Usage: %s [-d | -a | -b <image> | -D <image> ] [ -t ] [-B <baud> ] <TTY>\n",
+		progname);
 	fprintf(stream, "\n");
-	fprintf(stream, "  -b <image>: boot <image>\n");
+	fprintf(stream,
+		"  -b <image>: boot <image> with preamble (Kirkwood, Armada 370/XP)\n");
 	fprintf(stream, "  -p: patch <image> to type 0x69 (uart boot)\n");
+	fprintf(stream,
+		"  -D <image>: boot <image> without preamble (Dove)\n");
+	fprintf(stream, "  -d: enter debug mode\n");
+	fprintf(stream, "  -a: use timings for Armada XP\n");
 	fprintf(stream, "\n");
 	fprintf(stream, "  -t: mini terminal\n");
 	fprintf(stream, "\n");

@@ -619,6 +680,7 @@ main(int argc, char **argv)
 	const char *ttypath, *imgpath;
 	int rv, rc, tty, term, prot, patch;
 	void *bootmsg;
+	void *debugmsg;
 	void *img;
 	size_t size;
 	speed_t speed;

@@ -626,6 +688,7 @@ main(int argc, char **argv)
 	rv = 1;
 	tty = -1;
 	bootmsg = NULL;
+	debugmsg = NULL;
 	imgpath = NULL;
 	img = NULL;
 	term = 0;

@@ -636,7 +699,7 @@ main(int argc, char **argv)
 	kwboot_verbose = isatty(STDOUT_FILENO);
 
 	do {
-		int c = getopt(argc, argv, "hb:ptB:");
+		int c = getopt(argc, argv, "hb:ptaB:dD:");
 		if (c < 0)
 			break;
 

@@ -646,6 +709,15 @@ main(int argc, char **argv)
 			imgpath = optarg;
 			break;
 
+		case 'D':
+			bootmsg = NULL;
+			imgpath = optarg;
+			break;
+
+		case 'd':
+			debugmsg = kwboot_msg_debug;
+			break;
+
 		case 'p':
 			patch = 1;
 			break;

@@ -654,6 +726,11 @@ main(int argc, char **argv)
 			term = 1;
 			break;
 
+		case 'a':
+			msg_req_delay = KWBOOT_MSG_REQ_DELAY_AXP;
+			msg_rsp_timeo = KWBOOT_MSG_RSP_TIMEO_AXP;
+			break;
+
 		case 'B':
 			speed = kwboot_tty_speed(atoi(optarg));
 			if (speed == -1)

@@ -667,7 +744,7 @@ main(int argc, char **argv)
 		}
 	} while (1);
 
-	if (!bootmsg && !term)
+	if (!bootmsg && !term && !debugmsg)
 		goto usage;
 
 	if (patch && !imgpath)

@@ -702,7 +779,13 @@ main(int argc, char **argv)
 		}
 	}
 
-	if (bootmsg) {
+	if (debugmsg) {
+		rc = kwboot_debugmsg(tty, debugmsg);
+		if (rc) {
+			perror("debugmsg");
+			goto out;
+		}
+	} else {
 		rc = kwboot_bootmsg(tty, bootmsg);
 		if (rc) {
 			perror("bootmsg");

index 109d616..1120e9b 100644
@@ -1,364 +1,805 @@
 /*
- * (C) Copyright 2008
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Prafulla Wadaskar <[email protected]>
+ * Image manipulator for Marvell SoCs
+ *  supports Kirkwood, Dove, Armada 370, and Armada XP
+ *
+ * (C) Copyright 2013 Thomas Petazzoni
+ * <[email protected]>
  *
  * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Not implemented: support for the register headers and secure
+ * headers in v1 images
  */
 
 #include "imagetool.h"
 #include <image.h>
+#include <stdint.h>
 #include "kwbimage.h"
 
-/*
- * Supported commands for configuration file
- */
-static table_entry_t kwbimage_cmds[] = {
-	{CMD_BOOT_FROM,		"BOOT_FROM",		"boot command",	},
-	{CMD_NAND_ECC_MODE,	"NAND_ECC_MODE",	"NAND mode",	},
-	{CMD_NAND_PAGE_SIZE,	"NAND_PAGE_SIZE",	"NAND size",	},
-	{CMD_SATA_PIO_MODE,	"SATA_PIO_MODE",	"SATA mode",	},
-	{CMD_DDR_INIT_DELAY,	"DDR_INIT_DELAY",	"DDR init dly",	},
-	{CMD_DATA,		"DATA",			"Reg Write Data", },
-	{CMD_INVALID,		"",			"",	},
+#define ALIGN_SUP(x, a) (((x) + (a - 1)) & ~(a - 1))
+
+/* Structure of the main header, version 0 (Kirkwood, Dove) */
+struct main_hdr_v0 {
+	uint8_t  blockid;		/*0     */
+	uint8_t  nandeccmode;		/*1     */
+	uint16_t nandpagesize;		/*2-3   */
+	uint32_t blocksize;		/*4-7   */
+	uint32_t rsvd1;			/*8-11  */
+	uint32_t srcaddr;		/*12-15 */
+	uint32_t destaddr;		/*16-19 */
+	uint32_t execaddr;		/*20-23 */
+	uint8_t  satapiomode;		/*24    */
+	uint8_t  rsvd3;			/*25    */
+	uint16_t ddrinitdelay;		/*26-27 */
+	uint16_t rsvd2;			/*28-29 */
+	uint8_t  ext;			/*30    */
+	uint8_t  checksum;		/*31    */
+};
+
+struct ext_hdr_v0_reg {
+	uint32_t raddr;
+	uint32_t rdata;
+};
+
+#define EXT_HDR_V0_REG_COUNT ((0x1dc - 0x20) / sizeof(struct ext_hdr_v0_reg))
+
+struct ext_hdr_v0 {
+	uint32_t              offset;
+	uint8_t               reserved[0x20 - sizeof(uint32_t)];
+	struct ext_hdr_v0_reg rcfg[EXT_HDR_V0_REG_COUNT];
+	uint8_t               reserved2[7];
+	uint8_t               checksum;
+};
+
+/* Structure of the main header, version 1 (Armada 370, Armada XP) */
+struct main_hdr_v1 {
+	uint8_t  blockid;               /* 0 */
+	uint8_t  reserved1;             /* 1 */
+	uint16_t reserved2;             /* 2-3 */
+	uint32_t blocksize;             /* 4-7 */
+	uint8_t  version;               /* 8 */
+	uint8_t  headersz_msb;          /* 9 */
+	uint16_t headersz_lsb;          /* A-B */
+	uint32_t srcaddr;               /* C-F */
+	uint32_t destaddr;              /* 10-13 */
+	uint32_t execaddr;              /* 14-17 */
+	uint8_t  reserved3;             /* 18 */
+	uint8_t  nandblocksize;         /* 19 */
+	uint8_t  nandbadblklocation;    /* 1A */
+	uint8_t  reserved4;             /* 1B */
+	uint16_t reserved5;             /* 1C-1D */
+	uint8_t  ext;                   /* 1E */
+	uint8_t  checksum;              /* 1F */
 };
 
 /*
- * Supported Boot options for configuration file
+ * Header for the optional headers, version 1 (Armada 370, Armada XP)
  */
-static table_entry_t kwbimage_bootops[] = {
-	{IBR_HDR_SPI_ID,	"spi",		"SPI Flash",	},
-	{IBR_HDR_NAND_ID,	"nand",		"NAND Flash",	},
-	{IBR_HDR_SATA_ID,	"sata",		"Sata port",	},
-	{IBR_HDR_PEX_ID,	"pex",		"PCIe port",	},
-	{IBR_HDR_UART_ID,	"uart",		"Serial port",	},
-	{-1,			"",		"Invalid",	},
+struct opt_hdr_v1 {
+	uint8_t  headertype;
+	uint8_t  headersz_msb;
+	uint16_t headersz_lsb;
+	char     data[0];
 };
 
 /*
- * Supported NAND ecc options configuration file
+ * Various values for the opt_hdr_v1->headertype field, describing the
+ * different types of optional headers. The "secure" header contains
+ * informations related to secure boot (encryption keys, etc.). The
+ * "binary" header contains ARM binary code to be executed prior to
+ * executing the main payload (usually the bootloader). This is
+ * typically used to execute DDR3 training code. The "register" header
+ * allows to describe a set of (address, value) tuples that are
+ * generally used to configure the DRAM controller.
  */
-static table_entry_t kwbimage_eccmodes[] = {
-	{IBR_HDR_ECC_DEFAULT,		"default",	"Default mode",	},
-	{IBR_HDR_ECC_FORCED_HAMMING,	"hamming",	"Hamming mode",	},
-	{IBR_HDR_ECC_FORCED_RS,		"rs",		"RS mode",	},
-	{IBR_HDR_ECC_DISABLED,		"disabled",	"ECC Disabled",	},
-	{-1,				"",		"",	},
+#define OPT_HDR_V1_SECURE_TYPE   0x1
+#define OPT_HDR_V1_BINARY_TYPE   0x2
+#define OPT_HDR_V1_REGISTER_TYPE 0x3
+
+#define KWBHEADER_V1_SIZE(hdr) \
+	(((hdr)->headersz_msb << 16) | (hdr)->headersz_lsb)
+
+static struct image_cfg_element *image_cfg;
+static int cfgn;
+
+struct boot_mode {
+	unsigned int id;
+	const char *name;
+};
+
+struct boot_mode boot_modes[] = {
+	{ 0x4D, "i2c"  },
+	{ 0x5A, "spi"  },
+	{ 0x8B, "nand" },
+	{ 0x78, "sata" },
+	{ 0x9C, "pex"  },
+	{ 0x69, "uart" },
+	{},
 };
 
-static struct kwb_header kwbimage_header;
-static int datacmd_cnt = 0;
-static char * fname = "Unknown";
-static int lineno = -1;
+struct nand_ecc_mode {
+	unsigned int id;
+	const char *name;
+};
+
+struct nand_ecc_mode nand_ecc_modes[] = {
+	{ 0x00, "default" },
+	{ 0x01, "hamming" },
+	{ 0x02, "rs" },
+	{ 0x03, "disabled" },
+	{},
+};
+
+/* Used to identify an undefined execution or destination address */
+#define ADDR_INVALID ((uint32_t)-1)
+
+#define BINARY_MAX_ARGS 8
+
+/* In-memory representation of a line of the configuration file */
+struct image_cfg_element {
+	enum {
+		IMAGE_CFG_VERSION = 0x1,
+		IMAGE_CFG_BOOT_FROM,
+		IMAGE_CFG_DEST_ADDR,
+		IMAGE_CFG_EXEC_ADDR,
+		IMAGE_CFG_NAND_BLKSZ,
+		IMAGE_CFG_NAND_BADBLK_LOCATION,
+		IMAGE_CFG_NAND_ECC_MODE,
+		IMAGE_CFG_NAND_PAGESZ,
+		IMAGE_CFG_BINARY,
+		IMAGE_CFG_PAYLOAD,
+		IMAGE_CFG_DATA,
+	} type;
+	union {
+		unsigned int version;
+		unsigned int bootfrom;
+		struct {
+			const char *file;
+			unsigned int args[BINARY_MAX_ARGS];
+			unsigned int nargs;
+		} binary;
+		const char *payload;
+		unsigned int dstaddr;
+		unsigned int execaddr;
+		unsigned int nandblksz;
+		unsigned int nandbadblklocation;
+		unsigned int nandeccmode;
+		unsigned int nandpagesz;
+		struct ext_hdr_v0_reg regdata;
+	};
+};
+
+#define IMAGE_CFG_ELEMENT_MAX 256
 
 /*
- * Report Error if xflag is set in addition to default
+ * Byte 8 of the image header contains the version number. In the v0
+ * header, byte 8 was reserved, and always set to 0. In the v1 header,
+ * byte 8 has been changed to a proper field, set to 1.
  */
-static int kwbimage_check_params(struct image_tool_params *params)
+static unsigned int image_version(void *header)
 {
-	if (!strlen (params->imagename)) {
-		printf ("Error:%s - Configuration file not specified, "
-			"it is needed for kwbimage generation\n",
-			params->cmdname);
-		return CFG_INVALID;
-	}
-	return	((params->dflag && (params->fflag || params->lflag)) ||
-		(params->fflag && (params->dflag || params->lflag)) ||
-		(params->lflag && (params->dflag || params->fflag)) ||
-		(params->xflag) || !(strlen (params->imagename)));
+	unsigned char *ptr = header;
+	return ptr[8];
+}
+
+/*
+ * Utility functions to manipulate boot mode and ecc modes (convert
+ * them back and forth between description strings and the
+ * corresponding numerical identifiers).
+ */
+
+static const char *image_boot_mode_name(unsigned int id)
+{
+	int i;
+	for (i = 0; boot_modes[i].name; i++)
+		if (boot_modes[i].id == id)
+			return boot_modes[i].name;
+	return NULL;
+}
+
+int image_boot_mode_id(const char *boot_mode_name)
+{
+	int i;
+	for (i = 0; boot_modes[i].name; i++)
+		if (!strcmp(boot_modes[i].name, boot_mode_name))
+			return boot_modes[i].id;
+
+	return -1;
+}
+
+int image_nand_ecc_mode_id(const char *nand_ecc_mode_name)
+{
+	int i;
+	for (i = 0; nand_ecc_modes[i].name; i++)
+		if (!strcmp(nand_ecc_modes[i].name, nand_ecc_mode_name))
+			return nand_ecc_modes[i].id;
+	return -1;
 }
 
-static uint32_t check_get_hexval (char *token)
+static struct image_cfg_element *
+image_find_option(unsigned int optiontype)
 {
-	uint32_t hexval;
+	int i;
 
-	if (!sscanf (token, "%x", &hexval)) {
-		printf ("Error:%s[%d] - Invalid hex data(%s)\n", fname,
-			lineno, token);
-		exit (EXIT_FAILURE);
+	for (i = 0; i < cfgn; i++) {
+		if (image_cfg[i].type == optiontype)
+			return &image_cfg[i];
 	}
-	return hexval;
+
+	return NULL;
+}
+
+static unsigned int
+image_count_options(unsigned int optiontype)
+{
+	int i;
+	unsigned int count = 0;
+
+	for (i = 0; i < cfgn; i++)
+		if (image_cfg[i].type == optiontype)
+			count++;
+
+	return count;
 }
 
 /*
- * Generates 8 bit checksum
+ * Compute a 8-bit checksum of a memory area. This algorithm follows
+ * the requirements of the Marvell SoC BootROM specifications.
  */
-static uint8_t kwbimage_checksum8 (void *start, uint32_t len, uint8_t csum)
+static uint8_t image_checksum8(void *start, uint32_t len)
 {
-	register uint8_t sum = csum;
-	volatile uint8_t *p = (volatile uint8_t *)start;
+	uint8_t csum = 0;
+	uint8_t *p = start;
 
 	/* check len and return zero checksum if invalid */
 	if (!len)
 		return 0;
 
 	do {
-		sum += *p;
+		csum += *p;
 		p++;
 	} while (--len);
-	return (sum);
+
+	return csum;
 }
 
-/*
- * Generates 32 bit checksum
- */
-static uint32_t kwbimage_checksum32 (uint32_t *start, uint32_t len, uint32_t csum)
+static uint32_t image_checksum32(void *start, uint32_t len)
 {
-	register uint32_t sum = csum;
-	volatile uint32_t *p = start;
+	uint32_t csum = 0;
+	uint32_t *p = start;
 
 	/* check len and return zero checksum if invalid */
 	if (!len)
 		return 0;
 
 	if (len % sizeof(uint32_t)) {
-		printf ("Error:%s[%d] - length is not in multiple of %zu\n",
-			__FUNCTION__, len, sizeof(uint32_t));
+		fprintf(stderr, "Length %d is not in multiple of %zu\n",
+			len, sizeof(uint32_t));
 		return 0;
 	}
 
 	do {
-		sum += *p;
+		csum += *p;
 		p++;
 		len -= sizeof(uint32_t);
 	} while (len > 0);
-	return (sum);
+
+	return csum;
 }
 
-static void kwbimage_check_cfgdata (char *token, enum kwbimage_cmd cmdsw,
-					struct kwb_header *kwbhdr)
+static void *image_create_v0(size_t *imagesz, struct image_tool_params *params,
+			     int payloadsz)
 {
-	bhr_t *mhdr = &kwbhdr->kwb_hdr;
-	extbhr_t *exthdr = &kwbhdr->kwb_exthdr;
-	int i;
+	struct image_cfg_element *e;
+	size_t headersz;
+	struct main_hdr_v0 *main_hdr;
+	struct ext_hdr_v0 *ext_hdr;
+	void *image;
+	int has_ext = 0;
+
+	/*
+	 * Calculate the size of the header and the size of the
+	 * payload
+	 */
+	headersz  = sizeof(struct main_hdr_v0);
+
+	if (image_count_options(IMAGE_CFG_DATA) > 0) {
+		has_ext = 1;
+		headersz += sizeof(struct ext_hdr_v0);
+	}
+
+	if (image_count_options(IMAGE_CFG_PAYLOAD) > 1) {
+		fprintf(stderr, "More than one payload, not possible\n");
+		return NULL;
+	}
 
-	switch (cmdsw) {
-	case CMD_BOOT_FROM:
-		i = get_table_entry_id (kwbimage_bootops,
-				"Kwbimage boot option", token);
-
-		if (i < 0)
-			goto INVL_DATA;
-
-		mhdr->blockid = i;
-		printf ("Preparing kirkwood boot image to boot "
-			"from %s\n", token);
-		break;
-	case CMD_NAND_ECC_MODE:
-		i = get_table_entry_id (kwbimage_eccmodes,
-			"NAND ecc mode", token);
-
-		if (i < 0)
-			goto INVL_DATA;
-
-		mhdr->nandeccmode = i;
-		printf ("Nand ECC mode = %s\n", token);
-		break;
-	case CMD_NAND_PAGE_SIZE:
-		mhdr->nandpagesize =
-			(uint16_t) check_get_hexval (token);
-		printf ("Nand page size = 0x%x\n", mhdr->nandpagesize);
-		break;
-	case CMD_SATA_PIO_MODE:
-		mhdr->satapiomode =
-			(uint8_t) check_get_hexval (token);
-		printf ("Sata PIO mode = 0x%x\n",
-				mhdr->satapiomode);
-		break;
-	case CMD_DDR_INIT_DELAY:
-		mhdr->ddrinitdelay =
-			(uint16_t) check_get_hexval (token);
-		printf ("DDR init delay = %d msec\n", mhdr->ddrinitdelay);
-		break;
-	case CMD_DATA:
-		exthdr->rcfg[datacmd_cnt].raddr =
-			check_get_hexval (token);
-
-		break;
-	case CMD_INVALID:
-		goto INVL_DATA;
-	default:
-		goto INVL_DATA;
+	image = malloc(headersz);
+	if (!image) {
+		fprintf(stderr, "Cannot allocate memory for image\n");
+		return NULL;
 	}
-	return;
 
-INVL_DATA:
-	printf ("Error:%s[%d] - Invalid data\n", fname, lineno);
-	exit (EXIT_FAILURE);
+	memset(image, 0, headersz);
+
+	main_hdr = image;
+
+	/* Fill in the main header */
+	main_hdr->blocksize = payloadsz + sizeof(uint32_t);
+	main_hdr->srcaddr   = headersz;
+	main_hdr->ext       = has_ext;
+	main_hdr->destaddr  = params->addr;
+	main_hdr->execaddr  = params->ep;
+
+	e = image_find_option(IMAGE_CFG_BOOT_FROM);
+	if (e)
+		main_hdr->blockid = e->bootfrom;
+	e = image_find_option(IMAGE_CFG_NAND_ECC_MODE);
+	if (e)
+		main_hdr->nandeccmode = e->nandeccmode;
+	e = image_find_option(IMAGE_CFG_NAND_PAGESZ);
+	if (e)
+		main_hdr->nandpagesize = e->nandpagesz;
+	main_hdr->checksum = image_checksum8(image,
+					     sizeof(struct main_hdr_v0));
+
+	/* Generate the ext header */
+	if (has_ext) {
+		int cfgi, datai;
+
+		ext_hdr = image + sizeof(struct main_hdr_v0);
+		ext_hdr->offset = 0x40;
+
+		for (cfgi = 0, datai = 0; cfgi < cfgn; cfgi++) {
+			e = &image_cfg[cfgi];
+			if (e->type != IMAGE_CFG_DATA)
+				continue;
+
+			ext_hdr->rcfg[datai].raddr = e->regdata.raddr;
+			ext_hdr->rcfg[datai].rdata = e->regdata.rdata;
+			datai++;
+		}
+
+		ext_hdr->checksum = image_checksum8(ext_hdr,
+						    sizeof(struct ext_hdr_v0));
+	}
+
+	*imagesz = headersz;
+	return image;
 }
 
-/*
- * this function sets the kwbimage header by-
- * 	1. Abstracting input command line arguments data
- *	2. parses the kwbimage configuration file and update extebded header data
- *	3. calculates header, extended header and image checksums
- */
-static void kwdimage_set_ext_header (struct kwb_header *kwbhdr, char* name) {
-	bhr_t *mhdr = &kwbhdr->kwb_hdr;
-	extbhr_t *exthdr = &kwbhdr->kwb_exthdr;
-	FILE *fd = NULL;
-	int j;
-	char *line = NULL;
-	char * token, *saveptr1, *saveptr2;
-	size_t len = 0;
-	enum kwbimage_cmd cmd;
-
-	fname = name;
-	/* set dram register offset */
-	exthdr->dramregsoffs = (intptr_t)&exthdr->rcfg - (intptr_t)mhdr;
-
-	if ((fd = fopen (name, "r")) == 0) {
-		printf ("Error:%s - Can't open\n", fname);
-		exit (EXIT_FAILURE);
+static size_t image_headersz_v1(struct image_tool_params *params,
+				int *hasext)
+{
+	struct image_cfg_element *binarye;
+	size_t headersz;
+	int ret;
+
+	/*
+	 * Calculate the size of the header and the size of the
+	 * payload
+	 */
+	headersz = sizeof(struct main_hdr_v1);
+
+	if (image_count_options(IMAGE_CFG_BINARY) > 1) {
+		fprintf(stderr, "More than one binary blob, not supported\n");
+		return 0;
 	}
 
-	/* Simple kwimage.cfg file parser */
-	lineno=0;
-	while ((getline (&line, &len, fd)) > 0) {
-		lineno++;
-		token = strtok_r (line, "\r\n", &saveptr1);
-		/* drop all lines with zero tokens (= empty lines) */
-		if (token == NULL)
-			continue;
+	if (image_count_options(IMAGE_CFG_PAYLOAD) > 1) {
+		fprintf(stderr, "More than one payload, not possible\n");
+		return 0;
+	}
 
-		for (j = 0, cmd = CMD_INVALID, line = token; ; line = NULL) {
-			token = strtok_r (line, " \t", &saveptr2);
-			if (token == NULL)
-			break;
-			/* Drop all text starting with '#' as comments */
-			if (token[0] == '#')
-				break;
+	binarye = image_find_option(IMAGE_CFG_BINARY);
+	if (binarye) {
+		struct stat s;
+
+		ret = stat(binarye->binary.file, &s);
+		if (ret < 0) {
+			char *cwd = get_current_dir_name();
+			fprintf(stderr,
+				"Didn't find the file '%s' in '%s' which is mandatory to generate the image\n"
+				"This file generally contains the DDR3 training code, and should be extracted from an existing bootable\n"
+				"image for your board. See 'kwbimage -x' to extract it from an existing image.\n",
+				binarye->binary.file, cwd);
+			free(cwd);
+			return 0;
+		}
 
-			/* Process rest as valid config command line */
-			switch (j) {
-			case CFG_COMMAND:
-				cmd = get_table_entry_id (kwbimage_cmds,
-						"Kwbimage command", token);
+		headersz += s.st_size +
+			binarye->binary.nargs * sizeof(unsigned int);
+		if (hasext)
+			*hasext = 1;
+	}
 
-				if (cmd == CMD_INVALID)
-					goto INVL_CMD;
-				break;
+	/*
+	 * The payload should be aligned on some reasonable
+	 * boundary
+	 */
+	return ALIGN_SUP(headersz, 4096);
+}
 
-			case CFG_DATA0:
-				kwbimage_check_cfgdata (token, cmd, kwbhdr);
-				break;
+static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,
+			     int payloadsz)
+{
+	struct image_cfg_element *e, *binarye;
+	struct main_hdr_v1 *main_hdr;
+	size_t headersz;
+	void *image, *cur;
+	int hasext = 0;
+	int ret;
+
+	/*
+	 * Calculate the size of the header and the size of the
+	 * payload
+	 */
+	headersz = image_headersz_v1(params, &hasext);
+	if (headersz == 0)
+		return NULL;
+
+	image = malloc(headersz);
+	if (!image) {
+		fprintf(stderr, "Cannot allocate memory for image\n");
+		return NULL;
+	}
 
-			case CFG_DATA1:
-				if (cmd != CMD_DATA)
-					goto INVL_CMD;
-
-				exthdr->rcfg[datacmd_cnt].rdata =
-						check_get_hexval (token);
-
-				if (datacmd_cnt > KWBIMAGE_MAX_CONFIG ) {
-					printf ("Error:%s[%d] - Found more "
-						"than max(%zd) allowed "
-						"data configurations\n",
-						fname, lineno,
-						KWBIMAGE_MAX_CONFIG);
-				exit (EXIT_FAILURE);
-				} else
-					datacmd_cnt++;
-				break;
+	memset(image, 0, headersz);
+
+	cur = main_hdr = image;
+	cur += sizeof(struct main_hdr_v1);
+
+	/* Fill the main header */
+	main_hdr->blocksize    = payloadsz - headersz + sizeof(uint32_t);
+	main_hdr->headersz_lsb = headersz & 0xFFFF;
+	main_hdr->headersz_msb = (headersz & 0xFFFF0000) >> 16;
+	main_hdr->destaddr     = params->addr;
+	main_hdr->execaddr     = params->ep;
+	main_hdr->srcaddr      = headersz;
+	main_hdr->ext          = hasext;
+	main_hdr->version      = 1;
+	e = image_find_option(IMAGE_CFG_BOOT_FROM);
+	if (e)
+		main_hdr->blockid = e->bootfrom;
+	e = image_find_option(IMAGE_CFG_NAND_BLKSZ);
+	if (e)
+		main_hdr->nandblocksize = e->nandblksz / (64 * 1024);
+	e = image_find_option(IMAGE_CFG_NAND_BADBLK_LOCATION);
+	if (e)
+		main_hdr->nandbadblklocation = e->nandbadblklocation;
+
+	binarye = image_find_option(IMAGE_CFG_BINARY);
+	if (binarye) {
+		struct opt_hdr_v1 *hdr = cur;
+		unsigned int *args;
+		size_t binhdrsz;
+		struct stat s;
+		int argi;
+		FILE *bin;
+
+		hdr->headertype = OPT_HDR_V1_BINARY_TYPE;
+
+		bin = fopen(binarye->binary.file, "r");
+		if (!bin) {
+			fprintf(stderr, "Cannot open binary file %s\n",
+				binarye->binary.file);
+			return NULL;
+		}
+
+		fstat(fileno(bin), &s);
+
+		binhdrsz = sizeof(struct opt_hdr_v1) +
+			(binarye->binary.nargs + 1) * sizeof(unsigned int) +
+			s.st_size;
+		hdr->headersz_lsb = binhdrsz & 0xFFFF;
+		hdr->headersz_msb = (binhdrsz & 0xFFFF0000) >> 16;
+
+		cur += sizeof(struct opt_hdr_v1);
+
+		args = cur;
+		*args = binarye->binary.nargs;
+		args++;
+		for (argi = 0; argi < binarye->binary.nargs; argi++)
+			args[argi] = binarye->binary.args[argi];
+
+		cur += (binarye->binary.nargs + 1) * sizeof(unsigned int);
+
+		ret = fread(cur, s.st_size, 1, bin);
+		if (ret != 1) {
+			fprintf(stderr,
+				"Could not read binary image %s\n",
+				binarye->binary.file);
+			return NULL;
+		}
+
+		fclose(bin);
 
-			default:
-				goto INVL_CMD;
+		cur += s.st_size;
+
+		/*
+		 * For now, we don't support more than one binary
+		 * header, and no other header types are
+		 * supported. So, the binary header is necessarily the
+		 * last one
+		 */
+		*((unsigned char *)cur) = 0;
+
+		cur += sizeof(uint32_t);
+	}
+
+	/* Calculate and set the header checksum */
+	main_hdr->checksum = image_checksum8(main_hdr, headersz);
+
+	*imagesz = headersz;
+	return image;
+}
+
+static int image_create_config_parse_oneline(char *line,
+					     struct image_cfg_element *el)
+{
+	char *keyword, *saveptr;
+	char deliminiters[] = " \t";
+
+	keyword = strtok_r(line, deliminiters, &saveptr);
+	if (!strcmp(keyword, "VERSION")) {
+		char *value = strtok_r(NULL, deliminiters, &saveptr);
+		el->type = IMAGE_CFG_VERSION;
+		el->version = atoi(value);
+	} else if (!strcmp(keyword, "BOOT_FROM")) {
+		char *value = strtok_r(NULL, deliminiters, &saveptr);
+		el->type = IMAGE_CFG_BOOT_FROM;
+		el->bootfrom = image_boot_mode_id(value);
+		if (el->bootfrom < 0) {
+			fprintf(stderr,
+				"Invalid boot media '%s'\n", value);
+			return -1;
+		}
+	} else if (!strcmp(keyword, "NAND_BLKSZ")) {
+		char *value = strtok_r(NULL, deliminiters, &saveptr);
+		el->type = IMAGE_CFG_NAND_BLKSZ;
+		el->nandblksz = strtoul(value, NULL, 16);
+	} else if (!strcmp(keyword, "NAND_BADBLK_LOCATION")) {
+		char *value = strtok_r(NULL, deliminiters, &saveptr);
+		el->type = IMAGE_CFG_NAND_BADBLK_LOCATION;
+		el->nandbadblklocation =
+			strtoul(value, NULL, 16);
+	} else if (!strcmp(keyword, "NAND_ECC_MODE")) {
+		char *value = strtok_r(NULL, deliminiters, &saveptr);
+		el->type = IMAGE_CFG_NAND_ECC_MODE;
+		el->nandeccmode = image_nand_ecc_mode_id(value);
+		if (el->nandeccmode < 0) {
+			fprintf(stderr,
+				"Invalid NAND ECC mode '%s'\n", value);
+			return -1;
+		}
+	} else if (!strcmp(keyword, "NAND_PAGE_SIZE")) {
+		char *value = strtok_r(NULL, deliminiters, &saveptr);
+		el->type = IMAGE_CFG_NAND_PAGESZ;
+		el->nandpagesz = strtoul(value, NULL, 16);
+	} else if (!strcmp(keyword, "BINARY")) {
+		char *value = strtok_r(NULL, deliminiters, &saveptr);
+		int argi = 0;
+
+		el->type = IMAGE_CFG_BINARY;
+		el->binary.file = strdup(value);
+		while (1) {
+			value = strtok_r(NULL, deliminiters, &saveptr);
+			if (!value)
+				break;
+			el->binary.args[argi] = strtoul(value, NULL, 16);
+			argi++;
+			if (argi >= BINARY_MAX_ARGS) {
+				fprintf(stderr,
+					"Too many argument for binary\n");
+				return -1;
 			}
-			j++;
 		}
+		el->binary.nargs = argi;
+	} else if (!strcmp(keyword, "DATA")) {
+		char *value1 = strtok_r(NULL, deliminiters, &saveptr);
+		char *value2 = strtok_r(NULL, deliminiters, &saveptr);
+
+		if (!value1 || !value2) {
+			fprintf(stderr,
+				"Invalid number of arguments for DATA\n");
+			return -1;
+		}
+
+		el->type = IMAGE_CFG_DATA;
+		el->regdata.raddr = strtoul(value1, NULL, 16);
+		el->regdata.rdata = strtoul(value2, NULL, 16);
+	} else {
+		fprintf(stderr, "Ignoring unknown line '%s'\n", line);
 	}
-	if (line)
-		free (line);
 
-	fclose (fd);
-	return;
+	return 0;
+}
 
 /*
- * Invalid Command error reporring
- *
- * command CMD_DATA needs three strings on a line
- * whereas other commands need only two.
- *
- * if more than two/three (as per command type) are observed,
- * then error will be reported
+ * Parse the configuration file 'fcfg' into the array of configuration
+ * elements 'image_cfg', and return the number of configuration
+ * elements in 'cfgn'.
  */
-INVL_CMD:
-	printf ("Error:%s[%d] - Invalid command\n", fname, lineno);
-	exit (EXIT_FAILURE);
+static int image_create_config_parse(FILE *fcfg)
+{
+	int ret;
+	int cfgi = 0;
+
+	/* Parse the configuration file */
+	while (!feof(fcfg)) {
+		char *line;
+		char buf[256];
+
+		/* Read the current line */
+		memset(buf, 0, sizeof(buf));
+		line = fgets(buf, sizeof(buf), fcfg);
+		if (!line)
+			break;
+
+		/* Ignore useless lines */
+		if (line[0] == '\n' || line[0] == '#')
+			continue;
+
+		/* Strip final newline */
+		if (line[strlen(line) - 1] == '\n')
+			line[strlen(line) - 1] = 0;
+
+		/* Parse the current line */
+		ret = image_create_config_parse_oneline(line,
+							&image_cfg[cfgi]);
+		if (ret)
+			return ret;
+
+		cfgi++;
+
+		if (cfgi >= IMAGE_CFG_ELEMENT_MAX) {
+			fprintf(stderr,
+				"Too many configuration elements in .cfg file\n");
+			return -1;
+		}
+	}
+
+	cfgn = cfgi;
+	return 0;
+}
+
+static int image_get_version(void)
+{
+	struct image_cfg_element *e;
+
+	e = image_find_option(IMAGE_CFG_VERSION);
+	if (!e)
+		return -1;
+
+	return e->version;
+}
+
+static int image_version_file(const char *input)
+{
+	FILE *fcfg;
+	int version;
+	int ret;
+
+	fcfg = fopen(input, "r");
+	if (!fcfg) {
+		fprintf(stderr, "Could not open input file %s\n", input);
+		return -1;
+	}
+
+	image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX *
+			   sizeof(struct image_cfg_element));
+	if (!image_cfg) {
+		fprintf(stderr, "Cannot allocate memory\n");
+		fclose(fcfg);
+		return -1;
+	}
+
+	memset(image_cfg, 0,
+	       IMAGE_CFG_ELEMENT_MAX * sizeof(struct image_cfg_element));
+	rewind(fcfg);
+
+	ret = image_create_config_parse(fcfg);
+	fclose(fcfg);
+	if (ret) {
+		free(image_cfg);
+		return -1;
+	}
+
+	version = image_get_version();
+	/* Fallback to version 0 is no version is provided in the cfg file */
+	if (version == -1)
+		version = 0;
+
+	free(image_cfg);
+
+	return version;
 }
 
-static void kwbimage_set_header (void *ptr, struct stat *sbuf, int ifd,
+static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd,
 				struct image_tool_params *params)
 {
-	struct kwb_header *hdr = (struct kwb_header *)ptr;
-	bhr_t *mhdr = &hdr->kwb_hdr;
-	extbhr_t *exthdr = &hdr->kwb_exthdr;
+	FILE *fcfg;
+	void *image = NULL;
+	int version;
+	size_t headersz;
 	uint32_t checksum;
+	int ret;
 	int size;
 
-	/* Build and add image checksum header */
-	checksum = kwbimage_checksum32 ((uint32_t *)ptr, sbuf->st_size, 0);
+	fcfg = fopen(params->imagename, "r");
+	if (!fcfg) {
+		fprintf(stderr, "Could not open input file %s\n",
+			params->imagename);
+		exit(EXIT_FAILURE);
+	}
+
+	image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX *
+			   sizeof(struct image_cfg_element));
+	if (!image_cfg) {
+		fprintf(stderr, "Cannot allocate memory\n");
+		fclose(fcfg);
+		exit(EXIT_FAILURE);
+	}
+
+	memset(image_cfg, 0,
+	       IMAGE_CFG_ELEMENT_MAX * sizeof(struct image_cfg_element));
+	rewind(fcfg);
+
+	ret = image_create_config_parse(fcfg);
+	fclose(fcfg);
+	if (ret) {
+		free(image_cfg);
+		exit(EXIT_FAILURE);
+	}
+
+	version = image_get_version();
+	/* Fallback to version 0 is no version is provided in the cfg file */
+	if (version == -1)
+		version = 0;
+
+	if (version == 0)
+		image = image_create_v0(&headersz, params, sbuf->st_size);
+	else if (version == 1)
+		image = image_create_v1(&headersz, params, sbuf->st_size);
+
+	if (!image) {
+		fprintf(stderr, "Could not create image\n");
+		free(image_cfg);
+		exit(EXIT_FAILURE);
+	}
+
+	free(image_cfg);
 
-	size = write (ifd, &checksum, sizeof(uint32_t));
+	/* Build and add image checksum header */
+	checksum = image_checksum32((uint32_t *)ptr, sbuf->st_size);
+	size = write(ifd, &checksum, sizeof(uint32_t));
 	if (size != sizeof(uint32_t)) {
-		printf ("Error:%s - Checksum write %d bytes %s\n",
+		fprintf(stderr, "Error:%s - Checksum write %d bytes %s\n",
 			params->cmdname, size, params->imagefile);
-		exit (EXIT_FAILURE);
+		exit(EXIT_FAILURE);
 	}
 
 	sbuf->st_size += sizeof(uint32_t);
 
-	mhdr->blocksize = sbuf->st_size - sizeof(struct kwb_header);
-	mhdr->srcaddr = sizeof(struct kwb_header);
-	mhdr->destaddr= params->addr;
-	mhdr->execaddr =params->ep;
-	mhdr->ext = 0x1; /* header extension appended */
-
-	kwdimage_set_ext_header (hdr, params->imagename);
-	/* calculate checksums */
-	mhdr->checkSum = kwbimage_checksum8 ((void *)mhdr, sizeof(bhr_t), 0);
-	exthdr->checkSum = kwbimage_checksum8 ((void *)exthdr,
-						sizeof(extbhr_t), 0);
-}
-
-static int kwbimage_verify_header (unsigned char *ptr, int image_size,
-			struct image_tool_params *params)
-{
-	struct kwb_header *hdr = (struct kwb_header *)ptr;
-	bhr_t *mhdr = &hdr->kwb_hdr;
-	extbhr_t *exthdr = &hdr->kwb_exthdr;
-	uint8_t calc_hdrcsum;
-	uint8_t calc_exthdrcsum;
-
-	calc_hdrcsum = kwbimage_checksum8 ((void *)mhdr,
-			sizeof(bhr_t) - sizeof(uint8_t), 0);
-	if (calc_hdrcsum != mhdr->checkSum)
-		return -FDT_ERR_BADSTRUCTURE;	/* mhdr csum not matched */
-
-	calc_exthdrcsum = kwbimage_checksum8 ((void *)exthdr,
-			sizeof(extbhr_t) - sizeof(uint8_t), 0);
-	if (calc_exthdrcsum != exthdr->checkSum)
-		return -FDT_ERR_BADSTRUCTURE; /* exthdr csum not matched */
+	/* Finally copy the header into the image area */
+	memcpy(ptr, image, headersz);
 
-	return 0;
+	free(image);
 }
 
-static void kwbimage_print_header (const void *ptr)
+static void kwbimage_print_header(const void *ptr)
 {
-	struct kwb_header *hdr = (struct kwb_header *) ptr;
-	bhr_t *mhdr = &hdr->kwb_hdr;
-	char *name = get_table_entry_name (kwbimage_bootops,
-				"Kwbimage boot option",
-				(int) mhdr->blockid);
-
-	printf ("Image Type:   Kirkwood Boot from %s Image\n", name);
-	printf ("Data Size:    ");
-	genimg_print_size (mhdr->blocksize - sizeof(uint32_t));
-	printf ("Load Address: %08x\n", mhdr->destaddr);
-	printf ("Entry Point:  %08x\n", mhdr->execaddr);
+	struct main_hdr_v0 *mhdr = (struct main_hdr_v0 *)ptr;
+
+	printf("Image Type:   MVEBU Boot from %s Image\n",
+	       image_boot_mode_name(mhdr->blockid));
+	printf("Data Size:    ");
+	printf("Image version:%d\n", image_version((void *)ptr));
+	genimg_print_size(mhdr->blocksize - sizeof(uint32_t));
+	printf("Load Address: %08x\n", mhdr->destaddr);
+	printf("Entry Point:  %08x\n", mhdr->execaddr);
 }
 
-static int kwbimage_check_image_types (uint8_t type)
+static int kwbimage_check_image_types(uint8_t type)
 {
 	if (type == IH_TYPE_KWBIMAGE)
 		return EXIT_SUCCESS;