kmp204x: set the ZL clk chips reset to power up only

PATCH New Valentin Longchamp 2 participants 8 messages Jul 17, 2014 – Aug 20, 2014

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Valentin Longchamp

author

2014-07-17 12:22 UTC #0 lore raw

PATCH 1/1 kmp204x: set the ZL clk chips reset to power up only

There is the requirement on the chassis's backplane that when the clocks are enabled, they should not disappear. Resetting theses chips at unit reset also has the side effect that their clocks disappear.

To avoid this side effect, both the ZL chips are reset only in the event of a power cycle.

Signed-off-by Valentin Longchamp <[email protected]>

---

 board/keymile/kmp204x/kmp204x.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

board/keymile/kmp204x/kmp204x.c +2 -2

index 6bc8eb8..638b2a3 100644
@@ -94,7 +94,7 @@ int board_early_init_f(void)
 	qrio_wdmask(BFTIC4_RST, true);
 
 	/* set the ZL30138's prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST);
 	/* and take it out of reset as soon as possible (needed for Hooper) */
 	qrio_prst(ZL30158_RST, false, false);

@@ -144,7 +144,7 @@ int misc_init_f(void)
 	qrio_prst(ETH_FRONT_PHY_RST, false, false);
 
 	/* set the ZL30343 prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST);
 	/* and enable the WD on it */
 	qrio_wdmask(ZL30343_RST, true);

Signature · 1 line

1.8.0.1

York Sun

2014-08-12 17:54 UTC #1 lore raw

PATCH 1/1 kmp204x: set the ZL clk chips reset to power up only

Quoted 2 lines · Valentin Longchamp

There is the requirement on the chassis's backplane that when the clocks are enabled, they should not disappear. Resetting theses chips at unit

I guess here "they" means the "clocks".

Quoted 1 line

reset also has the side effect that their clocks disappear.

What does "their" point to? Whose clocks?

Quoted 4 lines

To avoid this side effect, both the ZL chips are reset only in the event of a power cycle.

Do you mean "power up" here?

I suggest you rephrase your commit message. It sounds twisting.

Quoted 20 lines

Signed-off-by Valentin Longchamp <[email protected]>

---

 board/keymile/kmp204x/kmp204x.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

board/keymile/kmp204x/kmp204x.c +1 -1

index 6bc8eb8..638b2a3 100644
@@ -94,7 +94,7 @@ int board_early_init_f(void)
 	qrio_wdmask(BFTIC4_RST, true);
 
 	/* set the ZL30138's prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST);
 	/* and take it out of reset as soon as possible (needed for Hooper) */
 	qrio_prst(ZL30158_RST, false, false);

board/keymile/kmp204x/kmp204x.c int misc_init_f(void) · line 149

Quoted 7 lines

board/keymile/kmp204x/kmp204x.c +1 -1

@@ -144,7 +144,7 @@ int misc_init_f(void)
 	qrio_prst(ETH_FRONT_PHY_RST, false, false);
 
 	/* set the ZL30343 prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST);
 	/* and enable the WD on it */
 	qrio_wdmask(ZL30343_RST, true);

You changed the macros here but not the comments.

York

Valentin Longchamp

author

2014-08-13 06:15 UTC #2 lore raw

PATCH 1/1 kmp204x: set the ZL clk chips reset to power up only

Quoted 5 lines · York Sun

Quoted 2 lines · Valentin Longchamp
There is the requirement on the chassis's backplane that when the clocks are enabled, they should not disappear. Resetting theses chips at unit
I guess here "they" means the "clocks".

Yes, correct.

Quoted 4 lines

Quoted 2 lines
reset also has the side effect that their clocks disappear.
What does "their" point to? Whose clocks?

This refers to the "chips", that provide the clocks, the ZL clocking chips.

Quoted 7 lines

Quoted 5 lines
To avoid this side effect, both the ZL chips are reset only in the event of a power cycle.
Do you mean "power up" here?

Yes, correct

Quoted 2 lines

I suggest you rephrase your commit message. It sounds twisting.

Quoted 33 lines

Quoted 21 lines

Signed-off-by Valentin Longchamp <[email protected]>

---

 board/keymile/kmp204x/kmp204x.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

board/keymile/kmp204x/kmp204x.c +1 -1

index 6bc8eb8..638b2a3 100644
@@ -94,7 +94,7 @@ int board_early_init_f(void)
 	qrio_wdmask(BFTIC4_RST, true);
 
 	/* set the ZL30138's prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST);
 	/* and take it out of reset as soon as possible (needed for Hooper) */
 	qrio_prst(ZL30158_RST, false, false);

board/keymile/kmp204x/kmp204x.c int misc_init_f(void) · line 149

Quoted 7 lines

board/keymile/kmp204x/kmp204x.c +1 -1

@@ -144,7 +144,7 @@ int misc_init_f(void)
 	qrio_prst(ETH_FRONT_PHY_RST, false, false);
 
 	/* set the ZL30343 prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST);
 	/* and enable the WD on it */
 	qrio_wdmask(ZL30343_RST, true);

You changed the macros here but not the comments.

York

Valentin Longchamp

author

2014-08-13 08:17 UTC #3 lore raw

PATCH v2 1/1 kmp204x: reset the Zarlink clocking chips at power up only

In reply to Valentin Longchamp

There is the requirement on the chassis's backplane that when the clocks have been enabled, they then should not disappear.

Resetting the Zarlink clocking chips at unit reset violates this requirement because the backplane clocks are not supplied during the reset time.

To avoid this side effect, both the Zarlink clocking chips are reset only at power up.

Signed-off-by Valentin Longchamp <[email protected]>

---

Changes in v2:
- Improve the commit message for more clarity

 board/keymile/kmp204x/kmp204x.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

board/keymile/kmp204x/kmp204x.c +2 -2

index 6bc8eb8..638b2a3 100644
@@ -94,7 +94,7 @@ int board_early_init_f(void)
 	qrio_wdmask(BFTIC4_RST, true);
 
 	/* set the ZL30138's prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST);
 	/* and take it out of reset as soon as possible (needed for Hooper) */
 	qrio_prst(ZL30158_RST, false, false);

@@ -144,7 +144,7 @@ int misc_init_f(void)
 	qrio_prst(ETH_FRONT_PHY_RST, false, false);
 
 	/* set the ZL30343 prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST);
 	/* and enable the WD on it */
 	qrio_wdmask(ZL30343_RST, true);

Signature · 1 line

1.8.0.1

York Sun

2014-08-13 16:51 UTC #4 lore raw

PATCH v2 1/1 kmp204x: reset the Zarlink clocking chips at power up only

Quoted 35 lines · Valentin Longchamp

There is the requirement on the chassis's backplane that when the clocks have been enabled, they then should not disappear.
Resetting the Zarlink clocking chips at unit reset violates this requirement because the backplane clocks are not supplied during the reset time.
To avoid this side effect, both the Zarlink clocking chips are reset only at power up.
Signed-off-by Valentin Longchamp <[email protected]>
---
Changes in v2:
- Improve the commit message for more clarity
 board/keymile/kmp204x/kmp204x.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
board/keymile/kmp204x/kmp204x.c +1 -1
index 6bc8eb8..638b2a3 100644
@@ -94,7 +94,7 @@ int board_early_init_f(void)
 	qrio_wdmask(BFTIC4_RST, true);
 
 	/* set the ZL30138's prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST);
 	/* and take it out of reset as soon as possible (needed for Hooper) */
 	qrio_prst(ZL30158_RST, false, false);
 

board/keymile/kmp204x/kmp204x.c int misc_init_f(void) · line 150

Quoted 8 lines

board/keymile/kmp204x/kmp204x.c +1 -1

@@ -144,7 +144,7 @@ int misc_init_f(void)
 	qrio_prst(ETH_FRONT_PHY_RST, false, false);
 
 	/* set the ZL30343 prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST);
 	/* and enable the WD on it */
 	qrio_wdmask(ZL30343_RST, true);

Did you miss the comments, or they are still correct after the change?

York

Valentin Longchamp

author

2014-08-19 13:33 UTC #5 lore raw

PATCH v2 1/1 kmp204x: reset the Zarlink clocking chips at power up only

Quoted 37 lines · York Sun

Quoted 36 lines · Valentin Longchamp
There is the requirement on the chassis's backplane that when the clocks have been enabled, they then should not disappear.
Resetting the Zarlink clocking chips at unit reset violates this requirement because the backplane clocks are not supplied during the reset time.
To avoid this side effect, both the Zarlink clocking chips are reset only at power up.
Signed-off-by Valentin Longchamp <[email protected]>
---
Changes in v2:
- Improve the commit message for more clarity
 board/keymile/kmp204x/kmp204x.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
board/keymile/kmp204x/kmp204x.c +1 -1
index 6bc8eb8..638b2a3 100644
@@ -94,7 +94,7 @@ int board_early_init_f(void)
 	qrio_wdmask(BFTIC4_RST, true);
 
 	/* set the ZL30138's prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST);
 	/* and take it out of reset as soon as possible (needed for Hooper) */
 	qrio_prst(ZL30158_RST, false, false);
 
@@ -144,7 +144,7 @@ int misc_init_f(void)
 	qrio_prst(ETH_FRONT_PHY_RST, false, false);
 

Quoted 9 lines

board/keymile/kmp204x/kmp204x.c int misc_init_f(void) · line 150
Quoted 7 lines
board/keymile/kmp204x/kmp204x.c +1 -1
 	/* set the ZL30343 prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST);
 	/* and enable the WD on it */
 	qrio_wdmask(ZL30343_RST, true);
 
Did you miss the comments, or they are still correct after the change?

Yeah I missed them, sorry, sending V3.

Valentin

Valentin Longchamp

author

2014-08-19 13:40 UTC #6 lore raw

PATCH v3 1/1 kmp204x: reset the Zarlink clocking chips at power up only

In reply to York Sun

There is the requirement on the chassis's backplane that when the clocks have been enabled, they then should not disappear.

Resetting the Zarlink clocking chips at unit reset violates this requirement because the backplane clocks are not supplied during the reset time.

To avoid this side effect, both the Zarlink clocking chips are reset only at power up.

Signed-off-by Valentin Longchamp <[email protected]>

---

Changes in v3:
- fix the commentaries that also had to be changed

Changes in v2:
- Improve the commit message for more clarity

 board/keymile/kmp204x/kmp204x.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

board/keymile/kmp204x/kmp204x.c +4 -4

index 6bc8eb8..1c3b066 100644
@@ -93,8 +93,8 @@ int board_early_init_f(void)
 	/* and enable WD on it */
 	qrio_wdmask(BFTIC4_RST, true);
 
-	/* set the ZL30138's prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_UNIT_RST);
+	/* set the ZL30138's prstcfg to reset at power-up only */
+	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST);
 	/* and take it out of reset as soon as possible (needed for Hooper) */
 	qrio_prst(ZL30158_RST, false, false);

@@ -143,8 +143,8 @@ int misc_init_f(void)
 	qrio_prstcfg(ETH_FRONT_PHY_RST, PRSTCFG_POWUP_UNIT_CORE_RST);
 	qrio_prst(ETH_FRONT_PHY_RST, false, false);
 
-	/* set the ZL30343 prstcfg to reset at power-up and unit reset only */
-	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_UNIT_RST);
+	/* set the ZL30343 prstcfg to reset at power-up only */
+	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST);
 	/* and enable the WD on it */
 	qrio_wdmask(ZL30343_RST, true);

Signature · 1 line

1.8.0.1

York Sun

2014-08-20 19:41 UTC #7 lore raw

PATCH v3 1/1 kmp204x: reset the Zarlink clocking chips at power up only

Quoted 10 lines · Valentin Longchamp

There is the requirement on the chassis's backplane that when the clocks have been enabled, they then should not disappear.
Resetting the Zarlink clocking chips at unit reset violates this requirement because the backplane clocks are not supplied during the reset time.
To avoid this side effect, both the Zarlink clocking chips are reset only at power up.

Quoted 7 lines

Signed-off-by Valentin Longchamp <[email protected]>
---
Changes in v3:
- fix the commentaries that also had to be changed

Applied to u-boot-mpc85xx master branch, awaiting for upstream.

York