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ARM: dts: socfpga: updates for SOCFPGA

PATCH Superseded dinguyen at opensource.altera.com 3 participants 13 messages Aug 14, 2014 Device tree bindings

v1 of 3 Superseded Latest is v3 →

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#0 lore raw

cover ARM: dts: socfpga: updates for SOCFPGA

From: Dinh Nguyen <[email protected]>

Just a few DTS updates for the SOCFPGA platform.

patch 1/3 : cleanup
patch 2/3 : Add a SD/MMC card detect entry patch 3/3 : Add a /memserve/ section for the platform

Dinh Nguyen (3):
ARM: dts: socfpga: remove extra alias in the ArriaV devkit
ARM: dts: socfpga: Add SD card detect
ARM: dts: socfpga: memreserve first 4KB for SMP code

 arch/arm/boot/dts/socfpga_arria5.dtsi        | 1 +
 arch/arm/boot/dts/socfpga_arria5_socdk.dts   | 7 -------
 arch/arm/boot/dts/socfpga_cyclone5.dtsi      | 3 ++-
 arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 4 ++++
 4 files changed, 7 insertions(+), 8 deletions(-)
Signature · 1 line
2.0.3
#1 lore raw

PATCH 1/3 ARM: dts: socfpga: remove extra alias in the ArriaV devkit

From: Dinh Nguyen <[email protected]>

commit [2755e187 dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.] added an extra ethernet alias in the ArriaV devkit board file. This patch removes it.

---
 arch/arm/boot/dts/socfpga_arria5_socdk.dts | 7 -------
 1 file changed, 7 deletions(-)
arch/arm/boot/dts/socfpga_arria5_socdk.dts +0 -7
index d532d17..27d551c 100644
@@ -37,13 +37,6 @@
 		*/
 		ethernet0 = &gmac1;
 	};
-
-	aliases {
-		/* this allow the ethaddr uboot environmnet variable contents
-		 * to be added to the gmac1 device tree blob.
-		 */
-		ethernet0 = &gmac1;
-	};
 };
 
 &gmac1 {
Signature · 1 line
2.0.3
#2 lore raw

PATCH 2/3 ARM: dts: socfpga: Add SD card detect

In reply to dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC card detect.

---
 arch/arm/boot/dts/socfpga_cyclone5.dtsi      | 2 +-
 arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)
arch/arm/boot/dts/socfpga_cyclone5.dtsi +1 -1
index 1ee03c4..33cad8b 100644
@@ -28,7 +28,7 @@
 			};
 		};
 
-		dwmmc0 at ff704000 {
+		mmc0: dwmmc0 at ff704000 {
 			num-slots = <1>;
 			broken-cd;
 			bus-width = <4>;
arch/arm/boot/dts/socfpga_cyclone5_socdk.dts +4 -0
index 45de151..d7296a5 100644
@@ -68,6 +68,10 @@
 	};
 };
 
+&mmc0 {
+	cd-gpios = <&gpio1 18 0>;
+};
+
 &usb1 {
 	status = "okay";
 };
Signature · 1 line
2.0.3
#3 lore raw

PATCH 2/3 ARM: dts: socfpga: Add SD card detect

Quoted 4 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC card detect.

Are there previous revisions outside Altera?

Pavel

Signature · 2 lines
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(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#4 lore raw

PATCH 2/3 ARM: dts: socfpga: Add SD card detect

Quoted 8 lines · Pavel Machek
Quoted 4 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC card detect.

Are there previous revisions outside Altera?

Not with SD card detect.

dinh

#5 lore raw

PATCH 2/3 ARM: dts: socfpga: Add SD card detect

Quoted 6 lines · Dinh Nguyen
Quoted 3 lines · Pavel Machek
Quoted 2 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Quoted 7 lines
Quoted 5 lines
Quoted 2 lines

Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC card detect.

Are there previous revisions outside Altera?

Not with SD card detect.

So this patch will break those revision C (and below) boards, by adding gpio for card detect that does not exists there, no?

Confused,
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#6 lore raw

PATCH 2/3 ARM: dts: socfpga: Add SD card detect

Quoted 10 lines · Pavel Machek
Quoted 9 lines · Dinh Nguyen
Quoted 6 lines · Pavel Machek
Quoted 4 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC card detect.

Quoted 8 lines
Quoted 4 lines
Quoted 2 lines

Are there previous revisions outside Altera?

Not with SD card detect.

So this patch will break those revision C (and below) boards, by adding gpio for card detect that does not exists there, no?

No, the card detect line is muxed with DAT3, so it'll work fine on previous boards that does have card detect.

Quoted 1 line

Confused,

Tested on all board revisions.

Dinh

#7 lore raw

PATCH 2/3 ARM: dts: socfpga: Add SD card detect

Quoted 16 lines · Dinh Nguyen
Quoted 13 lines · Pavel Machek
Quoted 12 lines · Dinh Nguyen
Quoted 8 lines · Pavel Machek
Quoted 4 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC card detect.

Are there previous revisions outside Altera?

Quoted 8 lines
Quoted 5 lines
Quoted 1 line

Not with SD card detect.

So this patch will break those revision C (and below) boards, by adding gpio for card detect that does not exists there, no?

No, the card detect line is muxed with DAT3, so it'll work fine on previous boards that does have card detect.

Sorry...i'll work fine on previous boards that does NOT have card detect.

Quoted 6 lines
Quoted 1 line

Confused,

Tested on all board revisions.

Dinh

#8 lore raw

PATCH 2/3 ARM: dts: socfpga: Add SD card detect

Quoted 21 lines · Dinh Nguyen
Quoted 18 lines · Dinh Nguyen
Quoted 15 lines · Pavel Machek
Quoted 13 lines · Dinh Nguyen
Quoted 8 lines · Pavel Machek
Quoted 4 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC card detect.

Are there previous revisions outside Altera?

Not with SD card detect.

Quoted 8 lines
Quoted 6 lines
Quoted 3 lines

So this patch will break those revision C (and below) boards, by adding gpio for card detect that does not exists there, no?

No, the card detect line is muxed with DAT3, so it'll work fine on previous boards that does have card detect.

Sorry...i'll work fine on previous boards that does NOT have card detect.

Thanks for clarifications and sorry for the noise.

Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#9 lore raw

PATCH 3/3 ARM: dts: socfpga: memreserve first 4KB for SMP code

In reply to dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

The SOCFPGA's SMP code uses 0x0 for as the location for the trampoline to bring secondary cores online. This patch adds a /memreserve/ section to reserve the first 4K for the SMP trampoline code.

---
 arch/arm/boot/dts/socfpga_arria5.dtsi   | 1 +
 arch/arm/boot/dts/socfpga_cyclone5.dtsi | 1 +
 2 files changed, 2 insertions(+)
arch/arm/boot/dts/socfpga_arria5.dtsi +1 -0
index 468fc4c..73b939e 100644
@@ -15,6 +15,7 @@
  */
 
 /dts-v1/;
+/memreserve/ 0x00000000 0x0001000;
 #include "socfpga.dtsi"
 
 / {
arch/arm/boot/dts/socfpga_cyclone5.dtsi +1 -0
index 33cad8b..f0785f0 100644
@@ -16,6 +16,7 @@
  */
 
 /dts-v1/;
+/memreserve/ 0x00000000 0x0001000;
 #include "socfpga.dtsi"
 
 / {
Signature · 1 line
2.0.3
#10 lore raw

PATCH 3/3 ARM: dts: socfpga: memreserve first 4KB for SMP code

Quoted 17 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

The SOCFPGA's SMP code uses 0x0 for as the location for the trampoline to bring secondary cores online. This patch adds a /memreserve/ section to reserve the first 4K for the SMP trampoline code.

---
 arch/arm/boot/dts/socfpga_arria5.dtsi   | 1 +
 arch/arm/boot/dts/socfpga_cyclone5.dtsi | 1 +
 2 files changed, 2 insertions(+)
arch/arm/boot/dts/socfpga_arria5.dtsi +0 -0
index 468fc4c..73b939e 100644

arch/arm/boot/dts/socfpga_arria5.dtsi line 18

Quoted 4 lines
arch/arm/boot/dts/socfpga_arria5.dtsi +1 -0
@@ -15,6 +15,7 @@
  */
 
 /dts-v1/;
+/memreserve/ 0x00000000 0x0001000;

Actually, comment here explaining that ROM code uses 0x0 for the trampoline would be nice here... if I understand it correctly.

Thanks,
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#11 lore raw

PATCH 3/3 ARM: dts: socfpga: memreserve first 4KB for SMP code

Quoted 20 lines · Pavel Machek
Quoted 19 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

The SOCFPGA's SMP code uses 0x0 for as the location for the trampoline to bring secondary cores online. This patch adds a /memreserve/ section to reserve the first 4K for the SMP trampoline code.

---
 arch/arm/boot/dts/socfpga_arria5.dtsi   | 1 +
 arch/arm/boot/dts/socfpga_cyclone5.dtsi | 1 +
 2 files changed, 2 insertions(+)
arch/arm/boot/dts/socfpga_arria5.dtsi +0 -0
index 468fc4c..73b939e 100644
@@ -15,6 +15,7 @@
  */
 
Quoted 5 lines

arch/arm/boot/dts/socfpga_arria5.dtsi line 18

Quoted 2 lines
arch/arm/boot/dts/socfpga_arria5.dtsi +1 -0
 /dts-v1/;
+/memreserve/ 0x00000000 0x0001000;

Actually, comment here explaining that ROM code uses 0x0 for the trampoline would be nice here... if I understand it correctly.

Sure...I'll add a single line comment.

Dinh

Quoted 4 lines

Thanks,
Pavel

#12 lore raw

PATCH 3/3 ARM: dts: socfpga: memreserve first 4KB for SMP code

Quoted 23 lines · Dinh Nguyen
Quoted 20 lines · Pavel Machek
Quoted 19 lines · dinguyen at opensource.altera.com

From: Dinh Nguyen <[email protected]>

The SOCFPGA's SMP code uses 0x0 for as the location for the trampoline to bring secondary cores online. This patch adds a /memreserve/ section to reserve the first 4K for the SMP trampoline code.

---
 arch/arm/boot/dts/socfpga_arria5.dtsi   | 1 +
 arch/arm/boot/dts/socfpga_cyclone5.dtsi | 1 +
 2 files changed, 2 insertions(+)
arch/arm/boot/dts/socfpga_arria5.dtsi +0 -0
index 468fc4c..73b939e 100644
@@ -15,6 +15,7 @@
  */
 
Quoted 7 lines
Quoted 5 lines

arch/arm/boot/dts/socfpga_arria5.dtsi line 18

Quoted 2 lines
arch/arm/boot/dts/socfpga_arria5.dtsi +1 -0
 /dts-v1/;
+/memreserve/ 0x00000000 0x0001000;

Actually, comment here explaining that ROM code uses 0x0 for the trampoline would be nice here... if I understand it correctly.

Sure...I'll add a single line comment.

Thanks. You can add my acked-by then :-).
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html