MIPS: IP28: Correct IO_BASE in mach-ip28/spaces.h for proper ioremap

On SGI IP28 systems, fix an early crash at boot by setting IO_BASE to a correct value so that ioremap works properly.

Exception: <vector=normal>
Status register: 0x34004882<CU1,CU0,FR,IM7,IM4,IPL=???,KX,MODE=KERNEL> Cause register: 0x10<CE=0,EXC=RADE>
Exception PC: 0xa800000020654004, Exception RA: 0xa800000020654c9c Read address error exception, bad address: 0xdfbdd600

PHYS_OFFSET"")

---
 arch/mips/include/asm/mach-ip28/spaces.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

b/arch/mips/include/asm/mach-ip28/spaces.h
index 5d6a764..8c60fb0 100644

@@ -18,7 +18,7 @@
 #define PHYS_OFFSET	_AC(0x20000000, UL)
 
 #define UNCAC_BASE	_AC(0xc0000000, UL)     /* 0xa0000000 + PHYS_OFFSET */
-#define IO_BASE		UNCAC_BASE
+#define IO_BASE		_AC(0x9000000000000000, UL)
 
 #include <asm/mach-generic/spaces.h>

On Tue, Aug 19, 2014 at 10:00:34AM +0200, Ralf Baechle wrote:

CAC_BASE is also just redefining the default value and the value for HIGHMEM_START appears bogus. Can you just remove the entire file? That should make the kernel pickup arch/mips/include/asm/mach-generic/spaces.h with its defaults that should work for IP28 instead.

Ralf

that was my first thought as well. I just wondered whether it's necessary to reflect PHY_OFFSET != 0... nevertheless UNCAC_BASE is not usuable for memory access on IP28 at all. At least not without poking at the memory controller for slower access cycles, which the current kernel avoids totaly.

I'll give a spin later.

Thomas.

Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

after fixing the L1_CACHE_SHIFT my IP28 booted successfull to a shell prompt.

Thomas.

Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]