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powerpc/mpc85xx: Make boot flag effective

PATCH New Yuantian.Tang at freescale.com 2 participants 4 messages Jul 23, 2014 – Aug 20, 2014 PowerPC

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Yuantian.Tang at freescale.com

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#0 lore raw

PATCH 1/2 powerpc/mpc85xx: Make boot flag effective

From: Tang Yuantian <[email protected]>

bootflag as a parameter is passed to board_init_f(). But it is not actually used in this function. Make it effective by assigned it to gd->flags.

Signed-off-by Tang Yuantian <[email protected]>
---
 arch/powerpc/lib/board.c | 2 ++
 1 file changed, 2 insertions(+)
arch/powerpc/lib/board.c +2 -0
index 50eb820..62a97a8 100644
@@ -363,6 +363,8 @@ void board_init_f(ulong bootflag)
 	memset((void *) gd, 0, sizeof(gd_t));
 #endif
 
+	gd->flags = bootflag;
+
 	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr)
 		if ((*init_fnc_ptr) () != 0)
 			hang();
Signature · 1 line
1.8.5
author
#1 lore raw

PATCH 2/2 powerpc/t104xrdb: support deep sleep in SPI/SD boot

From: Tang Yuantian <[email protected]>

Add deep sleep support in SPI/SD boot. The destination address second stage uboot image is loaded to is changed because currently this address will be used by kernel which means we can't reserve it for resume.

Entry point to kernel is still placed in second stage uboot.

Signed-off-by Tang Yuantian <[email protected]>

---
- deep sleep for nand boot is not supported right now due to the hardware limitation
- based on 'next' branch.

 arch/powerpc/cpu/mpc85xx/fdt.c | 15 +++++++++++++++
 board/freescale/t104xrdb/spl.c | 19 +++++++++++++++++++
 include/configs/T104xRDB.h     | 18 +++++++++---------
 3 files changed, 43 insertions(+), 9 deletions(-)
arch/powerpc/cpu/mpc85xx/fdt.c +15 -0
index 3665ec6..3222e26 100644
@@ -134,6 +134,21 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)
 			printf("Failed to reserve memory for spin table: %s\n",
 				fdt_strerror(off));
 	}
+#ifdef CONFIG_DEEP_SLEEP
+#ifdef CONFIG_SPL_MMC_BOOT
+	off = fdt_add_mem_rsv(blob, CONFIG_SYS_MMC_U_BOOT_START,
+		CONFIG_SYS_MMC_U_BOOT_SIZE);
+	if (off < 0)
+		printf("Failed to reserve memory for SD deep sleep: %s\n",
+		       fdt_strerror(off));
+#elif defined(CONFIG_SPL_SPI_BOOT)
+	off = fdt_add_mem_rsv(blob, CONFIG_SYS_SPI_FLASH_U_BOOT_START,
+		CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE);
+	if (off < 0)
+		printf("Failed to reserve memory for SPI deep sleep: %s\n",
+		       fdt_strerror(off));
+#endif
+#endif
 }
 #endif
board/freescale/t104xrdb/spl.c +19 -0
index c628c95..3822a37 100644
@@ -11,6 +11,7 @@
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <spi_flash.h>
+#include <asm/mpc85xx_gpio.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

@@ -55,6 +56,11 @@ void board_init_f(ulong bootflag)
 	/* Update GD pointer */
 	gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
 
+#ifdef CONFIG_DEEP_SLEEP
+	/* disable the console if boot from deep sleep */
+	if (in_be32(&gur->scrtsr[0]) & (1 << 3))
+		gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
+#endif
 	/* compiler optimization barrier needed for GCC >= 3.4 */
 	__asm__ __volatile__("" : : : "memory");
 

@@ -120,3 +126,16 @@ void board_init_r(gd_t *gd, ulong dest_addr)
 	nand_boot();
 #endif
 }
+
+#ifdef CONFIG_DEEP_SLEEP
+void board_mem_sleep_setup(void)
+{
+	void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE;
+
+	/* does not provide HW signals for power management */
+	clrbits_8(cpld_base + 0x17, 0x40);
+	/* Disable MCKE isolation */
+	gpio_set_value(2, 0);
+	udelay(1);
+}
+#endif
include/configs/T104xRDB.h +9 -9
index c96f03c..fe42935 100644
@@ -33,7 +33,7 @@
 #define CONFIG_SPL_I2C_SUPPORT
 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
 #define CONFIG_FSL_LAW                 /* Use common FSL init code */
-#define CONFIG_SYS_TEXT_BASE		0x00201000
+#define CONFIG_SYS_TEXT_BASE		0x30001000
 #define CONFIG_SPL_TEXT_BASE		0xFFFD8000
 #define CONFIG_SPL_PAD_TO		0x40000
 #define CONFIG_SPL_MAX_SIZE		0x28000

@@ -49,21 +49,21 @@
 #ifdef CONFIG_NAND
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(768 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST	0x00200000
-#define CONFIG_SYS_NAND_U_BOOT_START	0x00200000
+#define CONFIG_SYS_NAND_U_BOOT_DST	0x30000000
+#define CONFIG_SYS_NAND_U_BOOT_START	0x30000000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	(256 << 10)
 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 #define CONFIG_SPL_NAND_BOOT
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#define	CONFIG_RESET_VECTOR_ADDRESS		0x200FFC
+#define	CONFIG_RESET_VECTOR_ADDRESS		0x30000FFC
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_MINIMAL
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(768 << 10)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x00200000)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x00200000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x30000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x30000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(256 << 10)
 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #ifndef CONFIG_SPL_BUILD

@@ -73,12 +73,12 @@
 #endif
 
 #ifdef CONFIG_SDCARD
-#define	CONFIG_RESET_VECTOR_ADDRESS		0x200FFC
+#define	CONFIG_RESET_VECTOR_ADDRESS		0x30000FFC
 #define CONFIG_SPL_MMC_SUPPORT
 #define CONFIG_SPL_MMC_MINIMAL
 #define CONFIG_SYS_MMC_U_BOOT_SIZE	(768 << 10)
-#define CONFIG_SYS_MMC_U_BOOT_DST	(0x00200000)
-#define CONFIG_SYS_MMC_U_BOOT_START	(0x00200000)
+#define CONFIG_SYS_MMC_U_BOOT_DST	(0x30000000)
+#define CONFIG_SYS_MMC_U_BOOT_START	(0x30000000)
 #define CONFIG_SYS_MMC_U_BOOT_OFFS	(260 << 10)
 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #ifndef CONFIG_SPL_BUILD
Signature · 1 line
1.8.5
#2 lore raw

PATCH 2/2 powerpc/t104xrdb: support deep sleep in SPI/SD boot

Quoted 11 lines · Yuantian.Tang at freescale.com

From: Tang Yuantian <[email protected]>

Add deep sleep support in SPI/SD boot. The destination address second stage uboot image is loaded to is changed because currently this address will be used by kernel which means we can't reserve it for resume.

Entry point to kernel is still placed in second stage uboot.

Signed-off-by Tang Yuantian <[email protected]>

---

Applied to u-boot-mpc85xx master branch, awaiting for upstream.

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