clocksource: sirf: disable counter before re-setting it
PATCH 1/1 clocksource: sirf: disable counter before re-setting it
From: Hao Liu <[email protected]>
according to HW spec, we have to disable counter before setting it, if we don't this, in pressure test, sometimes the timer might not generate interrupt any more.
and this patch also fixes a typo for register set by changing 0x7 to 0x3. 0x7 is loop mode in HW, but here we are using oneshot 0x3.
--- drivers/clocksource/timer-marco.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
drivers/clocksource/timer-marco.c +4 -1
@@ -63,7 +63,7 @@ static inline void sirfsoc_timer_count_disable(int idx)/* enable count and interrupt */ static inline void sirfsoc_timer_count_enable (int idx) { -writel_relaxed (readl_relaxed (sirfsoc_timer_base +SIRFSOC_TIMER_32COUNTER_0_CTRL +4 * idx) |0x7 , +writel_relaxed (readl_relaxed (sirfsoc_timer_base +SIRFSOC_TIMER_32COUNTER_0_CTRL +4 * idx) |0x3 , sirfsoc_timer_base +SIRFSOC_TIMER_32COUNTER_0_CTRL +4 * idx); }
@@ -103,6 +103,9 @@ static int sirfsoc_timer_set_next_event(unsigned long delta, {int cpu =smp_processor_id (); +/* disable timer first, then modify the related registers */ +sirfsoc_timer_count_disable (cpu); +writel_relaxed (0 , sirfsoc_timer_base +SIRFSOC_TIMER_COUNTER_0 +4 * cpu); writel_relaxed(delta, sirfsoc_timer_base + SIRFSOC_TIMER_MATCH_0 +
Signature · 1 line
1.7.9.5
PATCH 1/1 clocksource: sirf: disable counter before re-setting it
2014-07-23 22:03 GMT+08:00 Barry Song <[email protected]>:
Quoted 6 lines
From: Hao Liu <[email protected]>
according to HW spec, we have to disable counter before setting it, if we don't this, in pressure test, sometimes the timer might not generate interrupt any more.
Quoted 6 lines
and this patch also fixes a typo for register set by changing
0x7to0x3.0x7is loop mode in HW, but here we are using oneshot0x3.Signed-off-by Hao Liu <[email protected]>Signed-off-by Barry Song <[email protected]>---
Hi Daniel,
did you miss this one?
Quoted 27 lines
drivers/clocksource/timer-marco.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)drivers/clocksource/timer-marco.c +4
-2@@ -63,7 +63,7 @@ static inline void sirfsoc_timer_count_disable(int idx)/* enable count and interrupt */ static inline void sirfsoc_timer_count_enable (int idx) { -writel_relaxed (readl_relaxed (sirfsoc_timer_base +SIRFSOC_TIMER_32COUNTER_0_CTRL +4 * idx) |0x7 , +writel_relaxed (readl_relaxed (sirfsoc_timer_base +SIRFSOC_TIMER_32COUNTER_0_CTRL +4 * idx) |0x3 , sirfsoc_timer_base +SIRFSOC_TIMER_32COUNTER_0_CTRL +4 * idx); }@@ -103,6 +103,9 @@ static int sirfsoc_timer_set_next_event(unsigned long delta, {int cpu =smp_processor_id (); +/* disable timer first, then modify the related registers */ +sirfsoc_timer_count_disable (cpu); +writel_relaxed (0 , sirfsoc_timer_base +SIRFSOC_TIMER_COUNTER_0 +4 * cpu); writel_relaxed(delta, sirfsoc_timer_base + SIRFSOC_TIMER_MATCH_0 + --
Quoted 2 lines
1.7.9.5
-barry
PATCH 1/1 clocksource: sirf: disable counter before re-setting it
Quoted 10 lines · Barry Song
2014-07-23 22:03 GMT+08:00 Barry Song <[email protected]>:
Quoted 9 lines
From: Hao Liu <[email protected]>
according to HW spec, we have to disable counter before setting it, if we don't this, in pressure test, sometimes the timer might not generate interrupt any more.
and this patch also fixes a typo for register set by changing
0x7to0x3.0x7is loop mode in HW, but here we are using oneshot0x3.
Quoted 6 lines
Quoted 3 lines
Signed-off-by Hao Liu <[email protected]>Signed-off-by Barry Song <[email protected]>---
Hi Daniel,
did you miss this one?
Nope, I have it locally. Let me review it in details next week when I return from the kernel summit.
Thanks
-- Daniel
Quoted 33 lines
Quoted 28 lines
drivers/clocksource/timer-marco.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)drivers/clocksource/timer-marco.c +4
-2@@ -63,7 +63,7 @@ static inline void sirfsoc_timer_count_disable(int idx)/* enable count and interrupt */ static inline void sirfsoc_timer_count_enable (int idx) { -writel_relaxed (readl_relaxed (sirfsoc_timer_base +SIRFSOC_TIMER_32COUNTER_0_CTRL +4 * idx) |0x7 , +writel_relaxed (readl_relaxed (sirfsoc_timer_base +SIRFSOC_TIMER_32COUNTER_0_CTRL +4 * idx) |0x3 , sirfsoc_timer_base +SIRFSOC_TIMER_32COUNTER_0_CTRL +4 * idx); }@@ -103,6 +103,9 @@ static int sirfsoc_timer_set_next_event(unsigned long delta, {int cpu =smp_processor_id (); +/* disable timer first, then modify the related registers */ +sirfsoc_timer_count_disable (cpu); +writel_relaxed (0 , sirfsoc_timer_base +SIRFSOC_TIMER_COUNTER_0 +4 * cpu); writel_relaxed(delta, sirfsoc_timer_base + SIRFSOC_TIMER_MATCH_0 + --Quoted 2 lines
1.7.9.5
-barry
Signature · 5 lines
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