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ARM: shmobile: r8a7791: add IIC0/1 clock macros

PATCH New Wolfram Sang 5 participants 10 messages Mar 10, 2014 – Aug 21, 2014

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Wolfram Sang

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#0 lore raw

PATCH v2 1/5 ARM: shmobile: r8a7791: add IIC0/1 clock macros

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

---

Changes since V1: kept sorting intact

 include/dt-bindings/clock/r8a7791-clock.h | 2 ++
 1 file changed, 2 insertions(+)
include/dt-bindings/clock/r8a7791-clock.h +2 -0
index 30f82f286e29..2df1a11faeb3 100644
@@ -51,6 +51,8 @@
 #define R8A7791_CLK_SDHI1		12
 #define R8A7791_CLK_SDHI0		14
 #define R8A7791_CLK_MMCIF0		15
+#define R8A7791_CLK_IIC0		18
+#define R8A7791_CLK_IIC1		23
 #define R8A7791_CLK_SSUSB		28
 #define R8A7791_CLK_CMT1		29
 #define R8A7791_CLK_USBDMAC0		30
Signature · 1 line
1.9.0
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#1 lore raw

PATCH v2 2/5 ARM: shmobile: r8a7791: add IIC(B) clocks to dtsi

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

---

Changes since V1: kept sorting by bit number

Note: Adding clocks whilst keeping the current sorting is very likely to break a previously working clock IMO. Imagine adding PCIEC clock inbetween IIC0 and IIC1 here. Adding chronologically and grouped by similar function blocks is easier to track IMO. An example addition could then look like:

R8A7791_CLK_TPU0
R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0
R8A7791_CLK_CMT1

	R8A7791_CLK_IIC0 R8A7791_CLK_IIC1

+ R8A7791_CLK_PCIEC

 arch/arm/boot/dts/r8a7791.dtsi | 25 +++++++++++++------------
 1 file changed, 13 insertions(+), 12 deletions(-)
arch/arm/boot/dts/r8a7791.dtsi +13 -12
index 71bac2ca4bcd..858a8a923b00 100644
@@ -716,15 +716,16 @@
 		mstp3_clks: mstp3_clks at e615013c {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-			clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>,
-				<&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>;
+			clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
+				 <&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1
-				R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_CMT1
+				R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
+				R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_IIC1 R8A7791_CLK_CMT1
 			>;
 			clock-output-names =
-				"tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1";
+				"tpu0", "sdhi2", "sdhi1", "sdhi0",
+				"mmcif0", "i2c7", "i2c8", "cmt1";
 		};
 		mstp5_clks: mstp5_clks at e6150144 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";

@@ -768,17 +769,17 @@
 		mstp9_clks: mstp9_clks at e6150994 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>,
-				 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
-				 <&p_clk>;
+			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&p_clk>,
+				 <&cp_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+				 <&p_clk>, <&p_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD
-				R8A7791_CLK_I2C5 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3
-				R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
+				R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
+				R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
+				R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
 			>;
 			clock-output-names =
-				"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3",
+				"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3",
 				"i2c2", "i2c1", "i2c0";
 		};
 		mstp11_clks: mstp11_clks at e615099c {
Signature · 1 line
1.9.0
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#2 lore raw

PATCH v2 3/5 ARM: shmobile: r8a7791: add IIC(B) cores to dtsi

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

---

Changes since V1: use better compatible name "renesas,iic-r8a7791"

 arch/arm/boot/dts/r8a7791.dtsi | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)
arch/arm/boot/dts/r8a7791.dtsi +36 -0
index 858a8a923b00..f71670a5bfbc 100644
@@ -27,6 +27,9 @@
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
 		i2c5 = &i2c5;
+		i2c6 = &i2c6;
+		i2c7 = &i2c7;
+		i2c8 = &i2c8;
 		spi0 = &qspi;
 		spi1 = &msiof0;
 		spi2 = &msiof1;

@@ -184,6 +187,7 @@
 			     <0 17 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	/* The memory map in the User's Manual maps the cores to bus numbers */
 	i2c0: i2c at e6508000 {
 		#address-cells = <1>;
 		#size-cells = <0>;

@@ -235,6 +239,7 @@
 	};
 
 	i2c5: i2c at e6528000 {
+		/* doesn't need pinmux */
 		#address-cells = <1>;
 		#size-cells = <0>;
 		compatible = "renesas,i2c-r8a7791";

@@ -244,6 +249,37 @@
 		status = "disabled";
 	};
 
+	i2c6: i2c at e60b0000 {
+		/* doesn't need pinmux */
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+		reg = <0 0xe60b0000 0 0x425>;
+		interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
+		status = "disabled";
+	};
+
+	i2c7: i2c at e6500000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+		reg = <0 0xe6500000 0 0x425>;
+		interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
+		status = "disabled";
+	};
+
+	i2c8: i2c at e6510000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+		reg = <0 0xe6510000 0 0x425>;
+		interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
+		status = "disabled";
+	};
+
 	pfc: pfc at e6060000 {
 		compatible = "renesas,pfc-r8a7791";
 		reg = <0 0xe6060000 0 0x250>;
Signature · 1 line
1.9.0
#3 lore raw

PATCH v2 3/5 ARM: shmobile: r8a7791: add IIC(B) cores to dtsi

Hello.

Quoted 24 lines · Wolfram Sang

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

---

Changes since V1: use better compatible name "renesas,iic-r8a7791"

  arch/arm/boot/dts/r8a7791.dtsi | 36 ++++++++++++++++++++++++++++++++++++
  1 file changed, 36 insertions(+)
arch/arm/boot/dts/r8a7791.dtsi +3 -0
index 858a8a923b00..f71670a5bfbc 100644
@@ -27,6 +27,9 @@
  		i2c3 = &i2c3;
  		i2c4 = &i2c4;
  		i2c5 = &i2c5;
+		i2c6 = &i2c6;
+		i2c7 = &i2c7;
+		i2c8 = &i2c8;
  		spi0 = &qspi;
  		spi1 = &msiof0;
  		spi2 = &msiof1;

[...]

arch/arm/boot/dts/r8a7791.dtsi line 252

Quoted 5 lines
arch/arm/boot/dts/r8a7791.dtsi +1 -0
@@ -244,6 +249,37 @@
  		status = "disabled";
  	};
 
+	i2c6: i2c at e60b0000 {

Hm, you finally labelled the nodes "iic[0-3]:" in the R8A7790 patch but
not in this patch... what was the reason, did you just forgot to do it? Will you fix this or should I?

WBR, Sergei

author
#4 lore raw

PATCH v2 4/5 ARM: shmobile: koelsch: make i2c2-pfc node unique

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

This node should have a unique name so it can be distinguished when other i2c busses are added later.

Signed-off-by Wolfram Sang <[email protected]>
Acked-by Laurent Pinchart <[email protected]>

---

Changes since V1: added ack

 arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/r8a7791-koelsch.dts +1 -1
index e24fed9c0462..5e90f18db1fb 100644
@@ -199,7 +199,7 @@
 	pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
 	pinctrl-names = "default";
 
-	i2c2_pins: i2c {
+	i2c2_pins: i2c2 {
 		renesas,groups = "i2c2";
 		renesas,function = "i2c2";
 	};
Signature · 1 line
1.9.0
author
#5 lore raw

PATCH v2 5/5 ARM: shmobile: koelsch: activate i2c6 bus

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>
Acked-by Laurent Pinchart <[email protected]>

---

Changes since V1: added ack

 arch/arm/boot/dts/r8a7791-koelsch.dts | 5 +++++
 1 file changed, 5 insertions(+)
arch/arm/boot/dts/r8a7791-koelsch.dts +5 -0
index 5e90f18db1fb..2151f73e5eef 100644
@@ -195,6 +195,11 @@
 	};
 };
 
+&i2c6 {
+	status = "okay";
+	clock-frequency = <100000>;
+};
+
 &pfc {
 	pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
 	pinctrl-names = "default";
Signature · 1 line
1.9.0
#6 lore raw

PATCH v2 1/5 ARM: shmobile: r8a7791: add IIC0/1 clock macros

In reply to Wolfram Sang

Hi Wolfram,

Thank you for the patches.

For the whole series,

Acked-by Laurent Pinchart <[email protected]>
Quoted 24 lines · On Monday 10 March 2014 12:26:56 Wolfram Sang wrote:

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

---

Changes since V1: kept sorting intact

 include/dt-bindings/clock/r8a7791-clock.h | 2 ++
 1 file changed, 2 insertions(+)
(quoted diff) +0 -0

b/include/dt-bindings/clock/r8a7791-clock.h index
30f82f286e29..2df1a11faeb3 100644

include/dt-bindings/clock/r8a7791-clock.h +2 -0
@@ -51,6 +51,8 @@
 #define R8A7791_CLK_SDHI1		12
 #define R8A7791_CLK_SDHI0		14
 #define R8A7791_CLK_MMCIF0		15
+#define R8A7791_CLK_IIC0		18
+#define R8A7791_CLK_IIC1		23
 #define R8A7791_CLK_SSUSB		28
 #define R8A7791_CLK_CMT1		29
 #define R8A7791_CLK_USBDMAC0		30
Signature · 3 lines
Regards,

Laurent Pinchart
#7 lore raw

PATCH v2 1/5 ARM: shmobile: r8a7791: add IIC0/1 clock macros

Hi Simon, Wolfram, Laurent, everyone,

Quoted 7 lines · Laurent Pinchart

Hi Wolfram,

Thank you for the patches.

For the whole series,

Acked-by Laurent Pinchart <[email protected]>

I've now given the patches in this series a spin on top of renesas-devel-v3.14-rc8-20140325v2.

To clarify, I can't seem to find any cover letter for this series, so instead I will with this email reply to [1/1]. Here is also a list of the patches that I believe are part of this series, please correct me if I'm wrong:

[PATCH V2 1/5] ARM: shmobile: r8a7791: add IIC0/1 clock macros [PATCH V2 2/5] ARM: shmobile: r8a7791: add IIC(B) clocks to dtsi [PATCH V2 3/5] ARM: shmobile: r8a7791: add IIC(B) cores to dtsi [PATCH V2 4/5] ARM: shmobile: koelsch: make i2c2-pfc node unique [PATCH V2 5/5] ARM: shmobile: koelsch: activate i2c6 bus

They all look good to me!

Acked-by Magnus Damm <[email protected]>

Simon, can you please pick up these changes? I believe there are no special dependencies.

Thanks,

/ magnus

author
#8 lore raw

PATCH v2 1/5 ARM: shmobile: r8a7791: add IIC0/1 clock macros

Quoted 5 lines

To clarify, I can't seem to find any cover letter for this series, so instead I will with this email reply to [1/1]. Here is also a list of the patches that I believe are part of this series, please correct me if I'm wrong:

You are absolutely right.

Quoted 3 lines

They all look good to me!

Acked-by Magnus Damm <[email protected]>

Thanks!

Quoted 2 lines

Simon, can you please pick up these changes? I believe there are no special dependencies.

The dependencies (pfc entries and new compatible for the driver) are already in linux-next.

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#9 lore raw

PATCH v2 1/5 ARM: shmobile: r8a7791: add IIC0/1 clock macros

Quoted 12 lines · Wolfram Sang
Quoted 5 lines

To clarify, I can't seem to find any cover letter for this series, so instead I will with this email reply to [1/1]. Here is also a list of the patches that I believe are part of this series, please correct me if I'm wrong:

You are absolutely right.

Quoted 3 lines

They all look good to me!

Acked-by Magnus Damm <[email protected]>
Quoted 7 lines

Thanks!

Quoted 2 lines

Simon, can you please pick up these changes? I believe there are no special dependencies.

The dependencies (pfc entries and new compatible for the driver) are already in linux-next.

Thanks, I have queued these up.