hix5hd2 add some nodes
v2 cover hix5hd2 add some nodes
v2:
Add comments of mac-address, suggested by Mark
Zhangfei Gao (6):
ARM: dts: hix5hd2: add gmac node
ARM: dts: hix5hd2: add mmc node
ARM: dts: hix5hd2: add usb node
ARM: dts: hix5hd2: add sata node
ARM: dts: hix5hd2: add gpio node
ARM: dts: hix5hd2: add wdg node
arch/arm/boot/dts/hisi-x5hd2-dkb.dts | 33 ++++ arch/arm/boot/dts/hisi-x5hd2.dtsi | 310 ++++++++++++++++++++++++++++++++++ 2 files changed, 343 insertions(+)
Signature · 1 line
1.7.9.5
PATCH v2 1/6 ARM: dts: hix5hd2: add gmac node
Signed-off-by Zhangfei Gao <[email protected]>
--- arch/arm/boot/dts/hisi-x5hd2-dkb.dts | 28 ++++++++++++++++++++++++++++ arch/arm/boot/dts/hisi-x5hd2.dtsi | 16 ++++++++++++++++ 2 files changed, 44 insertions(+)
arch/arm/boot/dts/hisi-x5hd2-dkb.dts +28 -0
@@ -51,3 +51,31 @@ &uart0 { status = "okay"; }; + +&gmac0 { + #address-cells = <1>; + #size-cells = <0>; + phy-handle = <&phy2>; + phy-mode = "mii"; + /* Placeholder, overwritten by bootloader */ + mac-address = [00 00 00 00 00 00]; + status = "okay"; + + phy2: ethernet-phy at 2 { + reg = <2>; + }; +}; + +&gmac1 { + #address-cells = <1>; + #size-cells = <0>; + phy-handle = <&phy1>; + phy-mode = "rgmii"; + /* Placeholder, overwritten by bootloader */ + mac-address = [00 00 00 00 00 00]; + status = "okay"; + + phy1: ethernet-phy at 1 { + reg = <1>; + }; +};
arch/arm/boot/dts/hisi-x5hd2.dtsi +16 -0
@@ -166,5 +166,21 @@ #clock-cells = <1>; }; }; + + gmac0: ethernet at 1840000 { + compatible = "hisilicon,hix5hd2-gmac"; + reg = <0x1840000 0x1000>,<0x184300c 0x4>; + interrupts = <0 71 4>; + clocks = <&clock HIX5HD2_MAC0_CLK>; + status = "disabled"; + }; + + gmac1: ethernet at 1841000 { + compatible = "hisilicon,hix5hd2-gmac"; + reg = <0x1841000 0x1000>,<0x1843010 0x4>; + interrupts = <0 72 4>; + clocks = <&clock HIX5HD2_MAC1_CLK>; + status = "disabled"; + }; }; };
Signature · 1 line
1.7.9.5
PATCH v2 2/6 ARM: dts: hix5hd2: add mmc node
In reply to Zhangfei GaoSigned-off-by Zhangfei Gao <[email protected]>
--- arch/arm/boot/dts/hisi-x5hd2.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
arch/arm/boot/dts/hisi-x5hd2.dtsi +17 -0
@@ -167,6 +167,23 @@ }; }; + /* unremovable emmc as mmcblk0 */ + mmc: mmc at 1830000 { + compatible = "snps,dw-mshc"; + reg = <0x1830000 0x1000>; + interrupts = <0 35 4>; + clocks = <&clock HIX5HD2_MMC_CIU_RST>, <&clock HIX5HD2_MMC_BIU_CLK>; + clock-names = "ciu", "biu"; + }; + + sd: mmc at 1820000 { + compatible = "snps,dw-mshc"; + reg = <0x1820000 0x1000>; + interrupts = <0 34 4>; + clocks = <&clock HIX5HD2_SD_CIU_RST>, <&clock HIX5HD2_SD_BIU_CLK>; + clock-names = "ciu","biu"; + }; + gmac0: ethernet at 1840000 { compatible = "hisilicon,hix5hd2-gmac"; reg = <0x1840000 0x1000>,<0x184300c 0x4>;
Signature · 1 line
1.7.9.5
PATCH v2 3/6 ARM: dts: hix5hd2: add usb node
In reply to Zhangfei GaoSigned-off-by Zhangfei Gao <[email protected]>
Signed-off-by Jiancheng Xue <[email protected]>
--- arch/arm/boot/dts/hisi-x5hd2.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
arch/arm/boot/dts/hisi-x5hd2.dtsi +14 -0
@@ -199,5 +199,19 @@ clocks = <&clock HIX5HD2_MAC1_CLK>; status = "disabled"; }; + + usb0: ehci at 1890000 { + compatible = "generic-ehci"; + reg = <0x1890000 0x1000>; + interrupts = <0 66 4>; + clocks = <&clock HIX5HD2_USB_CLK>; + }; + + usb1: ohci at 1880000 { + compatible = "generic-ohci"; + reg = <0x1880000 0x1000>; + interrupts = <0 67 4>; + clocks = <&clock HIX5HD2_USB_CLK>; + }; }; };
Signature · 1 line
1.7.9.5
PATCH v2 4/6 ARM: dts: hix5hd2: add sata node
In reply to Zhangfei GaoSigned-off-by Jiancheng Xue <[email protected]>
Signed-off-by Zhangfei Gao <[email protected]>
--- arch/arm/boot/dts/hisi-x5hd2-dkb.dts | 5 +++++ arch/arm/boot/dts/hisi-x5hd2.dtsi | 20 ++++++++++++++++++++ 2 files changed, 25 insertions(+)
arch/arm/boot/dts/hisi-x5hd2-dkb.dts +5 -0
@@ -79,3 +79,8 @@ reg = <1>; }; }; + +&ahci { + phys = <&sata_phy>; + phy-names = "sata-phy"; +};
arch/arm/boot/dts/hisi-x5hd2.dtsi +20 -0
@@ -213,5 +213,25 @@ interrupts = <0 67 4>; clocks = <&clock HIX5HD2_USB_CLK>; }; + + peripheral_ctrl: syscon at a20000 { + compatible = "syscon"; + reg = <0xa20000 0x1000>; + }; + + sata_phy: phy at 1900000 { + compatible = "hisilicon,hix5hd2-sata-phy"; + reg = <0x1900000 0x10000>; + #phy-cells = <0>; + hisilicon,peripheral-syscon = <&peripheral_ctrl>; + hisilicon,power-reg = <0x8 10>; + }; + + ahci: sata at 1900000 { + compatible = "hisilicon,hisi-ahci"; + reg = <0x1900000 0x10000>; + interrupts = <0 70 4>; + clocks = <&clock HIX5HD2_SATA_CLK>; + }; }; };
Signature · 1 line
1.7.9.5
PATCH v2 5/6 ARM: dts: hix5hd2: add gpio node
In reply to Zhangfei GaoSigned-off-by Jiancheng Xue <[email protected]>
Signed-off-by Zhangfei Gao <[email protected]>
--- arch/arm/boot/dts/hisi-x5hd2.dtsi | 234 +++++++++++++++++++++++++++++++++++++ 1 file changed, 234 insertions(+)
arch/arm/boot/dts/hisi-x5hd2.dtsi +234 -0
@@ -131,6 +131,240 @@ clock-names = "apb_pclk"; status = "disabled"; }; + + gpio0: gpio at b20000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb20000 0x1000>; + interrupts = <0 108 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio1: gpio at b21000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb21000 0x1000>; + interrupts = <0 109 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio2: gpio at b22000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb22000 0x1000>; + interrupts = <0 110 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio3: gpio at b23000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb23000 0x1000>; + interrupts = <0 111 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio4: gpio at b24000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb24000 0x1000>; + interrupts = <0 112 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio5: gpio at 004000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x004000 0x1000>; + interrupts = <0 113 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio6: gpio at b26000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb26000 0x1000>; + interrupts = <0 114 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio7: gpio at b27000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb27000 0x1000>; + interrupts = <0 115 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio8: gpio at b28000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb28000 0x1000>; + interrupts = <0 116 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio9: gpio at b29000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb29000 0x1000>; + interrupts = <0 117 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio10: gpio at b2a000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb2a000 0x1000>; + interrupts = <0 118 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio11: gpio at b2b000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb2b000 0x1000>; + interrupts = <0 119 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio12: gpio at b2c000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb2c000 0x1000>; + interrupts = <0 120 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio13: gpio at b2d000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb2d000 0x1000>; + interrupts = <0 121 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio14: gpio at b2e000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb2e000 0x1000>; + interrupts = <0 122 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio15: gpio at b2f000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb2f000 0x1000>; + interrupts = <0 123 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio16: gpio at b30000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb30000 0x1000>; + interrupts = <0 124 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio17: gpio at b31000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xb31000 0x1000>; + interrupts = <0 125 0x4>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&clock HIX5HD2_FIXED_100M>; + clock-names = "apb_pclk"; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; }; local_timer at 00a00600 {
Signature · 1 line
1.7.9.5
PATCH v2 6/6 ARM: dts: hix5hd2: add wdg node
In reply to Zhangfei GaoSigned-off-by Jiancheng Xue <[email protected]>
Signed-off-by Zhangfei Gao <[email protected]>
--- arch/arm/boot/dts/hisi-x5hd2.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
arch/arm/boot/dts/hisi-x5hd2.dtsi +9 -0
@@ -365,6 +365,15 @@ #interrupt-cells = <2>; status = "disabled"; }; + + wdg0: wdg at a2c000 { + compatible = "arm,sp805", "arm,primecell"; + arm,primecell-periphid = <0x00141805>; + reg = <0xa2c000 0x1000>; + interrupts = <0 29 4>; + clocks = <&clock HIX5HD2_WDG0_RST>; + clock-names = "apb_pclk"; + }; }; local_timer at 00a00600 {
Signature · 1 line
1.7.9.5
PATCH v2 6/6 ARM: dts: hix5hd2: add wdg node
Quoted 11 lines · Zhangfei Gao
Signed-off-by Jiancheng Xue <[email protected]>Signed-off-by Zhangfei Gao <[email protected]>--- arch/arm/boot/dts/hisi-x5hd2.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)arch/arm/boot/dts/hisi-x5hd2.dtsi +0
-0
arch/arm/boot/dts/hisi-x5hd2.dtsi line 369
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arch/arm/boot/dts/hisi-x5hd2.dtsi +2
-0@@ -365,6 +365,15 @@ #interrupt-cells = <2>; status = "disabled"; }; + + wdg0: wdg at a2c000 {
A nit-pick here, but everybody else is using 'wdt' for a watchdog timer node.
arch/arm/boot/dts/hisi-x5hd2.dtsi line 370
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arch/arm/boot/dts/hisi-x5hd2.dtsi +1
-0+ compatible = "arm,sp805", "arm,primecell";
I didn't see an entry for "arm,sp805" in Documentations, should there be one?
Dinh
Quoted 10 lines
arch/arm/boot/dts/hisi-x5hd2.dtsi +6
-0+ arm,primecell-periphid = <0x00141805>; + reg = <0xa2c000 0x1000>; + interrupts = <0 29 4>; + clocks = <&clock HIX5HD2_WDG0_RST>; + clock-names = "apb_pclk"; + }; }; local_timer at 00a00600 {
PATCH v2 6/6 ARM: dts: hix5hd2: add wdg node
Quoted 23 lines · Dinh Nguyen
Quoted 11 lines · Zhangfei Gao
Signed-off-by Jiancheng Xue <[email protected]>Signed-off-by Zhangfei Gao <[email protected]>--- arch/arm/boot/dts/hisi-x5hd2.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)arch/arm/boot/dts/hisi-x5hd2.dtsi +0
-0arch/arm/boot/dts/hisi-x5hd2.dtsi line 369
Quoted 5 lines
arch/arm/boot/dts/hisi-x5hd2.dtsi +2
-0@@ -365,6 +365,15 @@ #interrupt-cells = <2>; status = "disabled"; }; + + wdg0: wdg at a2c000 {A nit-pick here, but everybody else is using 'wdt' for a watchdog timer node.
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arch/arm/boot/dts/hisi-x5hd2.dtsi line 370
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arch/arm/boot/dts/hisi-x5hd2.dtsi +1
-0+ compatible = "arm,sp805", "arm,primecell";I didn't see an entry for "arm,sp805" in Documentations, should there be one?
There probably should, yes. It looks like only the sp804 is documented.
Pawel, it looks like you were the first sp805,sp810 dt user. Care to put together a couple of documents? ;)
Mark.
PATCH v2 6/6 ARM: dts: hix5hd2: add wdg node
Quoted 10 lines · Mark Rutland
Quoted 9 lines · Dinh Nguyen
Quoted 6 lines · Zhangfei Gao
Signed-off-by Jiancheng Xue <[email protected]>Signed-off-by Zhangfei Gao <[email protected]>--- arch/arm/boot/dts/hisi-x5hd2.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
Quoted 13 lines
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arch/arm/boot/dts/hisi-x5hd2.dtsi +0
-0@@ -365,6 +365,15 @@Quoted 8 lines
arch/arm/boot/dts/hisi-x5hd2.dtsi line 369
Quoted 5 lines
arch/arm/boot/dts/hisi-x5hd2.dtsi +2
-0#interrupt-cells = <2>; status = "disabled"; }; + + wdg0: wdg at a2c000 {A nit-pick here, but everybody else is using 'wdt' for a watchdog timer node.
Sure?will change to
wdt0: watchdog at a2c000
Quoted 11 lines
Quoted 5 lines
arch/arm/boot/dts/hisi-x5hd2.dtsi line 370
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arch/arm/boot/dts/hisi-x5hd2.dtsi +1
-0+ compatible = "arm,sp805", "arm,primecell";I didn't see an entry for "arm,sp805" in Documentations, should there be one?
There probably should, yes. It looks like only the sp804 is documented.
Pawel, it looks like you were the first sp805,sp810 dt user. Care to put together a couple of documents? ;)
Yes, that would be great,
Not find bindings for drivers/watchdog/sp805_wdt.c.
Thanks