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ARM: atmel: sama5d3xek: enable NOR flash support

PATCH New Bo Shen 2 participants 6 messages Jul 18, 2014 – Sep 19, 2014 Arm/Microchip (AT91) SoC support

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Bo Shen

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#0 lore raw

v2 cover ARM: atmel: sama5d3xek: enable NOR flash support

Add NOR flash support on sama5d3xek board. Then, we can use NOR flash related command to access it.

Changes in v2:
- Add CONFIG_SYS_FLASH_PROTECTION
- Correct the max sector number

Bo Shen (2):
ARM: atmel: sama5d3xek: add nor flash init function
ARM: atmel: sama5d3xek: enable NOR flash support

 board/atmel/sama5d3xek/sama5d3xek.c | 58 +++++++++++++++++++++++++++++++++++++
 include/configs/sama5d3xek.h        | 13 ++++++++-
 2 files changed, 70 insertions(+), 1 deletion(-)
Signature · 1 line
1.8.5.2
author
#1 lore raw

PATCH v2 1/2 ARM: atmel: sama5d3xek: add nor flash init function

Add NOR flash hardware init function, including SMC and PIO configuration.

Signed-off-by Bo Shen <[email protected]>

---
Changes in v2: None

 board/atmel/sama5d3xek/sama5d3xek.c | 58 +++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)
board/atmel/sama5d3xek/sama5d3xek.c +58 -0
index c835c12..f53754b 100644
@@ -67,6 +67,61 @@ void sama5d3xek_nand_hw_init(void)
 }
 #endif
 
+#ifndef CONFIG_SYS_NO_FLASH
+static void sama5d3xek_nor_hw_init(void)
+{
+	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+
+	at91_periph_clk_enable(ATMEL_ID_SMC);
+
+	/* Configure SMC CS0 for NOR flash */
+	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+	       AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
+	       &smc->cs[0].setup);
+	writel(AT91_SMC_PULSE_NWE(10) | AT91_SMC_PULSE_NCS_WR(11) |
+	       AT91_SMC_PULSE_NRD(10) | AT91_SMC_PULSE_NCS_RD(11),
+	       &smc->cs[0].pulse);
+	writel(AT91_SMC_CYCLE_NWE(11) | AT91_SMC_CYCLE_NRD(14),
+	       &smc->cs[0].cycle);
+	writel(AT91_SMC_TIMINGS_TCLR(0) | AT91_SMC_TIMINGS_TADL(0)  |
+	       AT91_SMC_TIMINGS_TAR(0)  | AT91_SMC_TIMINGS_TRR(0)   |
+	       AT91_SMC_TIMINGS_TWB(0)  | AT91_SMC_TIMINGS_RBNSEL(0)|
+	       AT91_SMC_TIMINGS_NFSEL(0), &smc->cs[0].timings);
+	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+	       AT91_SMC_MODE_EXNW_DISABLE |
+	       AT91_SMC_MODE_DBW_16 |
+	       AT91_SMC_MODE_TDF_CYCLE(1),
+	       &smc->cs[0].mode);
+
+	/* Address pin (A1 ~ A23) configuration */
+	at91_set_a_periph(AT91_PIO_PORTE, 1, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 2, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 3, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 4, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 5, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 6, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 7, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 8, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 9, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 10, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 11, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 12, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 13, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 14, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 15, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 16, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 17, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 18, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 19, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 20, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 21, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 22, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 23, 0);
+	/* CS0 pin configuration */
+	at91_set_a_periph(AT91_PIO_PORTE, 26, 0);
+}
+#endif
+
 #ifdef CONFIG_CMD_USB
 static void sama5d3xek_usb_hw_init(void)
 {

@@ -181,6 +236,9 @@ int board_init(void)
 #ifdef CONFIG_NAND_ATMEL
 	sama5d3xek_nand_hw_init();
 #endif
+#ifndef CONFIG_SYS_NO_FLASH
+	sama5d3xek_nor_hw_init();
+#endif
 #ifdef CONFIG_CMD_USB
 	sama5d3xek_usb_hw_init();
 #endif
Signature · 1 line
1.8.5.2
#2 lore raw

PATCH v2 1/2 ARM: atmel: sama5d3xek: add nor flash init function

Quoted 4 lines · Bo Shen

Add NOR flash hardware init function, including SMC and PIO configuration.

Signed-off-by Bo Shen <[email protected]>
Reviewed-by Andreas Bie?mann <[email protected]>
Quoted 83 lines

---
Changes in v2: None

 board/atmel/sama5d3xek/sama5d3xek.c | 58 +++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)
board/atmel/sama5d3xek/sama5d3xek.c +58 -0
index c835c12..f53754b 100644
@@ -67,6 +67,61 @@ void sama5d3xek_nand_hw_init(void)
 }
 #endif
 
+#ifndef CONFIG_SYS_NO_FLASH
+static void sama5d3xek_nor_hw_init(void)
+{
+	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+
+	at91_periph_clk_enable(ATMEL_ID_SMC);
+
+	/* Configure SMC CS0 for NOR flash */
+	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+	       AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
+	       &smc->cs[0].setup);
+	writel(AT91_SMC_PULSE_NWE(10) | AT91_SMC_PULSE_NCS_WR(11) |
+	       AT91_SMC_PULSE_NRD(10) | AT91_SMC_PULSE_NCS_RD(11),
+	       &smc->cs[0].pulse);
+	writel(AT91_SMC_CYCLE_NWE(11) | AT91_SMC_CYCLE_NRD(14),
+	       &smc->cs[0].cycle);
+	writel(AT91_SMC_TIMINGS_TCLR(0) | AT91_SMC_TIMINGS_TADL(0)  |
+	       AT91_SMC_TIMINGS_TAR(0)  | AT91_SMC_TIMINGS_TRR(0)   |
+	       AT91_SMC_TIMINGS_TWB(0)  | AT91_SMC_TIMINGS_RBNSEL(0)|
+	       AT91_SMC_TIMINGS_NFSEL(0), &smc->cs[0].timings);
+	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+	       AT91_SMC_MODE_EXNW_DISABLE |
+	       AT91_SMC_MODE_DBW_16 |
+	       AT91_SMC_MODE_TDF_CYCLE(1),
+	       &smc->cs[0].mode);
+
+	/* Address pin (A1 ~ A23) configuration */
+	at91_set_a_periph(AT91_PIO_PORTE, 1, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 2, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 3, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 4, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 5, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 6, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 7, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 8, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 9, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 10, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 11, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 12, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 13, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 14, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 15, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 16, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 17, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 18, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 19, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 20, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 21, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 22, 0);
+	at91_set_a_periph(AT91_PIO_PORTE, 23, 0);
+	/* CS0 pin configuration */
+	at91_set_a_periph(AT91_PIO_PORTE, 26, 0);
+}
+#endif
+
 #ifdef CONFIG_CMD_USB
 static void sama5d3xek_usb_hw_init(void)
 {

@@ -181,6 +236,9 @@ int board_init(void)
 #ifdef CONFIG_NAND_ATMEL
 	sama5d3xek_nand_hw_init();
 #endif
+#ifndef CONFIG_SYS_NO_FLASH
+	sama5d3xek_nor_hw_init();
+#endif
 #ifdef CONFIG_CMD_USB
 	sama5d3xek_usb_hw_init();
 #endif
#3 lore raw

PATCH v2 1/2 ARM: atmel: sama5d3xek: add nor flash init function

In reply to Bo Shen

Dear Bo Shen,

Quoted 10 lines · Bo Shen

Add NOR flash hardware init function, including SMC and PIO configuration.

Signed-off-by Bo Shen <[email protected]>
Reviewed-by Andreas Bie?mann <[email protected]>

---
Changes in v2: None

board/atmel/sama5d3xek/sama5d3xek.c | 58 +++++++++++++++++++++++++++++++++++++

1 file changed, 58 insertions(+)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann

author
#4 lore raw

PATCH v2 2/2 ARM: atmel: sama5d3xek: enable NOR flash support

In reply to Bo Shen
Signed-off-by Bo Shen <[email protected]>

---
Changes in v2:
- Add CONFIG_SYS_FLASH_PROTECTION
- Correct the max sector number

 include/configs/sama5d3xek.h | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)
include/configs/sama5d3xek.h +12 -1
index da27180..844416f 100644
@@ -79,8 +79,19 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_HOSTNAME
 
-/* No NOR flash */
+/* NOR flash */
+#define CONFIG_CMD_FLASH
+
+#ifdef CONFIG_CMD_FLASH
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_BASE		0x10000000
+#define CONFIG_SYS_MAX_FLASH_SECT	131
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#else
 #define CONFIG_SYS_NO_FLASH
+#endif
 
 /*
  * Command line configuration.
Signature · 1 line
1.8.5.2
#5 lore raw

PATCH v2 2/2 ARM: atmel: sama5d3xek: enable NOR flash support

Dear Bo Shen,

Quoted 8 lines · Bo Shen
Signed-off-by Bo Shen <[email protected]>

---
Changes in v2:
- Add CONFIG_SYS_FLASH_PROTECTION
- Correct the max sector number

include/configs/sama5d3xek.h | 13 ++++++++++++-

1 file changed, 12 insertions(+), 1 deletion(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bie?mann