nios2: divide nios2-io.h into each specific drivers and remove it
PATCH 1/1 nios2: divide nios2-io.h into each specific drivers and remove it
The nios2-io.h defines hardware registers and bits of several FPGA IP cores. It could be divided in to the specific drivers, including altera timer, altera sysid, altera uart and altera jtag uart. The altera pio and altera spi drivers use their own hardware definitions. The removal of nios2-io.h will help modularity and maintenance.
Signed-off-by Thomas Chou <[email protected]>
--- arch/nios2/cpu/cpu.c | 1 - arch/nios2/cpu/interrupts.c | 20 +++++- arch/nios2/cpu/sysid.c | 8 ++- drivers/serial/altera_jtag_uart.c | 20 +++++- drivers/serial/altera_uart.c | 39 +++++++++- include/nios2-io.h | 153 ------------------------------------- 6 files changed, 82 insertions(+), 159 deletions(-) delete mode 100644 include/nios2-io.h
arch/nios2/cpu/cpu.c +0 -1
@@ -7,7 +7,6 @@#include <common.h> #include <nios2.h> -#include <nios2-io.h> #include <asm/cache.h> DECLARE_GLOBAL_DATA_PTR ;
arch/nios2/cpu/interrupts.c +19 -1
@@ -10,7 +10,6 @@#include <nios2.h> -#include <nios2-io.h> #include <asm/types.h> #include <asm/io.h> #include <asm/ptrace.h>
@@ -21,6 +20,25 @@#include <status_led.h> #endif +typedef volatile struct { +unsigned status;/* Timer status reg */ +unsigned control;/* Timer control reg */ +unsigned periodl;/* Timeout period low */ +unsigned periodh;/* Timeout period high */ +unsigned snapl;/* Snapshot low */ +unsigned snaph;/* Snapshot high */ +}nios_timer_t ; + +/* status register */ +#define NIOS_TIMER_TO (1 << 0)/* Timeout */ +#define NIOS_TIMER_RUN (1 << 1)/* Timer running */ + +/* control register */ +#define NIOS_TIMER_ITO (1 << 0)/* Timeout int ena */ +#define NIOS_TIMER_CONT (1 << 1)/* Continuous mode */ +#define NIOS_TIMER_START (1 << 2)/* Start timer */ +#define NIOS_TIMER_STOP (1 << 3)/* Stop timer */ +#if defined(CONFIG_SYS_NIOS_TMRBASE ) && !defined(CONFIG_SYS_NIOS_TMRIRQ )#error CONFIG_SYS_NIOS_TMRIRQ not defined (see documentation)#endif
arch/nios2/cpu/sysid.c +6 -2
@@ -11,12 +11,16 @@#include <command.h> #include <asm/io.h> -#include <nios2-io.h> #include <linux/time.h> +typedef volatile struct { +unsigned id;/* The system build id */ +unsigned timestamp;/* Timestamp */ +}nios_sysid_t ; +void display_sysid (void ) { -struct nios_sysid_t *sysid = (struct nios_sysid_t *)CONFIG_SYS_NIOS_SYSID_BASE ; +nios_sysid_t *sysid = (nios_sysid_t *)CONFIG_SYS_NIOS_SYSID_BASE ;struct tm t;char asc[32 ];time_t stamp;
drivers/serial/altera_jtag_uart.c +19 -1
@@ -8,10 +8,28 @@#include <common.h> #include <watchdog.h> #include <asm/io.h> -#include <nios2-io.h> #include <linux/compiler.h> #include <serial.h> +typedef volatile struct { +unsigned data;/* Data register */ +unsigned control;/* Control register */ +}nios_jtag_t ; + +/* data register */ +#define NIOS_JTAG_RVALID (1<<15)/* Read valid */ +#define NIOS_JTAG_DATA (d) ((d)&0x0ff)/* Read data */ +#define NIOS_JTAG_RAVAIL (d) ((d)>>16)/* Read space avail */ + +/* control register */ +#define NIOS_JTAG_RE (1 << 0)/* read intr enable */ +#define NIOS_JTAG_WE (1 << 1)/* write intr enable */ +#define NIOS_JTAG_RI (1 << 8)/* read intr pending */ +#define NIOS_JTAG_WI (1 << 9)/* write intr pending*/ +#define NIOS_JTAG_AC (1 << 10)/* activity indicator */ +#define NIOS_JTAG_RRDY (1 << 12)/* read available */ +#define NIOS_JTAG_WSPACE (d) ((d)>>16)/* Write space avail */ +DECLARE_GLOBAL_DATA_PTR ;/*------------------------------------------------------------------
drivers/serial/altera_uart.c +38 -1
@@ -9,10 +9,47 @@#include <common.h> #include <watchdog.h> #include <asm/io.h> -#include <nios2-io.h> #include <linux/compiler.h> #include <serial.h> +typedef volatile struct { +unsigned rxdata;/* Rx data reg */ +unsigned txdata;/* Tx data reg */ +unsigned status;/* Status reg */ +unsigned control;/* Control reg */ +unsigned divisor;/* Baud rate divisor reg */ +unsigned endofpacket;/* End-of-packet reg */ +}nios_uart_t ; + +/* status register */ +#define NIOS_UART_PE (1 << 0)/* parity error */ +#define NIOS_UART_FE (1 << 1)/* frame error */ +#define NIOS_UART_BRK (1 << 2)/* break detect */ +#define NIOS_UART_ROE (1 << 3)/* rx overrun */ +#define NIOS_UART_TOE (1 << 4)/* tx overrun */ +#define NIOS_UART_TMT (1 << 5)/* tx empty */ +#define NIOS_UART_TRDY (1 << 6)/* tx ready */ +#define NIOS_UART_RRDY (1 << 7)/* rx ready */ +#define NIOS_UART_E (1 << 8)/* exception */ +#define NIOS_UART_DCTS (1 << 10)/* cts change */ +#define NIOS_UART_CTS (1 << 11)/* cts */ +#define NIOS_UART_EOP (1 << 12)/* eop detected */ + +/* control register */ +#define NIOS_UART_IPE (1 << 0)/* parity error int ena*/ +#define NIOS_UART_IFE (1 << 1)/* frame error int ena */ +#define NIOS_UART_IBRK (1 << 2)/* break detect int ena */ +#define NIOS_UART_IROE (1 << 3)/* rx overrun int ena */ +#define NIOS_UART_ITOE (1 << 4)/* tx overrun int ena */ +#define NIOS_UART_ITMT (1 << 5)/* tx empty int ena */ +#define NIOS_UART_ITRDY (1 << 6)/* tx ready int ena */ +#define NIOS_UART_IRRDY (1 << 7)/* rx ready int ena */ +#define NIOS_UART_IE (1 << 8)/* exception int ena */ +#define NIOS_UART_TBRK (1 << 9)/* transmit break */ +#define NIOS_UART_IDCTS (1 << 10)/* cts change int ena */ +#define NIOS_UART_RTS (1 << 11)/* rts */ +#define NIOS_UART_IEOP (1 << 12)/* eop detected int ena */ +DECLARE_GLOBAL_DATA_PTR ;/*------------------------------------------------------------------
include/nios2-io.h deleted +0 -153
153 lines not on this page · raw message
Signature · 1 line
1.7.1
Thomas Chou
AppliedPATCH 1/1 nios2: divide nios2-io.h into each specific drivers and remove it
Hi Thomas,
Quoted 7 lines · Thomas Chou
The
nios2-io.hdefines hardware registers and bits of several FPGA IP cores. It could be divided in to the specific drivers, including altera timer, altera sysid, altera uart and altera jtag uart. The altera pio and altera spi drivers use their own hardware definitions. The removal ofnios2-io.hwill help modularity and maintenance.Signed-off-by Thomas Chou <[email protected]>
Applied.
Thomas Chou