IDE: MMIO IDE device control should be little endian
PATCH 1/1 IDE: MMIO IDE device control should be little endian
Set the IDE MMIO memory type to little endian. The ATA specs identify words part of the control commands encoded as little endian. While this has no impact on little endian systems, it's required for big endian systems(eg OpenRisc).
--- hw/ide/mmio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
hw/ide/mmio.c +1 -1
@@ -82,7 +82,7 @@ static void mmio_ide_write(void *opaque, hwaddr addr,static const MemoryRegionOps mmio_ide_ops = { .read = mmio_ide_read, .write = mmio_ide_write, - .endianness =DEVICE_NATIVE_ENDIAN , + .endianness =DEVICE_LITTLE_ENDIAN , }; static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr,
@@ -102,7 +102,7 @@ static void mmio_ide_cmd_write(void *opaque, hwaddr
addr,
static const MemoryRegionOps mmio_ide_cs_ops = {
.read = mmio_ide_status_read,
.write = mmio_ide_cmd_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static const VMStateDescription vmstate_ide_mmio = {
Signature · 1 line
1.9.1
You forgot to cc qemu-devel...
Quoted 32 lines · Valentin Manea
Set the IDE MMIO memory type to little endian. The ATA specs identify words part of the control commands encoded as little endian. While this has no impact on little endian systems, it's required for big endian systems(eg OpenRisc).
Signed-off-by Valentin Manea <[email protected]>--- hw/ide/mmio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)hw/ide/mmio.c +2
-2@@ -82,7 +82,7 @@ static void mmio_ide_write(void *opaque, hwaddr addr,static const MemoryRegionOps mmio_ide_ops = { .read = mmio_ide_read, .write = mmio_ide_write, - .endianness =DEVICE_NATIVE_ENDIAN , + .endianness =DEVICE_LITTLE_ENDIAN , }; static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr,@@ -102,7 +102,7 @@ static void mmio_ide_cmd_write(void *opaque, hwaddr addr, static const MemoryRegionOps mmio_ide_cs_ops = { .read = mmio_ide_status_read, .write = mmio_ide_cmd_write, - .endianness =DEVICE_NATIVE_ENDIAN , + .endianness =DEVICE_LITTLE_ENDIAN , };
Quoted 3 lines
static const VMStateDescription
vmstate_ide_mmio= {
--
1.9.1
thanks
-- PMM
Quoted 4 lines · Valentin Manea
Set the IDE MMIO memory type to little endian. The ATA specs identify words part of the control commands encoded as little endian. While this has no impact on little endian systems, it's required for big endian systems(eg OpenRisc).
While the patch itself is simple, I'm not sure it is "trivial enough". And you didn't Cc neither qemu-devel@ nor the IDE subsystem "odd fixer" maintainers (kwolf@ and stefanha@). I'm not applying this for now to trivial tree.
Thanks,
/mjt
Quoted 29 lines
Signed-off-by Valentin Manea <[email protected]>--- hw/ide/mmio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)hw/ide/mmio.c +2
-2@@ -82,7 +82,7 @@ static void mmio_ide_write(void *opaque, hwaddr addr,static const MemoryRegionOps mmio_ide_ops = { .read = mmio_ide_read, .write = mmio_ide_write, - .endianness =DEVICE_NATIVE_ENDIAN , + .endianness =DEVICE_LITTLE_ENDIAN , }; static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr,@@ -102,7 +102,7 @@ static void mmio_ide_cmd_write(void *opaque, hwaddr addr, static const MemoryRegionOps mmio_ide_cs_ops = { .read = mmio_ide_status_read, .write = mmio_ide_cmd_write, - .endianness =DEVICE_NATIVE_ENDIAN , + .endianness =DEVICE_LITTLE_ENDIAN , };static const VMStateDescription
vmstate_ide_mmio= {
Quoted 10 lines · Michael Tokarev
Quoted 4 lines · Valentin Manea
Set the IDE MMIO memory type to little endian. The ATA specs identify words part of the control commands encoded as little endian. While this has no impact on little endian systems, it's required for big endian systems(eg OpenRisc).
While the patch itself is simple, I'm not sure it is "trivial enough". And you didn't Cc neither qemu-devel@ nor the IDE subsystem "odd fixer" maintainers (kwolf@ and stefanha@). I'm not applying this for now to trivial tree.
Hi Valentin,
Please resend the patch to [email protected] and CC Kevin Wolf <[email protected]> and Stefan Hajnoczi <[email protected]>.
All patches must go through the mailing list so the community has a chance to review and comment before a committer applies them.
Thanks,
Stefan
Quoted 6 lines · Stefan Hajnoczi
Hi Valentin,
Please resend the patch to [email protected] and CC Kevin Wolf <[email protected]> and Stefan Hajnoczi <[email protected]>.All patches must go through the mailing list so the community has a chance to review and comment before a committer applies them.
Hi Stefan,
Thanks for the tips, I have resent the patch.
Thanks,
Valentin
PATCH 1/1 IDE: MMIO IDE device control should be little endian
In reply to Valentin ManeaSet the IDE MMIO memory type to little endian. The ATA specs identify words part of the control commands encoded as little endian. While this has no impact on little endian systems, it's required for big endian systems(eg OpenRisc).
--- hw/ide/mmio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
hw/ide/mmio.c +1 -1
@@ -82,7 +82,7 @@ static void mmio_ide_write(void *opaque, hwaddr addr,static const MemoryRegionOps mmio_ide_ops = { .read = mmio_ide_read, .write = mmio_ide_write, - .endianness =DEVICE_NATIVE_ENDIAN , + .endianness =DEVICE_LITTLE_ENDIAN , }; static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr,
@@ -102,7 +102,7 @@ static void mmio_ide_cmd_write(void *opaque, hwaddr
addr,
static const MemoryRegionOps mmio_ide_cs_ops = {
.read = mmio_ide_status_read,
.write = mmio_ide_cmd_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static const VMStateDescription vmstate_ide_mmio = {
Signature · 1 line
1.9.1
Hi,
Did anybody get the chance to review this patch?
It would be quite nice to integrate it before all the other openrisc changes, to get
the IDE working also.
Thanks,
Valentin
Quoted 35 lines · Valentin Manea
Set the IDE MMIO memory type to little endian. The ATA specs identify words part of the control commands encoded as little endian. While this has no impact on little endian systems, it's required for big endian systems(eg OpenRisc).
Signed-off-by Valentin Manea <[email protected]>--- hw/ide/mmio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)hw/ide/mmio.c +2
-2@@ -82,7 +82,7 @@ static void mmio_ide_write(void *opaque, hwaddr addr,static const MemoryRegionOps mmio_ide_ops = { .read = mmio_ide_read, .write = mmio_ide_write, - .endianness =DEVICE_NATIVE_ENDIAN , + .endianness =DEVICE_LITTLE_ENDIAN , }; static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr,@@ -102,7 +102,7 @@ static void mmio_ide_cmd_write(void *opaque, hwaddr addr, static const MemoryRegionOps mmio_ide_cs_ops = { .read = mmio_ide_status_read, .write = mmio_ide_cmd_write, - .endianness =DEVICE_NATIVE_ENDIAN , + .endianness =DEVICE_LITTLE_ENDIAN , };static const VMStateDescription
vmstate_ide_mmio= {
Quoted 3 lines · Valentin Manea
Did anybody get the chance to review this patch?
It would be quite nice to integrate it before all the other openrisc changes, to get
the IDE working also.
Resending a patch as a reply in an existing thread increases the chance of it getting overlooked. Threaded mail clients bury the mail as part of an old conversation. Please send patches as top-level emails instead so they don't get missed.
Anyway...I've spotted it now and will review.
Stefan
Quoted 33 lines · Valentin Manea
Set the IDE MMIO memory type to little endian. The ATA specs identify words part of the control commands encoded as little endian. While this has no impact on little endian systems, it's required for big endian systems(eg OpenRisc).
Signed-off-by Valentin Manea <[email protected]>--- hw/ide/mmio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)hw/ide/mmio.c +2
-2@@ -82,7 +82,7 @@ static void mmio_ide_write(void *opaque, hwaddr addr,static const MemoryRegionOps mmio_ide_ops = { .read = mmio_ide_read, .write = mmio_ide_write, - .endianness =DEVICE_NATIVE_ENDIAN , + .endianness =DEVICE_LITTLE_ENDIAN , }; static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr,@@ -102,7 +102,7 @@ static void mmio_ide_cmd_write(void *opaque, hwaddr addr, static const MemoryRegionOps mmio_ide_cs_ops = { .read = mmio_ide_status_read, .write = mmio_ide_cmd_write, - .endianness =DEVICE_NATIVE_ENDIAN , + .endianness =DEVICE_LITTLE_ENDIAN , };
Quoted 1 line
static const VMStateDescription
vmstate_ide_mmio= {
This patch changes the semantics of the sh4eb target (with the r2d machine type), where the mmio-ide registers currently don't need byteswapping.
I guess a real big-endian SH4 with MMIO IDE *should* byteswap but want to double-check.
Does anyone know what the expected behavior here is?
Stefan
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Il 08/09/2014 11:07, Stefan Hajnoczi ha scritto:
Quoted 8 lines
This patch changes the semantics of the sh4eb target (with the r2d
machine type), where the mmio-ide registers currently don't need
byteswapping.I guess a real big-endian SH4 with MMIO IDE *should* byteswap but want to double-check.
Does anyone know what the expected behavior here is?
Nope, but I agree that it would likely be a bug fix for sh4eb.
Paolo
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Quoted 8 lines · Stefan Hajnoczi
This patch changes the semantics of the sh4eb target (with the r2d machine type), where the mmio-ide registers currently don't need byteswapping.
I guess a real big-endian SH4 with MMIO IDE *should* byteswap but want to double-check.
Does anyone know what the expected behavior here is?
That's exactly the reason I don't think this is a -trivial material :)
Thanks,
/mjt
Quoted 8 lines · Stefan Hajnoczi
This patch changes the semantics of the sh4eb target (with the r2d machine type), where the mmio-ide registers currently don't need byteswapping.
I guess a real big-endian SH4 with MMIO IDE *should* byteswap but want to double-check.
Does anyone know what the expected behavior here is?
I had a look for the documentation, and the SH7751R user's manual (hardware) is freely downloadable from the Renesas website. It says:
"The PCMCIA interface is supported only in little-endian mode."
So I think we don't need to care...
-- PMM
Kevin Wolf
AppliedAm 31.08.2014 um 10:32 hat Valentin Manea geschrieben:
Quoted 7 lines
Set the IDE MMIO memory type to little endian. The ATA specs identify words part of the control commands encoded as little endian. While this has no impact on little endian systems, it's required for big endian systems(eg OpenRisc).
Signed-off-by Valentin Manea <[email protected]>
Thanks, applied to the block branch.
Review static void mmio_ide_cmd_write(void *opaque, hwaddr · line 102
Quoted 3 lines
static
uint64_tmmio_ide_status_read(void *opaque, hwaddr addr,(quoted diff) +0
-0@@ -102,7 +102,7 @@ static void mmio_ide_cmd_write(void *opaque, hwaddr addr,
Please make sure that your patch isn't corrupted by your mail client, like by this line wrap. I had to manually fix the patch before I could apply it. For larger patches, I would simply have rejected it.
Kevin
Hi Kevin
Quoted 1 line · Kevin Wolf
Thanks, applied to the block branch.
Thanks a lot
Quoted 3 lines
Please make sure that your patch isn't corrupted by your mail client, like by this line wrap. I had to manually fix the patch before I could apply it. For larger patches, I would simply have rejected it.
Really sorry, my mail client was playing tricks on me. I will make sure to triple check next time.
Regards,
Valentin