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ARM: dts: sunxi: Fix interrupt-cells for [r]pio on A23/A31/A33/A80

PATCH New Hans de Goede 3 participants 6 messages Oct 15, 2015 – Oct 17, 2015

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Device tree bindings Arm/Allwinner sunXi SoC support Arm and arm64 SoC sub-architectures (common parts)
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Hans de Goede

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#0 lore raw

PATCH 1/3 ARM: dts: sunxi: Fix interrupt-cells for [r]pio on A23/A31/A33/A80

When the gpio interrupt bindings where changed to add a bank to the specifier list, the r_pio nodes of A23/A31/A33 where not updated to match and neither was the pio node of the A80, this fixes this.

Signed-off-by Hans de Goede <[email protected]>
---
 arch/arm/boot/dts/sun6i-a31.dtsi     | 2 +-
 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 1 +
 arch/arm/boot/dts/sun9i-a80.dtsi     | 2 +-
 3 files changed, 3 insertions(+), 2 deletions(-)
arch/arm/boot/dts/sun6i-a31.dtsi +1 -1
index 98359f3..a97274a8 100644
@@ -1102,7 +1102,7 @@
 			resets = <&apb0_rst 0>;
 			gpio-controller;
 			interrupt-controller;
-			#interrupt-cells = <2>;
+			#interrupt-cells = <3>;
 			#size-cells = <0>;
 			#gpio-cells = <3>;
arch/arm/boot/dts/sun8i-a23-a33.dtsi +1 -0
index 828aaf5..ddb9890 100644
@@ -647,6 +647,7 @@
 			resets = <&apb0_rst 0>;
 			gpio-controller;
 			interrupt-controller;
+			#interrupt-cells = <3>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			#gpio-cells = <3>;
arch/arm/boot/dts/sun9i-a80.dtsi +1 -1
index 5908e3d..1118bf5 100644
@@ -594,7 +594,7 @@
 			clocks = <&apb0_gates 5>;
 			gpio-controller;
 			interrupt-controller;
-			#interrupt-cells = <2>;
+			#interrupt-cells = <3>;
 			#size-cells = <0>;
 			#gpio-cells = <3>;
Signature · 1 line
2.5.0
author
#1 lore raw

PATCH 2/3 ARM: dts: sun6i: Add mmc2_pins_a pinmux setting to sun6i-a31.dtsi

Add a pinmux setting for using mmc2 in regular 4 bit mode.

Signed-off-by Hans de Goede <[email protected]>
---
 arch/arm/boot/dts/sun6i-a31.dtsi | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)
arch/arm/boot/dts/sun6i-a31.dtsi +9 -1
index a97274a8..83c1879 100644
@@ -691,7 +691,15 @@
 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 			};
 
-			mmc2_8bit_emmc_pins: mmc2 at 0 {
+			mmc2_pins_a: mmc2 at 0 {
+				allwinner,pins = "PC6", "PC7", "PC8", "PC9",
+						 "PC10", "PC11";
+				allwinner,function = "mmc2";
+				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+			};
+
+			mmc2_8bit_emmc_pins: mmc2 at 1 {
 				allwinner,pins = "PC6", "PC7", "PC8", "PC9",
 						 "PC10", "PC11", "PC12",
 						 "PC13", "PC14", "PC15",
Signature · 1 line
2.5.0
author
#2 lore raw

PATCH 3/3 ARM: dts: sun6i: Add a dts file for the Sinovoip BPI-M2 board

In reply to Hans de Goede

The Sinovoip BPI-M2 is a SBC board based on the A31s SoC it features 1G RAM, a microsd slot, Gbit ethernet, 4 usb-a USB-2 ports, ir receiver, stereo headphone jack and hdmi video output.

Signed-off-by Hans de Goede <[email protected]>
---
 arch/arm/boot/dts/Makefile                       |   1 +
 arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 194 +++++++++++++++++++++++
 2 files changed, 195 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
arch/arm/boot/dts/Makefile +1 -0
index 389f30d..46a163d 100644
@@ -612,6 +612,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
 	sun6i-a31-m9.dtb \
 	sun6i-a31-mele-a1000g-quad.dtb \
 	sun6i-a31s-cs908.dtb \
+	sun6i-a31s-sinovoip-bpi-m2.dtb \
 	sun6i-a31s-yones-toptech-bs1078-v2.dtb
 dtb-$(CONFIG_MACH_SUN7I) += \
 	sun7i-a20-bananapi.dtb \
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts new file +194 -0

194 lines not on this page · raw message

Signature · 1 line
2.5.0
#3 lore raw

PATCH 3/3 ARM: dts: sun6i: Add a dts file for the Sinovoip BPI-M2 board

Quoted 5 lines · Hans de Goede

The Sinovoip BPI-M2 is a SBC board based on the A31s SoC it features 1G RAM, a microsd slot, Gbit ethernet, 4 usb-a USB-2 ports, ir receiver, stereo headphone jack and hdmi video output.

Signed-off-by Hans de Goede <[email protected]>

Applied the three patches, thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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maintainer
#4 lore raw

PATCH 1/3 ARM: dts: sunxi: Fix interrupt-cells for [r]pio on A23/A31/A33/A80

In reply to Hans de Goede
Quoted 6 lines · On Thursday 15 October 2015 16:28:45 Hans de Goede wrote:

When the gpio interrupt bindings where changed to add a bank to the specifier list, the r_pio nodes of A23/A31/A33 where not updated to match and neither was the pio node of the A80, this fixes this.

Signed-off-by Hans de Goede <[email protected]>

Is this safe to apply by itself? I don't see any interrupts references to these nodes, so I assume it's fine, but if there are any cross-dependencies we need more careful planning.

Arnd

author
#5 lore raw

Hi,

Quoted 11 lines · Arnd Bergmann
Quoted 6 lines · On Thursday 15 October 2015 16:28:45 Hans de Goede wrote:

When the gpio interrupt bindings where changed to add a bank to the specifier list, the r_pio nodes of A23/A31/A33 where not updated to match and neither was the pio node of the A80, this fixes this.

Signed-off-by Hans de Goede <[email protected]>

Is this safe to apply by itself? I don't see any interrupts references to these nodes, so I assume it's fine, but if there are any cross-dependencies we need more careful planning.

Should be safe to apply by itself, later patches in this series introduce the first interrupt users of these nodes, which is what made me notice the mistake in them.

Regards,

Hans