at91: sam9x5 dt: add usart dma definitions to dt
Subsystems (2)
PATCH 1/1 at91: sam9x5 dt: add usart dma definitions to dt
This patch adds usart dma definitions to both dtsi for sam9x5 chips. Without usage of dma it's unable to catch all bytes on usart receiver.
--- arch/arm/boot/dts/at91sam9x5.dtsi | 20 ++++++++++++++++++++ arch/arm/boot/dts/at91sam9x5_usart3.dtsi | 5 +++++ 2 files changed, 25 insertions(+)
arch/arm/boot/dts/at91sam9x5.dtsi +20 -0
@@ -860,6 +860,11 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; + atmel,use-dma-tx; + atmel,use-dma-rx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&mck>; clock-names = "usart"; status = "disabled";
@@ -871,6 +876,11 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>, + <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart0_clk>; clock-names = "usart"; status = "disabled";
@@ -882,6 +892,11 @@ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>, + <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart1_clk>; clock-names = "usart"; status = "disabled";
@@ -893,6 +908,11 @@ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart2_clk>; clock-names = "usart"; status = "disabled";
arch/arm/boot/dts/at91sam9x5_usart3.dtsi +5 -0
@@ -57,6 +57,11 @@ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart3_clk>; clock-names = "usart"; status = "disabled";
--
1.9.1
PATCH 1/1 at91: sam9x5 dt: add usart dma definitions to dt
Hi,
Quoted 3 lines · Jiri Prchal
This patch adds usart dma definitions to both dtsi for sam9x5 chips. Without usage of dma it's unable to catch all bytes on usart receiver.
Adding DMA configuration is a good idea. But I think we will have an issue because we have too many requested channels for DMA0.
Adding usart0, 9 dma channels will be requested. So a choice has to be done. On DMA0 we have:
- 2 channels for SSC,
- 1 channel for MMC,
- 2 channels for I2C0,
- 2 channels for SPI0,
- 2 channels for USART0.
I have only mentionned enabled devices.
Regards
Ludovic
Quoted 82 lines
Signed-off-by Jiri Prchal <[email protected]>--- arch/arm/boot/dts/at91sam9x5.dtsi | 20 ++++++++++++++++++++ arch/arm/boot/dts/at91sam9x5_usart3.dtsi | 5 +++++ 2 files changed, 25 insertions(+)arch/arm/boot/dts/at91sam9x5.dtsi +20
-0@@ -860,6 +860,11 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; + atmel,use-dma-tx; + atmel,use-dma-rx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&mck>; clock-names = "usart"; status = "disabled";@@ -871,6 +876,11 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>, + <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart0_clk>; clock-names = "usart"; status = "disabled";@@ -882,6 +892,11 @@ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>, + <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart1_clk>; clock-names = "usart"; status = "disabled";@@ -893,6 +908,11 @@ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart2_clk>; clock-names = "usart"; status = "disabled";arch/arm/boot/dts/at91sam9x5_usart3.dtsi +5
-1@@ -57,6 +57,11 @@ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart3_clk>; clock-names = "usart"; status = "disabled"; --1.9.1
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PATCH 1/1 at91: sam9x5 dt: add usart dma definitions to dt
On 10/10/2014 10:12, Ludovic Desroches :
Quoted 5 lines
Hi,
Quoted 2 lines · Jiri Prchal
This patch adds usart dma definitions to both dtsi for sam9x5 chips. Without usage of dma it's unable to catch all bytes on usart receiver.
At which speed, with which kind of load on the CPU?
Quoted 10 lines
Adding DMA configuration is a good idea. But I think we will have an issue because we have too many requested channels for DMA0.
Adding usart0, 9 dma channels will be requested. So a choice has to be done. On DMA0 we have:
- 2 channels for SSC,
- 1 channel for MMC,
- 2 channels for I2C0,
- 2 channels for SPI0,
- 2 channels for USART0.
Yes, so maybe disable the DMA for SPI0. But the decision is pretty related to the use of the board. So I would not change things...
Quoted 1 line
I have only mentioned enabled devices.
Yes indeed,
So maybe we can add the "dmas" properties in the files mentioned by Jiri, but not enable them like you did Ludovic in this patch:
d24cd78399a3625a69887c8124638260c1c37a2b (ARM: at91: sama5d3: add usart dma configurations)
Bye,
Quoted 84 lines
Quoted 82 lines
Signed-off-by Jiri Prchal <[email protected]>--- arch/arm/boot/dts/at91sam9x5.dtsi | 20 ++++++++++++++++++++ arch/arm/boot/dts/at91sam9x5_usart3.dtsi | 5 +++++ 2 files changed, 25 insertions(+)arch/arm/boot/dts/at91sam9x5.dtsi +20
-0@@ -860,6 +860,11 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; + atmel,use-dma-tx; + atmel,use-dma-rx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&mck>; clock-names = "usart"; status = "disabled";@@ -871,6 +876,11 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>, + <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart0_clk>; clock-names = "usart"; status = "disabled";@@ -882,6 +892,11 @@ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>, + <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart1_clk>; clock-names = "usart"; status = "disabled";@@ -893,6 +908,11 @@ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart2_clk>; clock-names = "usart"; status = "disabled";arch/arm/boot/dts/at91sam9x5_usart3.dtsi +5
-1@@ -57,6 +57,11 @@ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart3_clk>; clock-names = "usart"; status = "disabled"; --1.9.1
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Signature · 1 line
Nicolas Ferre
PATCH 1/1 at91: sam9x5 dt: add usart dma definitions to dt
Hi,
Dne 10.10.2014 v 10:39 Nicolas Ferre napsal(a):
Quoted 8 lines
On 10/10/2014 10:12, Ludovic Desroches :
Quoted 5 lines
Hi,
Quoted 2 lines · Jiri Prchal
This patch adds usart dma definitions to both dtsi for sam9x5 chips. Without usage of dma it's unable to catch all bytes on usart receiver.
At which speed, with which kind of load on the CPU?
At 115200b/s, load aprox. 10% at 400MHz.
Quoted 3 lines
Quoted 3 lines
Adding DMA configuration is a good idea. But I think we will have an issue because we have too many requested channels for DMA0.
I discovered that dma has only 8 channels for 15 peripherals right now. And it makes big problem to me, I need at least 9ch on dma0 since on dma1 need only 6.
Quoted 11 lines
Quoted 8 lines
Adding usart0, 9 dma channels will be requested. So a choice has to be done. On DMA0 we have:
- 2 channels for SSC,
- 1 channel for MMC,
- 2 channels for I2C0,
- 2 channels for SPI0,
- 2 channels for USART0.Yes, so maybe disable the DMA for SPI0. But the decision is pretty related to the use of the board. So I would not change things...
No, SPI0 need too.
Quoted 5 lines
Quoted 2 lines
I have only mentioned enabled devices.
Yes indeed,
Quoted 7 lines
So maybe we can add the "dmas" properties in the files mentioned by Jiri, but not enable them like you did Ludovic in this patch:
d24cd78399a3625a69887c8124638260c1c37a2b(ARM: at91: sama5d3: add usart dma configurations)Bye,
But is it possible to enable/disable dma at runtime from userspace?
Quoted 88 lines
Quoted 86 lines
Quoted 84 lines
Signed-off-by Jiri Prchal <[email protected]>--- arch/arm/boot/dts/at91sam9x5.dtsi | 20 ++++++++++++++++++++ arch/arm/boot/dts/at91sam9x5_usart3.dtsi | 5 +++++ 2 files changed, 25 insertions(+)arch/arm/boot/dts/at91sam9x5.dtsi +20
-0@@ -860,6 +860,11 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; + atmel,use-dma-tx; + atmel,use-dma-rx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&mck>; clock-names = "usart"; status = "disabled";@@ -871,6 +876,11 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>, + <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart0_clk>; clock-names = "usart"; status = "disabled";@@ -882,6 +892,11 @@ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>, + <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart1_clk>; clock-names = "usart"; status = "disabled";@@ -893,6 +908,11 @@ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart2_clk>; clock-names = "usart"; status = "disabled";arch/arm/boot/dts/at91sam9x5_usart3.dtsi +5
-1@@ -57,6 +57,11 @@ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>, + <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; clocks = <&usart3_clk>; clock-names = "usart"; status = "disabled"; --1.9.1
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