initial suport for Alphascale ASM9260
Subsystems (10)
v4 cover initial suport for Alphascale ASM9260
This patchset provide initial support for Alpascale ASM9260, ARM based SoC.
Oleksij Rempel (10):
ARM: add mach-asm9260
arm: add lolevel debug support for asm9260
ARM: dts: add DT for Alphascale ASM9260 SoC
ARM: add alphascale,acc.txt bindings documentation
ARM: clk: add clk-asm9260 driver
clocksource: add asm9260_timer driver tty/serial/mxs-auart.c: add initial Alphascale ASM9260 support add Alphascale to vendor-prefixes.txt
irqchip: mxs: prepare driver for HW with different offsets
irqchip: mxs: add Alpascale ASM9260 support
.../devicetree/bindings/clock/alphascale,acc.txt | 113 +++++++ .../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/Kconfig | 2 + arch/arm/Kconfig.debug | 33 +- arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/alphascale-asm9260-devkit.dts | 21 ++ arch/arm/boot/dts/alphascale-asm9260.dtsi | 134 ++++++++ arch/arm/include/debug/asm9260.S | 31 ++ arch/arm/mach-asm9260/Kconfig | 8 + arch/arm/mach-asm9260/Makefile | 1 + arch/arm/mach-asm9260/core.c | 20 ++ drivers/clk/Makefile | 1 + drivers/clk/clk-asm9260.c | 351 +++++++++++++++++++ drivers/clocksource/Kconfig | 4 + drivers/clocksource/Makefile | 1 + drivers/clocksource/asm9260_timer.c | 234 +++++++++++++ drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 2 +- drivers/irqchip/alphascale_asm9260-icoll.h | 109 ++++++ drivers/irqchip/irq-mxs.c | 157 ++++++++- drivers/tty/serial/Kconfig | 5 +- drivers/tty/serial/alphascale,asm9260_serial.h | 373 +++++++++++++++++++++ drivers/tty/serial/mxs-auart.c | 344 ++++++++++++------- include/dt-bindings/clock/alphascale,asm9260.h | 97 ++++++ 25 files changed, 1907 insertions(+), 143 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/alphascale,acc.txt create mode 100644 arch/arm/boot/dts/alphascale-asm9260-devkit.dts create mode 100644 arch/arm/boot/dts/alphascale-asm9260.dtsi create mode 100644 arch/arm/include/debug/asm9260.S create mode 100644 arch/arm/mach-asm9260/Kconfig create mode 100644 arch/arm/mach-asm9260/Makefile create mode 100644 arch/arm/mach-asm9260/core.c create mode 100644 drivers/clk/clk-asm9260.c create mode 100644 drivers/clocksource/asm9260_timer.c create mode 100644 drivers/irqchip/alphascale_asm9260-icoll.h create mode 100644 drivers/tty/serial/alphascale,asm9260_serial.h create mode 100644 include/dt-bindings/clock/alphascale,asm9260.h
Signature · 1 line
1.9.1
PATCH v4 1/10 ARM: add mach-asm9260
it is low cost (?) SoC targeted for market in China and India which trying to compete with AT91SAM9G25.
Here is some info:
http://www.alphascale.com/index.asp?ics/615.html
In some cases this SoC looks similar to iMX23/iMX28. But currently it makes no sense to merge mach code of this devices. Especially because most differences are already collected mach-mxs folder.
--- arch/arm/Kconfig | 2 ++ arch/arm/Makefile | 1 + arch/arm/mach-asm9260/Kconfig | 8 ++++++++ arch/arm/mach-asm9260/Makefile | 1 + arch/arm/mach-asm9260/core.c | 20 ++++++++++++++++++++ 5 files changed, 32 insertions(+) create mode 100644 arch/arm/mach-asm9260/Kconfig create mode 100644 arch/arm/mach-asm9260/Makefile create mode 100644 arch/arm/mach-asm9260/core.c
arch/arm/Kconfig +2 -0
@@ -968,6 +968,8 @@ source "arch/arm/mach-w90x900/Kconfig" source "arch/arm/mach-zynq/Kconfig" +source "arch/arm/mach-asm9260/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool
arch/arm/Makefile +1 -0
@@ -146,6 +146,7 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 +machine-$(CONFIG_MACH_ASM9260) += asm9260 machine-$(CONFIG_ARCH_AXXIA) += axxia machine-$(CONFIG_ARCH_BCM) += bcm machine-$(CONFIG_ARCH_BERLIN) += berlin
arch/arm/mach-asm9260/Kconfig new file +8 -0
@@ -0,0 +1,8 @@ +config MACH_ASM9260 + bool "Alphascale ASM9260" + depends on ARCH_MULTI_V5 + select IRQ_MXS + select ASM9260_TIMER + select CPU_ARM926T + help + Support for Alpascale ASM9260 based platform.
arch/arm/mach-asm9260/Makefile new file +1 -0
@@ -0,0 +1 @@ +obj-$(CONFIG_MACH_ASM9260) += core.o
arch/arm/mach-asm9260/core.c new file +20 -0
@@ -0,0 +1,20 @@ +/* +* Copyright (C) 2014 Oleksij Rempel <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +*/ + +#include <linux/of_platform.h> +#include <asm/mach/arch.h> + +static const char *const asm9260_dt_board_compat[]__initconst = { +"alphascale,asm9260" , +NULL +}; + +DT_MACHINE_START (ASM9260 ,"Alphascale ASM9260 (Device Tree Support)" ) + .dt_compat = asm9260_dt_board_compat, +MACHINE_END
Signature · 1 line
1.9.1
PATCH v4 1/10 ARM: add mach-asm9260
Quoted 87 lines · Oleksij Rempel
it is low cost (?) SoC targeted for market in China and India which trying to compete with AT91SAM9G25.
Here is some info:
http://www.alphascale.com/index.asp?ics/615.htmlIn some cases this SoC looks similar to iMX23/iMX28. But currently it makes no sense to merge mach code of this devices. Especially because most differences are already collected mach-mxs folder.
Signed-off-by Oleksij Rempel <[email protected]>--- arch/arm/Kconfig | 2 ++ arch/arm/Makefile | 1 + arch/arm/mach-asm9260/Kconfig | 8 ++++++++ arch/arm/mach-asm9260/Makefile | 1 + arch/arm/mach-asm9260/core.c | 20 ++++++++++++++++++++ 5 files changed, 32 insertions(+) create mode 100644 arch/arm/mach-asm9260/Kconfig create mode 100644 arch/arm/mach-asm9260/Makefile create mode 100644 arch/arm/mach-asm9260/core.carch/arm/Kconfig +2
-0@@ -968,6 +968,8 @@ source "arch/arm/mach-w90x900/Kconfig" source "arch/arm/mach-zynq/Kconfig" +source "arch/arm/mach-asm9260/Kconfig" + # Definitions to make life easier config ARCH_ACORN boolarch/arm/Makefile +1
-0@@ -146,6 +146,7 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 +machine-$(CONFIG_MACH_ASM9260) += asm9260 machine-$(CONFIG_ARCH_AXXIA) += axxia machine-$(CONFIG_ARCH_BCM) += bcm machine-$(CONFIG_ARCH_BERLIN) += berlinarch/arm/mach-asm9260/Kconfig new file +8
-0@@ -0,0 +1,8 @@ +config MACH_ASM9260 + bool "Alphascale ASM9260" + depends on ARCH_MULTI_V5 + select IRQ_MXS + select ASM9260_TIMER + select CPU_ARM926T + help + Support for Alpascale ASM9260 based platform.arch/arm/mach-asm9260/Makefile new file +1
-0@@ -0,0 +1 @@ +obj-$(CONFIG_MACH_ASM9260) += core.oarch/arm/mach-asm9260/core.c new file +10
-0@@ -0,0 +1,20 @@ +/* +* Copyright (C) 2014 Oleksij Rempel <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +*/ + +#include <linux/of_platform.h>
arch/arm/mach-asm9260/core.c line 20
Quoted 10 lines
arch/arm/mach-asm9260/core.c new file +10
-0+#include <asm/mach/arch.h> + +static const char *const asm9260_dt_board_compat[]__initconst = { +"alphascale,asm9260" , +NULL +}; + +DT_MACHINE_START (ASM9260 ,"Alphascale ASM9260 (Device Tree Support)" ) + .dt_compat = asm9260_dt_board_compat, +MACHINE_END
You don't need this file as you are not doing anything special here. Only the kconfig is needed.
Rob
PATCH v5 1/10 ARM: add mach-asm9260
it is low cost (?) SoC targeted for market in China and India which trying to compete with AT91SAM9G25.
Here is some info:
http://www.alphascale.com/index.asp?ics/615.html
In some cases this SoC looks similar to iMX23/iMX28. But currently it makes no sense to merge mach code of this devices. Especially because most differences are already collected mach-mxs folder.
--- arch/arm/Kconfig | 2 ++ arch/arm/mach-asm9260/Kconfig | 8 ++++++++ 2 files changed, 10 insertions(+) create mode 100644 arch/arm/mach-asm9260/Kconfig
arch/arm/Kconfig +2 -0
@@ -968,6 +968,8 @@ source "arch/arm/mach-w90x900/Kconfig" source "arch/arm/mach-zynq/Kconfig" +source "arch/arm/mach-asm9260/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool
arch/arm/mach-asm9260/Kconfig new file +8 -0
@@ -0,0 +1,8 @@ +config MACH_ASM9260 + bool "Alphascale ASM9260" + depends on ARCH_MULTI_V5 + select IRQ_MXS + select ASM9260_TIMER + select CPU_ARM926T + help + Support for Alpascale ASM9260 based platform.
Signature · 1 line
1.9.1
PATCH v4 2/10 arm: add lolevel debug support for asm9260
In reply to Oleksij Rempel--- arch/arm/Kconfig.debug | 33 ++++++++++++++++++++++++++++++--- arch/arm/include/debug/asm9260.S | 31 +++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+), 3 deletions(-) create mode 100644 arch/arm/include/debug/asm9260.S
arch/arm/Kconfig.debug +30 -3
@@ -953,6 +953,27 @@ choice options; the platform specific options are deprecated and will be soon removed. + config DEBUG_ASM9260_UART + bool "Kernel low-level debugging via asm9260 UART" + depends on MACH_ASM9260 + help + Say Y here if you want the debug print routines to direct + their output to an UART or USART port on asm9260 based + machines. + + DEBUG_UART_PHYS | DEBUG_UART_VIRT + + 0x80000000 | 0xf0000000 | UART0 + 0x80004000 | 0xf0004000 | UART1 + 0x80008000 | 0xf0008000 | UART2 + 0x8000c000 | 0xf000c000 | UART3 + 0x80010000 | 0xf0010000 | UART4 + 0x80014000 | 0xf0014000 | UART5 + 0x80018000 | 0xf0018000 | UART6 + 0x8001c000 | 0xf001c000 | UART7 + 0x80020000 | 0xf0020000 | UART8 + 0x80024000 | 0xf0024000 | UART9 + endchoice config DEBUG_EXYNOS_UART
@@ -1038,6 +1059,7 @@ config DEBUG_LL_INCLUDE default "debug/vf.S" if DEBUG_VF_UART default "debug/vt8500.S" if DEBUG_VT8500_UART0 default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1 + default "debug/asm9260.S" if DEBUG_ASM9260_UART default "mach/debug-macro.S" # Compatibility options for PL01x
@@ -1094,6 +1116,7 @@ config DEBUG_UART_PHYS default 0x50008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \ DEBUG_S3C2410_UART2) default 0x7c0003f8 if FOOTBRIDGE + default 0x80010000 if DEBUG_ASM9260_UART default 0x80070000 if DEBUG_IMX23_UART default 0x80074000 if DEBUG_IMX28_UART default 0x80230000 if DEBUG_PICOXCELL_UART
@@ -1126,7 +1149,8 @@ config DEBUG_UART_PHYS depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ DEBUG_LL_UART_EFM32 || \ DEBUG_UART_8250 || DEBUG_UART_PL01X || \ - DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART + DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || \ + DEBUG_S3C24XX_UART || DEBUG_ASM9260_UART config DEBUG_UART_VIRT hex "Virtual base address of debug UART"
@@ -1134,6 +1158,7 @@ config DEBUG_UART_VIRT default 0xe1000000 if DEBUG_MSM_UART default 0xf0000be0 if ARCH_EBSA110 default 0xf0009000 if DEBUG_CNS3XXX + default 0xf0010000 if DEBUG_ASM9260_UART default 0xf01fb000 if DEBUG_NOMADIK_UART default 0xf0201000 if DEBUG_BCM2835 default 0xf1000300 if DEBUG_BCM_5301X
@@ -1194,7 +1219,8 @@ config DEBUG_UART_VIRT default DEBUG_UART_PHYS if !MMU depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ DEBUG_UART_8250 || DEBUG_UART_PL01X || \ - DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART + DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || \ + DEBUG_S3C24XX_UART || DEBUG_ASM9260_UART config DEBUG_UART_8250_SHIFT int "Register offset shift for the 8250 debug UART"
@@ -1236,7 +1262,8 @@ config DEBUG_UNCOMPRESS config UNCOMPRESS_INCLUDE string default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM || \ - PLAT_SAMSUNG || ARCH_EFM32 + PLAT_SAMSUNG || ARCH_EFM32 || \ + MACH_ASM9260 default "mach/uncompress.h" config EARLY_PRINTK
arch/arm/include/debug/asm9260.S new file +31 -0
@@ -0,0 +1,31 @@ +/* arch/arm/mach-imx/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * Modified for ASM9260 by Oleksij Remepl <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + + .macro addruart, rp, rv, tmp + ldr \rp, = CONFIG_DEBUG_UART_PHYS + ldr \rv, = CONFIG_DEBUG_UART_VIRT + .endm + + .macro waituart,rd,rx + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #0x50] @ TXDATA + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #0x60] @ STAT + tst \rd, #1 << 27 @ TXEMPTY + beq 1002b @ wait until transmit done + .endm
Signature · 1 line
1.9.1
PATCH v4 3/10 ARM: dts: add DT for Alphascale ASM9260 SoC
In reply to Oleksij Rempelfor now it is wary basic SoC description with most important IPs needed to make this device work
--- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/alphascale-asm9260-devkit.dts | 21 ++++ arch/arm/boot/dts/alphascale-asm9260.dtsi | 134 ++++++++++++++++++++++++ include/dt-bindings/clock/alphascale,asm9260.h | 97 +++++++++++++++++ 4 files changed, 254 insertions(+) create mode 100644 arch/arm/boot/dts/alphascale-asm9260-devkit.dts create mode 100644 arch/arm/boot/dts/alphascale-asm9260.dtsi create mode 100644 include/dt-bindings/clock/alphascale,asm9260.h
arch/arm/boot/dts/Makefile +2 -0
@@ -492,6 +492,8 @@ dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \ dove-d3plug.dtb \ dove-dove-db.dtb +dtb-$(CONFIG_MACH_ASM9260) += alphascale-asm9260-devkit.dtb + targets += dtbs dtbs_install targets += $(dtb-y) endif
arch/arm/boot/dts/alphascale-asm9260-devkit.dts new file +21 -0
@@ -0,0 +1,21 @@ +/* + * Copyright 2014 Oleksij Rempel <[email protected]> + * + * Licensed under the X11 license or the GPL v2 (or later) + */ + +/dts-v1/; +#include "alphascale-asm9260.dtsi" + +/ { + model = "Alphascale asm9260 Development Kit"; + compatible = "alphascale,asm9260devkit", "alphascale,asm9260"; + + aliases { + serial0 = &uart4; + }; +}; + +&uart4 { + status = "okay"; +};
arch/arm/boot/dts/alphascale-asm9260.dtsi new file +134 -0
134 lines not on this page · raw message
include/dt-bindings/clock/alphascale,asm9260.h new file +97 -0
97 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH v4 3/10 ARM: dts: add DT for Alphascale ASM9260 SoC
Quoted 4 lines · Oleksij Rempel
for now it is wary basic SoC description with most important IPs needed to make this device work
Signed-off-by Oleksij Rempel <[email protected]>
Quoted 9 lines
--- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/alphascale-asm9260-devkit.dts | 21 ++++ arch/arm/boot/dts/alphascale-asm9260.dtsi | 134 ++++++++++++++++++++++++ include/dt-bindings/clock/alphascale,asm9260.h | 97 +++++++++++++++++ 4 files changed, 254 insertions(+) create mode 100644 arch/arm/boot/dts/alphascale-asm9260-devkit.dts create mode 100644 arch/arm/boot/dts/alphascale-asm9260.dtsi create mode 100644 include/dt-bindings/clock/alphascale,asm9260.h
This last file should go with the clock controller driver/binding, which should come before this patch.
[...]
arch/arm/boot/dts/alphascale-asm9260.dtsi line 40
Quoted 5 lines
arch/arm/boot/dts/alphascale-asm9260.dtsi new file +5
-0+ soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges;
There seems to be odd whitespace before the ranges property.
Thanks,
Mark.
PATCH v4 4/10 ARM: add alphascale,acc.txt bindings documentation
In reply to Oleksij RempelACC is for AlphaScale Clock Controller.
--- .../devicetree/bindings/clock/alphascale,acc.txt | 113 +++++++++++++++++++++ 1 file changed, 113 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/alphascale,acc.txt
Documentation/devicetree/bindings/clock/alphascale,acc.txt new file +113 -0
@@ -0,0 +1,113 @@ +Alphascale Clock Controller + +The ACC (Alphascale Clock Controller) is responsible of choising proper +clock source, setting deviders and clock gates. + +Required properties for the ACC node: +- compatible: must be "alphascale,asm9260-clock-controller" +- reg: must contain the ACC register base and size + +ACC allow peripheral clocks to be gated to save some power. The clock consumer +should specify the desired clock by having the clock ID in it +"clocks" phandle cell. It is encouraged to use dt-binding for clock ID +definitions. SoC specific dt-binding should be included to the device tree +descriptor. For example Alphascale ASM9260: +#include <dt-bindings/clock/alphascale,asm9260.h> + +This binding contains two types of clock sinks: _AHB_ sink - a peripheral +gate; _SYS_ sink - an adjustable clock source. Not all clock consumer +have _SYS_ sink. All sink details can be found in the SoC documentation. +CLKID_AHB_ROM 0 +CLKID_AHB_RAM 1 +CLKID_AHB_GPIO 2 +CLKID_AHB_MAC 3 +CLKID_AHB_EMI 4 +CLKID_AHB_USB0 5 +CLKID_AHB_USB1 6 +CLKID_AHB_DMA0 7 +CLKID_AHB_DMA1 8 +CLKID_AHB_UART0 9 +CLKID_AHB_UART1 10 +CLKID_AHB_UART2 11 +CLKID_AHB_UART3 12 +CLKID_AHB_UART4 13 +CLKID_AHB_UART5 14 +CLKID_AHB_UART6 15 +CLKID_AHB_UART7 16 +CLKID_AHB_UART8 17 +CLKID_AHB_UART9 18 +CLKID_AHB_I2S0 19 +CLKID_AHB_I2C0 20 +CLKID_AHB_I2C1 21 +CLKID_AHB_SSP0 22 +CLKID_AHB_IOCONFIG 23 +CLKID_AHB_WDT 24 +CLKID_AHB_CAN0 25 +CLKID_AHB_CAN1 26 +CLKID_AHB_MPWM 27 +CLKID_AHB_SPI0 28 +CLKID_AHB_SPI1 29 +CLKID_AHB_QEI 30 +CLKID_AHB_QUADSPI0 31 +CLKID_AHB_CAMIF 32 +CLKID_AHB_LCDIF 33 +CLKID_AHB_TIMER0 34 +CLKID_AHB_TIMER1 35 +CLKID_AHB_TIMER2 36 +CLKID_AHB_TIMER3 37 +CLKID_AHB_IRQ 38 +CLKID_AHB_RTC 39 +CLKID_AHB_NAND 40 +CLKID_AHB_ADC0 41 +CLKID_AHB_LED 42 +CLKID_AHB_DAC0 43 +CLKID_AHB_LCD 44 +CLKID_AHB_I2S1 45 +CLKID_AHB_MAC1 46 + +CLKID_SYS_CPU 47 +CLKID_SYS_AHB 48 +CLKID_SYS_I2S0M 49 +CLKID_SYS_I2S0S 50 +CLKID_SYS_I2S1M 51 +CLKID_SYS_I2S1S 52 +CLKID_SYS_UART0 53 +CLKID_SYS_UART1 54 +CLKID_SYS_UART2 55 +CLKID_SYS_UART3 56 +CLKID_SYS_UART4 56 +CLKID_SYS_UART5 57 +CLKID_SYS_UART6 58 +CLKID_SYS_UART7 59 +CLKID_SYS_UART8 60 +CLKID_SYS_UART9 61 +CLKID_SYS_SPI0 62 +CLKID_SYS_SPI1 63 +CLKID_SYS_QUADSPI 64 +CLKID_SYS_SSP0 65 +CLKID_SYS_NAND 66 +CLKID_SYS_TRACE 67 +CLKID_SYS_CAMM 68 +CLKID_SYS_WDT 69 +CLKID_SYS_CLKOUT 70 +CLKID_SYS_MAC 71 +CLKID_SYS_LCD 72 +CLKID_SYS_ADCANA 73 + +Example of clock consumer with _SYS_ and _AHB_ sinks. +uart4: serial at 80010000 { + compatible = "alphascale,asm9260-uart"; + reg = <0x80010000 0x4000>; + clocks = <&acc CLKID_SYS_UART4>, <&acc CLKID_AHB_UART4>; + interrupts = <19>; + status = "disabled"; +}; + +Clock consumer with only one, _AHB_ sink. +timer0: timer at 80088000 { + compatible = "alphascale,asm9260-timer"; + reg = <0x80088000 0x4000>; + clocks = <&acc CLKID_AHB_TIMER0>; + interrupts = <29>; +}; +
Signature · 1 line
1.9.1
PATCH v4 4/10 ARM: add alphascale,acc.txt bindings documentation
Quoted 14 lines · Oleksij Rempel
ACC is for AlphaScale Clock Controller.
Signed-off-by Oleksij Rempel <[email protected]>--- .../devicetree/bindings/clock/alphascale,acc.txt | 113 +++++++++++++++++++++ 1 file changed, 113 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/alphascale,acc.txtDocumentation/devicetree/bindings/clock/alphascale,acc.txt new file +0
-0
Documentation/devicetree/bindings/clock/alphascale,acc.txt line 8
Quoted 8 lines
Documentation/devicetree/bindings/clock/alphascale,acc.txt new file +8
-0@@ -0,0 +1,113 @@ +Alphascale Clock Controller + +The ACC (Alphascale Clock Controller) is responsible of choising proper +clock source, setting deviders and clock gates. + +Required properties for the ACC node: +- compatible: must be "alphascale,asm9260-clock-controller" +- reg: must contain the ACC register base and size
I take it you expect #clock-cells to be 1, and for the cell to be one of the values below. Please point this out explictly here.
Documentation/devicetree/bindings/clock/alphascale,acc.txt line 12
Quoted 4 lines
Documentation/devicetree/bindings/clock/alphascale,acc.txt new file +4
-0+ +ACC allow peripheral clocks to be gated to save some power. The clock consumer +should specify the desired clock by having the clock ID in it +"clocks" phandle cell. It is encouraged to use dt-binding for clock ID
The ID is in the clock-specifier (a tuple of cells defined by #clock-cells), not the phandle.
Documentation/devicetree/bindings/clock/alphascale,acc.txt line 19
Quoted 7 lines
Documentation/devicetree/bindings/clock/alphascale,acc.txt new file +7
-0+definitions. SoC specific dt-binding should be included to the device tree +descriptor. For example Alphascale ASM9260: +#include <dt-bindings/clock/alphascale,asm9260.h> + +This binding contains two types of clock sinks: _AHB_ sink - a peripheral +gate; _SYS_ sink - an adjustable clock source. Not all clock consumer +have _SYS_ sink. All sink details can be found in the SoC documentation.
These should be described in terms of the clock provider, not the consumer.
Thanks,
Mark.
Quoted 98 lines
Documentation/devicetree/bindings/clock/alphascale,acc.txt new file +94
-0+CLKID_AHB_ROM 0 +CLKID_AHB_RAM 1 +CLKID_AHB_GPIO 2 +CLKID_AHB_MAC 3 +CLKID_AHB_EMI 4 +CLKID_AHB_USB0 5 +CLKID_AHB_USB1 6 +CLKID_AHB_DMA0 7 +CLKID_AHB_DMA1 8 +CLKID_AHB_UART0 9 +CLKID_AHB_UART1 10 +CLKID_AHB_UART2 11 +CLKID_AHB_UART3 12 +CLKID_AHB_UART4 13 +CLKID_AHB_UART5 14 +CLKID_AHB_UART6 15 +CLKID_AHB_UART7 16 +CLKID_AHB_UART8 17 +CLKID_AHB_UART9 18 +CLKID_AHB_I2S0 19 +CLKID_AHB_I2C0 20 +CLKID_AHB_I2C1 21 +CLKID_AHB_SSP0 22 +CLKID_AHB_IOCONFIG 23 +CLKID_AHB_WDT 24 +CLKID_AHB_CAN0 25 +CLKID_AHB_CAN1 26 +CLKID_AHB_MPWM 27 +CLKID_AHB_SPI0 28 +CLKID_AHB_SPI1 29 +CLKID_AHB_QEI 30 +CLKID_AHB_QUADSPI0 31 +CLKID_AHB_CAMIF 32 +CLKID_AHB_LCDIF 33 +CLKID_AHB_TIMER0 34 +CLKID_AHB_TIMER1 35 +CLKID_AHB_TIMER2 36 +CLKID_AHB_TIMER3 37 +CLKID_AHB_IRQ 38 +CLKID_AHB_RTC 39 +CLKID_AHB_NAND 40 +CLKID_AHB_ADC0 41 +CLKID_AHB_LED 42 +CLKID_AHB_DAC0 43 +CLKID_AHB_LCD 44 +CLKID_AHB_I2S1 45 +CLKID_AHB_MAC1 46 + +CLKID_SYS_CPU 47 +CLKID_SYS_AHB 48 +CLKID_SYS_I2S0M 49 +CLKID_SYS_I2S0S 50 +CLKID_SYS_I2S1M 51 +CLKID_SYS_I2S1S 52 +CLKID_SYS_UART0 53 +CLKID_SYS_UART1 54 +CLKID_SYS_UART2 55 +CLKID_SYS_UART3 56 +CLKID_SYS_UART4 56 +CLKID_SYS_UART5 57 +CLKID_SYS_UART6 58 +CLKID_SYS_UART7 59 +CLKID_SYS_UART8 60 +CLKID_SYS_UART9 61 +CLKID_SYS_SPI0 62 +CLKID_SYS_SPI1 63 +CLKID_SYS_QUADSPI 64 +CLKID_SYS_SSP0 65 +CLKID_SYS_NAND 66 +CLKID_SYS_TRACE 67 +CLKID_SYS_CAMM 68 +CLKID_SYS_WDT 69 +CLKID_SYS_CLKOUT 70 +CLKID_SYS_MAC 71 +CLKID_SYS_LCD 72 +CLKID_SYS_ADCANA 73 + +Example of clock consumer with _SYS_ and _AHB_ sinks. +uart4: serial at 80010000 { + compatible = "alphascale,asm9260-uart"; + reg = <0x80010000 0x4000>; + clocks = <&acc CLKID_SYS_UART4>, <&acc CLKID_AHB_UART4>; + interrupts = <19>; + status = "disabled"; +}; + +Clock consumer with only one, _AHB_ sink. +timer0: timer at 80088000 { + compatible = "alphascale,asm9260-timer"; + reg = <0x80088000 0x4000>; + clocks = <&acc CLKID_AHB_TIMER0>; + interrupts = <29>; +}; +Signature · 1 line
1.9.1
PATCH v4 5/10 ARM: clk: add clk-asm9260 driver
In reply to Oleksij RempelProvide CLK support for Alphascale ASM9260 SoC.
--- drivers/clk/Makefile | 1 + drivers/clk/clk-asm9260.c | 351 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 352 insertions(+) create mode 100644 drivers/clk/clk-asm9260.c
drivers/clk/Makefile +1 -0
@@ -43,6 +43,7 @@ obj-$(CONFIG_ARCH_HI3xxx) += hisilicon/ obj-$(CONFIG_ARCH_HIP04) += hisilicon/ obj-$(CONFIG_ARCH_HIX5HD2) += hisilicon/ obj-$(CONFIG_COMMON_CLK_KEYSTONE) += keystone/ +obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o ifeq ($(CONFIG_COMMON_CLK), y) obj-$(CONFIG_ARCH_MMP) += mmp/ endif
drivers/clk/clk-asm9260.c new file +351 -0
351 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH v4 6/10 clocksource: add asm9260_timer driver
In reply to Oleksij RempelIn some cases asm9260 looks similar to iMX2x. One of exceptions is timer controller. So this patch introduces new driver for this special case.
--- drivers/clocksource/Kconfig | 4 + drivers/clocksource/Makefile | 1 + drivers/clocksource/asm9260_timer.c | 234 ++++++++++++++++++++++++++++++++++++ 3 files changed, 239 insertions(+) create mode 100644 drivers/clocksource/asm9260_timer.c
drivers/clocksource/Kconfig +4 -0
@@ -216,4 +216,8 @@ config CLKSRC_VERSATILE ARM Versatile, RealView and Versatile Express reference platforms. +config ASM9260_TIMER + select CLKSRC_MMIO + bool + endmenu
drivers/clocksource/Makefile +1 -0
@@ -44,3 +44,4 @@ obj-$(CONFIG_CLKSRC_METAG_GENERIC) += metag_generic.o obj-$(CONFIG_ARCH_HAS_TICK_BROADCAST) += dummy_timer.o obj-$(CONFIG_ARCH_KEYSTONE) += timer-keystone.o obj-$(CONFIG_CLKSRC_VERSATILE) += versatile.o +obj-$(CONFIG_ASM9260_TIMER) += asm9260_timer.o
drivers/clocksource/asm9260_timer.c new file +234 -0
234 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH v4 7/10 tty/serial/mxs-auart.c: add initial Alphascale ASM9260 support
In reply to Oleksij RempelAlphascale ASM9260 uart IP has some common registers with Freescale STMP37XX. This patch provide initial changes which allow to reuse mxs-auart.c code for ASM9260.
--- drivers/tty/serial/Kconfig | 5 +- drivers/tty/serial/alphascale,asm9260_serial.h | 373 +++++++++++++++++++++++++ drivers/tty/serial/mxs-auart.c | 344 +++++++++++++++-------- 3 files changed, 599 insertions(+), 123 deletions(-) create mode 100644 drivers/tty/serial/alphascale,asm9260_serial.h
drivers/tty/serial/Kconfig +3 -2
@@ -1385,11 +1385,12 @@ config SERIAL_MSM_SMD ports via tty device interface for MSM chipset. config SERIAL_MXS_AUART - depends on ARCH_MXS + depends on ARCH_MXS || MACH_ASM9260 tristate "MXS AUART support" select SERIAL_CORE help - This driver supports the MXS Application UART (AUART) port. + This driver supports the MXS and Alphascale ASM9260 Application + UART (AUART) port. config SERIAL_MXS_AUART_CONSOLE bool "MXS AUART console support"
drivers/tty/serial/alphascale,asm9260_serial.h new file +373 -0
373 lines not on this page · raw message
drivers/tty/serial/mxs-auart.c +223 -121
764 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH v4 8/10 add Alphascale to vendor-prefixes.txt
In reply to Oleksij Rempelthis company already provided some products, so it make sense to add them to vendor-prefixes.txt list
--- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/vendor-prefixes.txt +1 -0
@@ -11,6 +11,7 @@ adi Analog Devices, Inc. aeroflexgaisler Aeroflex Gaisler AB ak Asahi Kasei Corp. allwinner Allwinner Technology Co., Ltd. +alphascale AlphaScale Integrated Circuits Systems, Inc. altr Altera Corp. amcc Applied Micro Circuits Corporation (APM, formally AMCC) amd Advanced Micro Devices (AMD), Inc.
Signature · 1 line
1.9.1
PATCH v4 8/10 add Alphascale to vendor-prefixes.txt
Quoted 4 lines · Oleksij Rempel
this company already provided some products, so it make sense to add them to vendor-prefixes.txt list
Signed-off-by Oleksij Rempel <[email protected]>
Quoted 24 lines
--- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+)Documentation/devicetree/bindings/vendor-prefixes.txt +1
-1@@ -11,6 +11,7 @@ adi Analog Devices, Inc. aeroflexgaisler Aeroflex Gaisler AB ak Asahi Kasei Corp. allwinner Allwinner Technology Co., Ltd. +alphascale AlphaScale Integrated Circuits Systems, Inc. altr Altera Corp. amcc Applied Micro Circuits Corporation (APM, formally AMCC) amd Advanced Micro Devices (AMD), Inc. --1.9.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH v4 8/10 add Alphascale to vendor-prefixes.txt
Do it make sense to push this patch separately? Right now it looks like this patch set will be pingponged some more times :/
Am 13.10.2014 um 01:19 schrieb Rob Herring:
Quoted 32 lines · Oleksij Rempel
Quoted 4 lines
this company already provided some products, so it make sense to add them to vendor-prefixes.txt list
Signed-off-by Oleksij Rempel <[email protected]>Acked-by Rob Herring <[email protected]>Quoted 24 lines
--- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+)Documentation/devicetree/bindings/vendor-prefixes.txt +1
-1@@ -11,6 +11,7 @@ adi Analog Devices, Inc. aeroflexgaisler Aeroflex Gaisler AB ak Asahi Kasei Corp. allwinner Allwinner Technology Co., Ltd. +alphascale AlphaScale Integrated Circuits Systems, Inc. altr Altera Corp. amcc Applied Micro Circuits Corporation (APM, formally AMCC) amd Advanced Micro Devices (AMD), Inc. --1.9.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Signature · 10 lines
Regards, Oleksij -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 213 bytes Desc: OpenPGP digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20141013/3fc3d183/attachment.sig>
PATCH v4 9/10 irqchip: mxs: prepare driver for HW with different offsets
In reply to Oleksij RempelSome HW has similar functionality but different register offsets. Make sure we can change offsets dynamically.
--- drivers/irqchip/irq-mxs.c | 55 ++++++++++++++++++++++++++++++++++++----------- 1 file changed, 42 insertions(+), 13 deletions(-)
drivers/irqchip/irq-mxs.c +42 -13
@@ -29,18 +29,39 @@#include "irqchip.h" +/* +* this device provide 4 offsets for each register: +* 0x0 - plain read write mode +* 0x4 - set mode, OR logic. +* 0x8 - clr mode, XOR logic. +* 0xc - togle mode. +*/ +#define SET_REG 4 +#define CLR_REG 8 +#define HW_ICOLL_VECTOR 0x0000#define HW_ICOLL_LEVELACK 0x0010#define HW_ICOLL_CTRL 0x0020#define HW_ICOLL_STAT_OFFSET 0x0070 -#define HW_ICOLL_INTERRUPTn_SET (n) (0x0124 + (n) * 0x10) -#define HW_ICOLL_INTERRUPTn_CLR (n) (0x0128 + (n) * 0x10) -#define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004 +#define HW_ICOLL_INTERRUPT0 0x0120 +#define HW_ICOLL_INTERRUPTn (n) ((n) * 0x10) +#define BM_ICOLL_INTR_ENABLE BIT(2)#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1#define ICOLL_NUM_IRQS 128 -static void __iomem *icoll_base; +struct icoll_priv { +void __iomem *vector; +void __iomem *levelack; +void __iomem *ctrl; +void __iomem *stat; +void __iomem *intr; +/* number of interrupts per register */ +int intr_per_reg; +void __iomem *clear; +}; + +static struct icoll_priv icoll_priv;static struct irq_domain *icoll_domain;static void icoll_ack_irq (struct irq_data *d)
@@ -51,19 +72,19 @@ static void icoll_ack_irq(struct irq_data *d)* BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 unconditionally. */ __raw_writel (BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 , - icoll_base +HW_ICOLL_LEVELACK ); + icoll_priv.levelack); }static void icoll_mask_irq (struct irq_data *d) { -__raw_writel (BM_ICOLL_INTERRUPTn_ENABLE, - icoll_base +HW_ICOLL_INTERRUPTn_CLR (d->hwirq)); +__raw_writel (BM_ICOLL_INTR_ENABLE , + icoll_priv.intr +CLR_REG +HW_ICOLL_INTERRUPTn (d->hwirq)); }static void icoll_unmask_irq (struct irq_data *d) { -__raw_writel (BM_ICOLL_INTERRUPTn_ENABLE, - icoll_base +HW_ICOLL_INTERRUPTn_SET (d->hwirq)); +__raw_writel (BM_ICOLL_INTR_ENABLE , + icoll_priv.intr +SET_REG +HW_ICOLL_INTERRUPTn (d->hwirq)); }static struct irq_chip mxs_icoll_chip = {
@@ -76,8 +97,8 @@ asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs) {u32 irqnr; - irqnr =__raw_readl (icoll_base +HW_ICOLL_STAT_OFFSET ); -__raw_writel (irqnr, icoll_base +HW_ICOLL_VECTOR ); + irqnr =__raw_readl (icoll_priv.stat); +__raw_writel (irqnr, icoll_priv.vector);handle_domain_irq (icoll_domain, irqnr, regs); }
@@ -98,14 +119,22 @@ static struct irq_domain_ops icoll_irq_domain_ops = {static int __init icoll_of_init (struct device_node *np,struct device_node *interrupt_parent) { - icoll_base =of_iomap (np,0 ); +void __iomem *icoll_base =of_iomap (np,0 );WARN_ON (!icoll_base); + icoll_priv.vector = icoll_base +HW_ICOLL_VECTOR ; + icoll_priv.levelack = icoll_base +HW_ICOLL_LEVELACK ; + icoll_priv.ctrl = icoll_base +HW_ICOLL_CTRL ; + icoll_priv.stat = icoll_base +HW_ICOLL_STAT_OFFSET ; + icoll_priv.intr = icoll_base +HW_ICOLL_INTERRUPT0 ; + icoll_priv.intr_per_reg =1 ; + icoll_priv.clear =NULL ; +/* * Interrupt Collector reset, which initializes the priority * for each irq to level 0. */ -stmp_reset_block (icoll_base +HW_ICOLL_CTRL ); +stmp_reset_block (icoll_priv.ctrl); icoll_domain =irq_domain_add_linear (np,ICOLL_NUM_IRQS , &icoll_irq_domain_ops,NULL );
Signature · 1 line
1.9.1
PATCH v4 10/10 irqchip: mxs: add Alpascale ASM9260 support
In reply to Oleksij RempelFreescale iMX23/iMX28 and Alphascale ASM9260 have similar interrupt collectors. It makes easy to reuse irq-mxs code for ASM9260. Differences between this devices are fallowing:
- different register offsets
- different count of intterupt lines per register
- ASM9260 don't provide reset bit
- ASM9260 don't support FIQ.
--- drivers/irqchip/Kconfig | 5 ++ drivers/irqchip/Makefile | 2 +- drivers/irqchip/alphascale_asm9260-icoll.h | 109 ++++++++++++++++++++++++++++ drivers/irqchip/irq-mxs.c | 112 ++++++++++++++++++++++++++--- 4 files changed, 219 insertions(+), 9 deletions(-) create mode 100644 drivers/irqchip/alphascale_asm9260-icoll.h
drivers/irqchip/Kconfig +5 -0
@@ -113,3 +113,8 @@ config IRQ_CROSSBAR The primary irqchip invokes the crossbar's callback which inturn allocates a free irq and configures the IP. Thus the peripheral interrupts are routed to one of the free irqchip interrupt lines. + +config IRQ_MXS + bool + select IRQ_DOMAIN + select STMP_DEVICE
drivers/irqchip/Makefile +1 -1
@@ -4,7 +4,7 @@ obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o obj-$(CONFIG_ARCH_MMP) += irq-mmp.o obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o -obj-$(CONFIG_ARCH_MXS) += irq-mxs.o +obj-$(CONFIG_IRQ_MXS) += irq-mxs.o obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o obj-$(CONFIG_METAG) += irq-metag-ext.o
drivers/irqchip/alphascale_asm9260-icoll.h new file +109 -0
109 lines not on this page · raw message
drivers/irqchip/irq-mxs.c +104 -8
155 lines not on this page · raw message
Signature · 1 line
1.9.1