mx6sabresd: Add Seiko WVGA panel support

PATCH New Fabio Estevam 3 participants 8 messages Oct 21, 2014 – Oct 30, 2014

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Fabio Estevam

author

2014-10-21 23:14 UTC #0 lore raw

PATCH 1/1 mx6sabresd: Add Seiko WVGA panel support

From: Fabio Estevam <[email protected]>

Add support for the 4.3'' Seiko WVGA parallel display.

In order to direct the splash screen to the Seiko display:

=> setenv panel SEIKO-WVGA
=> save
=> reset

Signed-off-by Fabio Estevam <[email protected]>

---
 board/freescale/mx6sabresd/mx6sabresd.c | 61 +++++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

board/freescale/mx6sabresd/mx6sabresd.c +61 -0

index 81dcd6e..3d81fff 100644
@@ -51,6 +51,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
 
+#define DISP0_PWR_EN	IMX_GPIO_NR(1, 21)
+
 int dram_init(void)
 {
 	gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);

@@ -141,6 +143,45 @@ iomux_v3_cfg_t const ecspi1_pads[] = {
 	MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
+static iomux_v3_cfg_t const rgb_pads[] = {
+	MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DI0_PIN4__IPU1_DI0_PIN04 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+static void enable_rgb(struct display_info_t const *dev)
+{
+	imx_iomux_v3_setup_multiple_pads(rgb_pads, ARRAY_SIZE(rgb_pads));
+	gpio_direction_output(DISP0_PWR_EN, 1);
+}
+
 static struct i2c_pads_info i2c_pad_info1 = {
 	.scl = {
 		.i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,

@@ -357,6 +398,26 @@ struct display_info_t const displays[] = {{
 		.vsync_len      = 10,
 		.sync           = FB_SYNC_EXT,
 		.vmode          = FB_VMODE_NONINTERLACED
+} }, {
+	.bus	= 0,
+	.addr	= 0,
+	.pixfmt	= IPU_PIX_FMT_RGB24,
+	.detect	= NULL,
+	.enable	= enable_rgb,
+	.mode	= {
+		.name           = "SEIKO-WVGA",
+		.refresh        = 60,
+		.xres           = 800,
+		.yres           = 480,
+		.pixclock       = 29850,
+		.left_margin    = 89,
+		.right_margin   = 164,
+		.upper_margin   = 23,
+		.lower_margin   = 10,
+		.hsync_len      = 10,
+		.vsync_len      = 10,
+		.sync           = 0,
+		.vmode          = FB_VMODE_NONINTERLACED
 } } };
 size_t display_count = ARRAY_SIZE(displays);

Signature · 1 line

1.9.1

Stefano Babic

2014-10-22 08:37 UTC #1 lore raw

PATCH 1/1 mx6sabresd: Add Seiko WVGA panel support

Quoted 92 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Add support for the 4.3'' Seiko WVGA parallel display.

In order to direct the splash screen to the Seiko display:

=> setenv panel SEIKO-WVGA
=> save
=> reset

Signed-off-by Fabio Estevam <[email protected]>

---
 board/freescale/mx6sabresd/mx6sabresd.c | 61 +++++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

board/freescale/mx6sabresd/mx6sabresd.c +54 -0

index 81dcd6e..3d81fff 100644
@@ -51,6 +51,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
 
+#define DISP0_PWR_EN	IMX_GPIO_NR(1, 21)
+
 int dram_init(void)
 {
 	gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);

@@ -141,6 +143,45 @@ iomux_v3_cfg_t const ecspi1_pads[] = {
 	MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
+static iomux_v3_cfg_t const rgb_pads[] = {
+	MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DI0_PIN4__IPU1_DI0_PIN04 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+static void enable_rgb(struct display_info_t const *dev)
+{
+	imx_iomux_v3_setup_multiple_pads(rgb_pads, ARRAY_SIZE(rgb_pads));
+	gpio_direction_output(DISP0_PWR_EN, 1);
+}
+
 static struct i2c_pads_info i2c_pad_info1 = {
 	.scl = {
 		.i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,

@@ -357,6 +398,26 @@ struct display_info_t const displays[] = {{
 		.vsync_len      = 10,
 		.sync           = FB_SYNC_EXT,
 		.vmode          = FB_VMODE_NONINTERLACED
+} }, {
+	.bus	= 0,
+	.addr	= 0,
+	.pixfmt	= IPU_PIX_FMT_RGB24,
+	.detect	= NULL,
+	.enable	= enable_rgb,
+	.mode	= {
+		.name           = "SEIKO-WVGA",
+		.refresh        = 60,
+		.xres           = 800,
+		.yres           = 480,
+		.pixclock       = 29850,
+		.left_margin    = 89,

board/freescale/mx6sabresd/mx6sabresd.c struct display_info_t const displays[] = {{ · line 423

Quoted 10 lines

board/freescale/mx6sabresd/mx6sabresd.c +7 -0

+		.right_margin   = 164,
+		.upper_margin   = 23,
+		.lower_margin   = 10,
+		.hsync_len      = 10,
+		.vsync_len      = 10,
+		.sync           = 0,
+		.vmode          = FB_VMODE_NONINTERLACED
 } } };
 size_t display_count = ARRAY_SIZE(displays);

Acked-by Stefano Babic <[email protected]>

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Jeroen Hofstee

2014-10-22 08:47 UTC #2 lore raw

PATCH 1/1 mx6sabresd: Add Seiko WVGA panel support

In reply to Fabio Estevam

Hello Fabio,

Quoted 12 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>
Add support for the 4.3'' Seiko WVGA parallel display.
In order to direct the splash screen to the Seiko display:
=> setenv panel SEIKO-WVGA
=> save
=> reset
Signed-off-by Fabio Estevam <[email protected]>
---

[snip]

Quoted 13 lines

board/freescale/mx6sabresd/mx6sabresd.c +12 -0

+} }, {
+	.bus	= 0,
+	.addr	= 0,
+	.pixfmt	= IPU_PIX_FMT_RGB24,
+	.detect	= NULL,
+	.enable	= enable_rgb,
+	.mode	= {
+		.name           = "SEIKO-WVGA",
+		.refresh        = 60,
+		.xres           = 800,
+		.yres           = 480,
+		.pixclock       = 29850,

board/freescale/mx6sabresd/mx6sabresd.c struct display_info_t const displays[] = {{ · line 422

Quoted 10 lines

board/freescale/mx6sabresd/mx6sabresd.c +8 -0

+		.left_margin    = 89,
+		.right_margin   = 164,
+		.upper_margin   = 23,
+		.lower_margin   = 10,
+		.hsync_len      = 10,
+		.vsync_len      = 10,
+		.sync           = 0,
+		.vmode          = FB_VMODE_NONINTERLACED
  } } };
  size_t display_count = ARRAY_SIZE(displays);

If [1] is a datasheet for this lcd, you likely want to add

#include <../drivers/video/mxcfb.h>
.sync = FB_SYNC_CLK_LAT_FALL,

Or something similar, since the data is sampled on the falling edge of the pixel clock / the pixel clock is inverted.

Regards,
Jeroen

[1] http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf

Fabio Estevam

author

2014-10-22 12:15 UTC #3 lore raw

PATCH 1/1 mx6sabresd: Add Seiko WVGA panel support

Hi Jeroen,

Quoted 7 lines · Jeroen Hofstee

If [1] is a datasheet for this lcd, you likely want to add
#include <../drivers/video/mxcfb.h>
.sync = FB_SYNC_CLK_LAT_FALL,
Or something similar, since the data is sampled on the falling edge of the pixel clock / the pixel clock is inverted.

We don't need this special FB_SYNC_CLK_LAT_FALL anymore. Please see this thread:
http://driverdev.linuxdriverproject.org/pipermail/driverdev-devel/2013-October/042747.html

Jeroen Hofstee

2014-10-22 13:07 UTC #4 lore raw

PATCH 1/1 mx6sabresd: Add Seiko WVGA panel support

Hello Fabio,

Quoted 6 lines · Fabio Estevam

Hi Jeroen,
Quoted 2 lines · Jeroen Hofstee
If [1] is a datasheet for this lcd, you likely want to add

Quoted 7 lines

Quoted 5 lines
#include <../drivers/video/mxcfb.h>
.sync = FB_SYNC_CLK_LAT_FALL,
Or something similar, since the data is sampled on the falling edge of the pixel clock / the pixel clock is inverted.
We don't need this special FB_SYNC_CLK_LAT_FALL anymore. Please see this thread:
http://driverdev.linuxdriverproject.org/pipermail/driverdev-devel/2013-October/042747.html

Did you check this with a scope? I am quite sure I needed to do this for u-boot v2014.10 still, but I don't have the board available now to double check.

Regards,
Jeroen

Fabio Estevam

author

2014-10-22 13:10 UTC #5 lore raw

PATCH 1/1 mx6sabresd: Add Seiko WVGA panel support

Quoted 3 lines · Jeroen Hofstee

Did you check this with a scope? I am quite sure I needed to do this for u-boot v2014.10 still, but I don't have the board available now to double check.

I didn't check it with the scope. If I add FB_SYNC_CLK_LAT_FALL then I get a completely bad image in the display.

Regards,

Fabio Estevam

Jeroen Hofstee

2014-10-22 13:13 UTC #6 lore raw

PATCH 1/1 mx6sabresd: Add Seiko WVGA panel support

Quoted 11 lines · Fabio Estevam

Quoted 3 lines · Jeroen Hofstee
Did you check this with a scope? I am quite sure I needed to do this for u-boot v2014.10 still, but I don't have the board available now to double check.
I didn't check it with the scope. If I add FB_SYNC_CLK_LAT_FALL then I get a completely bad image in the display.
Regards,
Fabio Estevam

ok, thanks. If I will have a better look why I needed to set this once I have a chance.

Regards,
Jeroen

Stefano Babic

2014-10-30 09:12 UTC #7 lore raw

PATCH 1/1 mx6sabresd: Add Seiko WVGA panel support

In reply to Fabio Estevam

Hi Fabio,

I understand that the issue with the clock inversion is solved.

Quoted 4 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>
Add support for the 4.3'' Seiko WVGA parallel display.

Quoted 8 lines

In order to direct the splash screen to the Seiko display:
=> setenv panel SEIKO-WVGA
=> save
=> reset
Signed-off-by Fabio Estevam <[email protected]>
---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================