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ARM: dts: hip04: NAND controller support

PATCH New Zhou Wang 2 participants 4 messages Oct 23, 2014 – Oct 24, 2014 Device tree bindings

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Zhou Wang

author
#0 lore raw

PATCH 1/1 ARM: dts: hip04: NAND controller support

This patch adds dts support of NAND flash controller for Hisilicon Soc Hip04. The patch is based on v3.18-rc1. I have tested that NAND flash controller works fine in Hip04 D01 board.

---
 arch/arm/boot/dts/hip04.dtsi |   30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
arch/arm/boot/dts/hip04.dtsi +30 -0
index 93b6c90..642a160 100644
@@ -263,5 +263,35 @@
 			interrupts = <0 372 4>;
 		};
 
+		nand: nand at 4020000 {
+			compatible = "hisilicon,504-nfc";
+			reg = <0x4020000 0x10000>, <0x5000000 0x1000>;
+			interrupts = <0 379 4>;
+			nand-bus-width = <8>;
+			nand-ecc-mode = "none";
+			hisi,nand-ecc-bits = <0>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "nand_text";
+				reg = <0x00000000 0x00400000>;
+			};
+
+			partition at 00400000 {
+				label = "nand_monitor";
+				reg = <0x00400000 0x00400000>;
+			};
+
+			partition at 00800000 {
+				label = "nand_kernel";
+				reg = <0x00800000 0x00800000>;
+			};
+
+			partition at 01000000 {
+				label = "nand_fs";
+				reg = <0x01000000 0x1f000000>;
+			};
+		};
 	};
 };
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH 1/1 ARM: dts: hip04: NAND controller support

Quoted 36 lines · Zhou Wang

This patch adds dts support of NAND flash controller for Hisilicon Soc Hip04. The patch is based on v3.18-rc1. I have tested that NAND flash controller works fine in Hip04 D01 board.

---
 arch/arm/boot/dts/hip04.dtsi |   30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
arch/arm/boot/dts/hip04.dtsi +19 -0
index 93b6c90..642a160 100644
@@ -263,5 +263,35 @@
                        interrupts = <0 372 4>;
                };
 
+               nand: nand at 4020000 {
+                       compatible = "hisilicon,504-nfc";
+                       reg = <0x4020000 0x10000>, <0x5000000 0x1000>;
+                       interrupts = <0 379 4>;
+                       nand-bus-width = <8>;
+                       nand-ecc-mode = "none";
+                       hisi,nand-ecc-bits = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition at 0 {
+                               label = "nand_text";
+                               reg = <0x00000000 0x00400000>;
+                       };
+
+                       partition at 00400000 {
+                               label = "nand_monitor";
+                               reg = <0x00400000 0x00400000>;
+                       };

arch/arm/boot/dts/hip04.dtsi line 294

Quoted 10 lines
arch/arm/boot/dts/hip04.dtsi +10 -0
+
+                       partition at 00800000 {
+                               label = "nand_kernel";
+                               reg = <0x00800000 0x00800000>;
+                       };
+
+                       partition at 01000000 {
+                               label = "nand_fs";
+                               reg = <0x01000000 0x1f000000>;
+                       };

Partitions are different on different boards. But nand controller is same on each chip. You
should define nand controller in soc dtsi file, and define partition in board dts file.

Regards
Haojian

author
#2 lore raw

PATCH 1/1 ARM: dts: hip04: NAND controller support

Quoted 44 lines · Haojian Zhuang
Quoted 43 lines · Zhou Wang

This patch adds dts support of NAND flash controller for Hisilicon Soc Hip04. The patch is based on v3.18-rc1. I have tested that NAND flash controller works fine in Hip04 D01 board.

---
  arch/arm/boot/dts/hip04.dtsi |   30 ++++++++++++++++++++++++++++++
  1 file changed, 30 insertions(+)
arch/arm/boot/dts/hip04.dtsi +26 -0
index 93b6c90..642a160 100644
@@ -263,5 +263,35 @@
                         interrupts = <0 372 4>;
                 };
 
+               nand: nand at 4020000 {
+                       compatible = "hisilicon,504-nfc";
+                       reg = <0x4020000 0x10000>, <0x5000000 0x1000>;
+                       interrupts = <0 379 4>;
+                       nand-bus-width = <8>;
+                       nand-ecc-mode = "none";
+                       hisi,nand-ecc-bits = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition at 0 {
+                               label = "nand_text";
+                               reg = <0x00000000 0x00400000>;
+                       };
+
+                       partition at 00400000 {
+                               label = "nand_monitor";
+                               reg = <0x00400000 0x00400000>;
+                       };
+
+                       partition at 00800000 {
+                               label = "nand_kernel";
+                               reg = <0x00800000 0x00800000>;
+                       };
+
+                       partition at 01000000 {
Quoted 8 lines

arch/arm/boot/dts/hip04.dtsi line 294

Quoted 3 lines
arch/arm/boot/dts/hip04.dtsi +3 -0
+                               label = "nand_fs";
+                               reg = <0x01000000 0x1f000000>;
+                       };

Partitions are different on different boards. But nand controller is same on each chip. You
should define nand controller in soc dtsi file, and define partition in board dts file.

My mistake, I will move the partition information to dts file. Thanks a lot, Haojian.

Kind Regards
Zhou Wang

Quoted 4 lines

Regards
Haojian

author
#3 lore raw

PATCH 1/1 ARM: dts: hip04: NAND controller support

In reply to Haojian Zhuang
Quoted 44 lines · Haojian Zhuang
Quoted 43 lines · Zhou Wang

This patch adds dts support of NAND flash controller for Hisilicon Soc Hip04. The patch is based on v3.18-rc1. I have tested that NAND flash controller works fine in Hip04 D01 board.

---
  arch/arm/boot/dts/hip04.dtsi |   30 ++++++++++++++++++++++++++++++
  1 file changed, 30 insertions(+)
arch/arm/boot/dts/hip04.dtsi +26 -0
index 93b6c90..642a160 100644
@@ -263,5 +263,35 @@
                         interrupts = <0 372 4>;
                 };
 
+               nand: nand at 4020000 {
+                       compatible = "hisilicon,504-nfc";
+                       reg = <0x4020000 0x10000>, <0x5000000 0x1000>;
+                       interrupts = <0 379 4>;
+                       nand-bus-width = <8>;
+                       nand-ecc-mode = "none";
+                       hisi,nand-ecc-bits = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition at 0 {
+                               label = "nand_text";
+                               reg = <0x00000000 0x00400000>;
+                       };
+
+                       partition at 00400000 {
+                               label = "nand_monitor";
+                               reg = <0x00400000 0x00400000>;
+                       };
+
+                       partition at 00800000 {
+                               label = "nand_kernel";
+                               reg = <0x00800000 0x00800000>;
+                       };
+
+                       partition at 01000000 {
Quoted 9 lines

arch/arm/boot/dts/hip04.dtsi line 294

Quoted 3 lines
arch/arm/boot/dts/hip04.dtsi +3 -0
+                               label = "nand_fs";
+                               reg = <0x01000000 0x1f000000>;
+                       };

Partitions are different on different boards. But nand controller is same on each chip. You
should define nand controller in soc dtsi file, and define partition in board dts file.

My mistake. I will move the partition information to board dts file. Thanks a lot, Haojian.

Kind Regards
Zhou Wang

Quoted 3 lines

Regards
Haojian