bcm2835: add VideoCore Mailbox to the device tree
Subsystems (3)
PATCH 1/1 bcm2835: add VideoCore Mailbox to the device tree
Follows the generic Mailbox Controller bindings as documented in Documentation/devicetree/bindings/mailbox/mailbox.txt.
--- arch/arm/boot/dts/bcm2835.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)
arch/arm/boot/dts/bcm2835.dtsi +7 -0
@@ -50,6 +50,13 @@ #interrupt-cells = <2>; }; + mailbox: mailbox at 0x7e00b880 { + compatible = "brcm,bcm2835-mbox"; + reg = <0x7e00b880 0x40>; + interrupts = <0 1>; + #mbox-cells = <1>; + }; + watchdog at 7e100000 { compatible = "brcm,bcm2835-pm-wdt"; reg = <0x7e100000 0x28>;
Signature · 1 line
2.1.0
PATCH 1/1 bcm2835: add VideoCore Mailbox to the device tree
Quoted 18 lines · Lubomir Rintel
Follows the generic Mailbox Controller bindings as documented in
Documentation/devicetree/bindings/mailbox/mailbox.txt.Signed-off-by Lubomir Rintel <[email protected]>Cc Stephen Warren <[email protected]>Cc Lee Jones <[email protected]>Cc devicetree at vger.kernel.orgCc linux-rpi-kernel at lists.infradead.orgCc linux-arm-kernel at lists.infradead.org--- arch/arm/boot/dts/bcm2835.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)arch/arm/boot/dts/bcm2835.dtsi +0
-0
arch/arm/boot/dts/bcm2835.dtsi line 53
Quoted 4 lines
arch/arm/boot/dts/bcm2835.dtsi +1
-0@@ -50,6 +50,13 @@ #interrupt-cells = <2>; }; + mailbox: mailbox at 0x7e00b880 {
Remove the 0x.
arch/arm/boot/dts/bcm2835.dtsi line 56
Quoted 3 lines
arch/arm/boot/dts/bcm2835.dtsi +3
-0+ compatible = "brcm,bcm2835-mbox"; + reg = <0x7e00b880 0x40>; + interrupts = <0 1>;
2 interrupts one cell right? No flags?
Quoted 6 lines
arch/arm/boot/dts/bcm2835.dtsi +3
-0+ #mbox-cells = <1>; + }; + watchdog at 7e100000 { compatible = "brcm,bcm2835-pm-wdt"; reg = <0x7e100000 0x28>;
PATCH 1/1 bcm2835: add VideoCore Mailbox to the device tree
Quoted 27 lines · Lee Jones
Quoted 18 lines · Lubomir Rintel
Follows the generic Mailbox Controller bindings as documented in
Documentation/devicetree/bindings/mailbox/mailbox.txt.Signed-off-by Lubomir Rintel <[email protected]>Cc Stephen Warren <[email protected]>Cc Lee Jones <[email protected]>Cc devicetree at vger.kernel.orgCc linux-rpi-kernel at lists.infradead.orgCc linux-arm-kernel at lists.infradead.org--- arch/arm/boot/dts/bcm2835.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)arch/arm/boot/dts/bcm2835.dtsi +0
-0arch/arm/boot/dts/bcm2835.dtsi line 53
Quoted 4 lines
arch/arm/boot/dts/bcm2835.dtsi +1
-0@@ -50,6 +50,13 @@ #interrupt-cells = <2>; }; + mailbox: mailbox at 0x7e00b880 {Remove the 0x.
Quoted 5 lines
arch/arm/boot/dts/bcm2835.dtsi line 56
Quoted 3 lines
arch/arm/boot/dts/bcm2835.dtsi +3
-0+ compatible = "brcm,bcm2835-mbox"; + reg = <0x7e00b880 0x40>; + interrupts = <0 1>;2 interrupts one cell right? No flags?
The DT binding says 1 IRQ in the list, and the interrupt controller in bcm2835.dtsi has 2 cells per IRQ.
Whether that's all the IRQs the HW has for this HW module, I don't know.
PATCH 1/1 bcm2835: add VideoCore Mailbox to the device tree
Quoted 34 lines · Stephen Warren
Quoted 27 lines · Lee Jones
Quoted 18 lines · Lubomir Rintel
Follows the generic Mailbox Controller bindings as documented in
Documentation/devicetree/bindings/mailbox/mailbox.txt.Signed-off-by Lubomir Rintel <[email protected]>Cc Stephen Warren <[email protected]>Cc Lee Jones <[email protected]>Cc devicetree at vger.kernel.orgCc linux-rpi-kernel at lists.infradead.orgCc linux-arm-kernel at lists.infradead.org--- arch/arm/boot/dts/bcm2835.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)arch/arm/boot/dts/bcm2835.dtsi +0
-0arch/arm/boot/dts/bcm2835.dtsi line 53
Quoted 4 lines
arch/arm/boot/dts/bcm2835.dtsi +1
-0@@ -50,6 +50,13 @@ #interrupt-cells = <2>; }; + mailbox: mailbox at 0x7e00b880 {Remove the 0x.
Quoted 5 lines
arch/arm/boot/dts/bcm2835.dtsi line 56
Quoted 3 lines
arch/arm/boot/dts/bcm2835.dtsi +3
-0+ compatible = "brcm,bcm2835-mbox"; + reg = <0x7e00b880 0x40>; + interrupts = <0 1>;2 interrupts one cell right? No flags?
Quoted 4 lines
The DT binding says 1 IRQ in the list, and the interrupt controller in
bcm2835.dtsihas 2 cells per IRQ.Whether that's all the IRQs the HW has for this HW module, I don't know.
Okay, so guessing <BANK INT> then. Very well, thanks for answering.