arm: pcibios: remove pci_sys_data domain

arch/arm/mach-cns3xxx/pcie.c +8 -0

@@ -323,6 +308,14 @@ static int cns3xxx_pcie_abort_handler(unsigned long addr, unsigned int fsr,
 void __init cns3xxx_pcie_init_late(void)
 {
        int i;
+       void *private_data;
+       struct hw_pci hw_pci = {
+              .nr_controllers = 1,
+              .ops = &cns3xxx_pcie_ops,
+              .setup = cns3xxx_pci_setup,
+              .map_irq = cns3xxx_pcie_map_irq,
+              .private_data = &private_data,
+       };
 
        pcibios_min_io = 0;
        pcibios_min_mem = 0;

arch/arm/mach-cns3xxx/pcie.c void __init cns3xxx_pcie_init_late(void) · line 333

Quoted 8 lines

arch/arm/mach-cns3xxx/pcie.c +2 -1

@@ -335,7 +328,8 @@ void __init cns3xxx_pcie_init_late(void)
                cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i));
                cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
                cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]);
-               pci_common_init(&cns3xxx_pcie[i].hw_pci);
+               private_data = &cns3xxx_pcie[i];
+               pci_common_init(&hw_pci);
        }

This looks weird. hw_pci.private_data is a pointer to a (temporary) pointer to private data?

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

Quoted 23 lines · On Thursday 30 October 2014 11:44:48 Lorenzo Pieralisi wrote:

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Quoted 9 lines

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

Acked-by Arnd Bergmann <[email protected]>

Very nice!

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

---
 arch/arm/Kconfig                   |  3 +++
 arch/arm/include/asm/mach/pci.h    |  3 ---
 arch/arm/include/asm/pci.h         |  7 -------
 arch/arm/kernel/bios32.c           | 26 +++++++++++++++++++++++---
 drivers/pci/host/pci-mvebu.c       | 10 ++--------
 drivers/pci/host/pcie-designware.c |  3 ---
 drivers/pci/host/pcie-rcar.c       |  3 ---
 7 files changed, 28 insertions(+), 27 deletions(-)

arch/arm/Kconfig +3 -0

index 89c4b5c..29544f0 100644
@@ -1292,6 +1292,9 @@ config PCI_DOMAINS
 	bool
 	depends on PCI
 
+config PCI_DOMAINS_GENERIC
+	def_bool PCI_DOMAINS
+
 config PCI_NANOENGINE
 	bool "BSE nanoEngine PCI support"
 	depends on SA1100_NANOENGINE

arch/arm/include/asm/mach/pci.h +0 -3

index 7fc4278..f19f627 100644
@@ -44,9 +44,6 @@ struct hw_pci {
  * Per-controller structure
  */
 struct pci_sys_data {
-#ifdef CONFIG_PCI_DOMAINS
-	int		domain;
-#endif
 	struct list_head node;
 	int		busnr;		/* primary bus number			*/
 	u64		mem_offset;	/* bus->cpu memory mapping offset	*/

arch/arm/include/asm/pci.h +0 -7

index 7e95d85..585dc33 100644
@@ -18,13 +18,6 @@ static inline int pcibios_assign_all_busses(void)
 }
 
 #ifdef CONFIG_PCI_DOMAINS
-static inline int pci_domain_nr(struct pci_bus *bus)
-{
-	struct pci_sys_data *root = bus->sysdata;
-
-	return root->domain;
-}
-
 static inline int pci_proc_domain(struct pci_bus *bus)
 {
 	return pci_domain_nr(bus);

arch/arm/kernel/bios32.c +23 -3

index 17a26c1..d8c2b4e 100644
@@ -11,6 +11,8 @@
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_pci.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>

@@ -468,9 +470,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 		if (!sys)
 			panic("PCI: unable to allocate sys data!");
 
-#ifdef CONFIG_PCI_DOMAINS
-		sys->domain  = hw->domain;
-#endif
 		sys->busnr   = busnr;
 		sys->swizzle = hw->swizzle;
 		sys->map_irq = hw->map_irq;

@@ -511,6 +510,27 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 	}
 }
 
+#ifdef CONFIG_PCI_DOMAINS_GENERIC
+static bool dt_domain_found;
+
+void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent)
+{
+	int domain = of_get_pci_domain_nr(parent->of_node);
+
+	if (domain >= 0) {
+		dt_domain_found = true;
+	} else if (dt_domain_found == true) {
+		dev_err(parent, "Node %s is missing \"linux,pci-domain\" property in DT\n",
+			parent->of_node->full_name);
+		return;
+	} else {
+		domain = pci_get_new_domain_nr();
+	}
+
+	bus->domain_nr = domain;
+}
+#endif
+
 void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
 {
 	struct pci_sys_data *sys;

drivers/pci/host/pci-mvebu.c +2 -8

index b1315e1..2b4c1f2 100644
@@ -722,17 +722,11 @@ static int mvebu_pcie_setup(int nr, struct pci_sys_data *sys)
 {
 	struct mvebu_pcie *pcie = sys_to_pcie(sys);
 	int i;
-	int domain = 0;
 
-#ifdef CONFIG_PCI_DOMAINS
-	domain = sys->domain;
-#endif
-
-	snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x",
-		 domain);
+	snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x", nr);
 	pcie->mem.name = pcie->mem_name;
 
-	snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", domain);
+	snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", nr);
 	pcie->realio.name = pcie->io_name;
 
 	if (request_resource(&iomem_resource, &pcie->mem))

drivers/pci/host/pcie-designware.c +0 -3

index dfed00a..6790b87 100644
@@ -502,9 +502,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
 	dw_pci.private_data = (void **)&pp;
 
 	pci_common_init_dev(pp->dev, &dw_pci);
-#ifdef CONFIG_PCI_DOMAINS
-	dw_pci.domain++;
-#endif
 
 	return 0;
 }

drivers/pci/host/pcie-rcar.c +0 -3

index 61158e0..b6b859e 100644
@@ -404,9 +404,6 @@ static void rcar_pcie_enable(struct rcar_pcie *pcie)
 	rcar_pci.private_data = (void **)&pcie;
 
 	pci_common_init_dev(&pdev->dev, &rcar_pci);
-#ifdef CONFIG_PCI_DOMAINS
-	rcar_pci.domain++;
-#endif
 }
 
 static int phy_wait_for_ack(struct rcar_pcie *pcie)

Quoted 19 lines · Lorenzo Pieralisi

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

Quoted 3 lines

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Nice clean up.

Reviewed-by Yijing Wang <[email protected]>

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

---
 arch/arm/Kconfig                   |  3 +++
 arch/arm/include/asm/mach/pci.h    |  3 ---
 arch/arm/include/asm/pci.h         |  7 -------
 arch/arm/kernel/bios32.c           | 26 +++++++++++++++++++++++---
 drivers/pci/host/pci-mvebu.c       | 10 ++--------
 drivers/pci/host/pcie-designware.c |  3 ---
 drivers/pci/host/pcie-rcar.c       |  3 ---
 7 files changed, 28 insertions(+), 27 deletions(-)

arch/arm/Kconfig +3 -0

index 89c4b5c..29544f0 100644
@@ -1292,6 +1292,9 @@ config PCI_DOMAINS
 	bool
 	depends on PCI
 
+config PCI_DOMAINS_GENERIC
+	def_bool PCI_DOMAINS
+
 config PCI_NANOENGINE
 	bool "BSE nanoEngine PCI support"
 	depends on SA1100_NANOENGINE

arch/arm/include/asm/mach/pci.h +0 -3

index 7fc4278..f19f627 100644
@@ -44,9 +44,6 @@ struct hw_pci {
  * Per-controller structure
  */
 struct pci_sys_data {
-#ifdef CONFIG_PCI_DOMAINS
-	int		domain;
-#endif
 	struct list_head node;
 	int		busnr;		/* primary bus number			*/
 	u64		mem_offset;	/* bus->cpu memory mapping offset	*/

arch/arm/include/asm/pci.h +0 -7

index 7e95d85..585dc33 100644
@@ -18,13 +18,6 @@ static inline int pcibios_assign_all_busses(void)
 }
 
 #ifdef CONFIG_PCI_DOMAINS
-static inline int pci_domain_nr(struct pci_bus *bus)
-{
-	struct pci_sys_data *root = bus->sysdata;
-
-	return root->domain;
-}
-
 static inline int pci_proc_domain(struct pci_bus *bus)
 {
 	return pci_domain_nr(bus);

arch/arm/kernel/bios32.c +2 -3

index 17a26c1..d8c2b4e 100644
@@ -11,6 +11,8 @@
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_pci.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>

@@ -468,9 +470,6 @@ static void pcibios_init_hw(struct device *parent, struct
 hw_pci *hw,
 		if (!sys)
 			panic("PCI: unable to allocate sys data!");
 
-#ifdef CONFIG_PCI_DOMAINS
-		sys->domain  = hw->domain;
-#endif
 		sys->busnr   = busnr;
 		sys->swizzle = hw->swizzle;

arch/arm/kernel/bios32.c +21 -0

 		sys->map_irq = hw->map_irq;

@@ -511,6 +510,27 @@ static void pcibios_init_hw(struct device *parent, struct
 hw_pci *hw,
 	}
 }
 
+#ifdef CONFIG_PCI_DOMAINS_GENERIC
+static bool dt_domain_found;
+
+void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent)
+{
+	int domain = of_get_pci_domain_nr(parent->of_node);
+
+	if (domain >= 0) {
+		dt_domain_found = true;
+	} else if (dt_domain_found == true) {
+		dev_err(parent, "Node %s is missing \"linux,pci-domain\"
 property in DT\n",
+			parent->of_node->full_name);
+		return;
+	} else {
+		domain = pci_get_new_domain_nr();
+	}
+
+	bus->domain_nr = domain;
+}
+#endif
+
 void pci_common_init_dev(struct device *parent, struct hw_pci *hw)

{

arch/arm/kernel/bios32.c +0 -0

 	struct pci_sys_data *sys;

drivers/pci/host/pci-mvebu.c +2 -8

index b1315e1..2b4c1f2 100644
@@ -722,17 +722,11 @@ static int mvebu_pcie_setup(int nr, struct pci_sys_data
 *sys)
 {
 	struct mvebu_pcie *pcie = sys_to_pcie(sys);
 	int i;
-	int domain = 0;
 
-#ifdef CONFIG_PCI_DOMAINS
-	domain = sys->domain;
-#endif
-
-	snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x",
-		 domain);
+	snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x",
 nr);
 	pcie->mem.name = pcie->mem_name;
 
-	snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x",
 domain);
+	snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", nr);

drivers/pci/host/pci-mvebu.c +0 -0

 	pcie->realio.name = pcie->io_name;
 
 	if (request_resource(&iomem_resource, &pcie->mem))

drivers/pci/host/pcie- renamed from drivers/pci/host/pcie-designware.c +0 -0

designware.c
index dfed00a..6790b87 100644

drivers/pci/host/pcie-designware.c +0 -3

@@ -502,9 +502,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
 	dw_pci.private_data = (void **)&pp;
 
 	pci_common_init_dev(pp->dev, &dw_pci);
-#ifdef CONFIG_PCI_DOMAINS
-	dw_pci.domain++;
-#endif
 
 	return 0;
 }

drivers/pci/host/pcie-rcar.c +0 -4

index 61158e0..b6b859e 100644
@@ -404,9 +404,6 @@ static void rcar_pcie_enable(struct rcar_pcie *pcie)
 	rcar_pci.private_data = (void **)&pcie;
 
 	pci_common_init_dev(&pdev->dev, &rcar_pci);
-#ifdef CONFIG_PCI_DOMAINS
-	rcar_pci.domain++;
-#endif
 }
 
 static int phy_wait_for_ack(struct rcar_pcie *pcie)
--

2.1.2

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Hi Lorenzo,

Quoted 23 lines · Lorenzo

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Quoted 8 lines

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

This patch fixes a current problem with R-Car devices where there is an internal PCI bridge and an external PCIe bridge on the devices. Both drivers work independently but need to be on different domains. Just needed to enable PCI_DOMAINS along with this.
I've done basic testing that the internal PCI and external PCIe work at the same time.

Quoted 35 lines · Phil Edworthy

Hi Lorenzo,

Quoted 23 lines · Lorenzo

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Quoted 8 lines

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

Quoted 3 lines

This patch fixes a current problem with R-Car devices where there is an internal PCI bridge and an external PCIe bridge on the devices. Both drivers work independently but need to be on different domains. Just needed to

enable

Quoted 3 lines

PCI_DOMAINS along with this.
I've done basic testing that the internal PCI and external PCIe work at the same time.

Hi Phil,

Thanks for testing this. Can you give me some more guidance on where you'd like to see this merged? Until your comment about this fixing a current problem on R-Car, I probably would have considered this to be a cleanup and enhancement and hence material for v3.19. But if R-Car is actually broken and this fixes it, maybe this should go in for v3.18 instead.

If it is currently broken, is there a point where it broke? I assume it used to work at one time. If there's a commit that broke it, it would be nice to reference that in the changelog and explain exactly what was broken and how this fixes it.

Hi Bjorn,

Quoted 45 lines · Bjorn

Quoted 35 lines · Phil Edworthy

Hi Lorenzo,

Quoted 23 lines · Lorenzo

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Quoted 8 lines

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

Quoted 3 lines

This patch fixes a current problem with R-Car devices where there is an internal PCI bridge and an external PCIe bridge on the devices. Both drivers work independently but need to be on different domains. Just needed to

enable

Quoted 3 lines

PCI_DOMAINS along with this.
I've done basic testing that the internal PCI and external PCIe work at the same time.

Quoted 8 lines

Hi Phil,

Thanks for testing this. Can you give me some more guidance on where you'd like to see this merged? Until your comment about this fixing a current problem on R-Car, I probably would have considered this to be a cleanup and enhancement and hence material for v3.19. But if R-Car is actually broken and this fixes it, maybe this should go in for v3.18 instead.

I don?t think its urgent as most of our customers use LTSI kernels, e.g. v3.10. Renesas typically provide out-of-tree BSPs with upstream code back ported, along with other patches. Simon Horman (Renesas maintainer, cc'd) generally handles the back ports, so I'll defer to his opinion.

Quoted 4 lines

If it is currently broken, is there a point where it broke? I assume it used to work at one time. If there's a commit that broke it, it would be nice to reference that in the changelog and explain exactly what was broken and how this fixes it.

Both the internal PCI and external PCIe drivers work on their own, but have never worked at the same time. I think it was just unfortunate timing when I added the PCIe driver. At that time, the internal PCI driver didn?t have the relevant DT nodes for the board I was using so I didn't see any conflicts.

Thanks
Phil

Quoted 56 lines · Phil Edworthy

Hi Bjorn,

Quoted 45 lines · Bjorn

Quoted 35 lines · Phil Edworthy

Hi Lorenzo,

Quoted 23 lines · Lorenzo

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Quoted 8 lines

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

Quoted 3 lines

This patch fixes a current problem with R-Car devices where there is an internal PCI bridge and an external PCIe bridge on the devices. Both drivers work independently but need to be on different domains. Just needed to

enable

Quoted 3 lines

PCI_DOMAINS along with this.
I've done basic testing that the internal PCI and external PCIe work at the same time.

Quoted 8 lines

Hi Phil,

Thanks for testing this. Can you give me some more guidance on where you'd like to see this merged? Until your comment about this fixing a current problem on R-Car, I probably would have considered this to be a cleanup and enhancement and hence material for v3.19. But if R-Car is actually broken and this fixes it, maybe this should go in for v3.18 instead.

Quoted 4 lines

I don?t think its urgent as most of our customers use LTSI kernels, e.g. v3.10. Renesas typically provide out-of-tree BSPs with upstream code back ported, along with other patches. Simon Horman (Renesas maintainer, cc'd) generally handles the back ports, so I'll defer to his opinion.

Hi Phil,

from my point of view it would be best if this went into -stable if it is a fix. However, as you point out, from a customer point of view it shouldn't be a big deal as they should get backports via our LTSI kernel regardless of if the patch goes through stable or not.

Quoted 12 lines

Quoted 5 lines

If it is currently broken, is there a point where it broke? I assume it used to work at one time. If there's a commit that broke it, it would be nice to reference that in the changelog and explain exactly what was broken and how this fixes it.

Both the internal PCI and external PCIe drivers work on their own, but have never worked at the same time. I think it was just unfortunate timing when I added the PCIe driver. At that time, the internal PCI driver didn?t have the relevant DT nodes for the board I was using so I didn't see any conflicts.

Thanks
Phil

Hi Lorenzo,

Quoted 23 lines · Lorenzo

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Quoted 8 lines

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

This patch fixes a current problem with R-Car devices where there is an internal PCI bridge and an external PCIe bridge on the devices. Both drivers work independently but need to be on different domains. Just needed to enable PCI_DOMAINS along with this.
I've done basic testing that the internal PCI and external PCIe work at the same time.

Acked-by Phil Edworthy <[email protected]>

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

---
 arch/arm/Kconfig                   |  3 +++
 arch/arm/include/asm/mach/pci.h    |  3 ---
 arch/arm/include/asm/pci.h         |  7 -------
 arch/arm/kernel/bios32.c           | 26 +++++++++++++++++++++++---
 drivers/pci/host/pci-mvebu.c       | 10 ++--------
 drivers/pci/host/pcie-designware.c |  3 ---
 drivers/pci/host/pcie-rcar.c       |  3 ---
 7 files changed, 28 insertions(+), 27 deletions(-)

arch/arm/Kconfig +3 -0

index 89c4b5c..29544f0 100644
@@ -1292,6 +1292,9 @@ config PCI_DOMAINS
 	bool
 	depends on PCI
 
+config PCI_DOMAINS_GENERIC
+	def_bool PCI_DOMAINS
+
 config PCI_NANOENGINE
 	bool "BSE nanoEngine PCI support"
 	depends on SA1100_NANOENGINE

arch/arm/include/asm/mach/pci.h +0 -3

index 7fc4278..f19f627 100644
@@ -44,9 +44,6 @@ struct hw_pci {
  * Per-controller structure
  */
 struct pci_sys_data {
-#ifdef CONFIG_PCI_DOMAINS
-	int		domain;
-#endif
 	struct list_head node;
 	int		busnr;		/* primary bus number			*/
 	u64		mem_offset;	/* bus->cpu memory mapping offset	*/

arch/arm/include/asm/pci.h +0 -7

index 7e95d85..585dc33 100644
@@ -18,13 +18,6 @@ static inline int pcibios_assign_all_busses(void)
 }
 
 #ifdef CONFIG_PCI_DOMAINS
-static inline int pci_domain_nr(struct pci_bus *bus)
-{
-	struct pci_sys_data *root = bus->sysdata;
-
-	return root->domain;
-}
-
 static inline int pci_proc_domain(struct pci_bus *bus)
 {
 	return pci_domain_nr(bus);

arch/arm/kernel/bios32.c +23 -3

index 17a26c1..d8c2b4e 100644
@@ -11,6 +11,8 @@
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_pci.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>

@@ -468,9 +470,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 		if (!sys)
 			panic("PCI: unable to allocate sys data!");
 
-#ifdef CONFIG_PCI_DOMAINS
-		sys->domain  = hw->domain;
-#endif
 		sys->busnr   = busnr;
 		sys->swizzle = hw->swizzle;
 		sys->map_irq = hw->map_irq;

@@ -511,6 +510,27 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 	}
 }
 
+#ifdef CONFIG_PCI_DOMAINS_GENERIC
+static bool dt_domain_found;
+
+void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent)
+{
+	int domain = of_get_pci_domain_nr(parent->of_node);
+
+	if (domain >= 0) {
+		dt_domain_found = true;
+	} else if (dt_domain_found == true) {
+		dev_err(parent, "Node %s is missing \"linux,pci-domain\" property in DT\n",
+			parent->of_node->full_name);
+		return;
+	} else {
+		domain = pci_get_new_domain_nr();
+	}
+
+	bus->domain_nr = domain;
+}
+#endif
+
 void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
 {
 	struct pci_sys_data *sys;

drivers/pci/host/pci-mvebu.c +2 -8

index b1315e1..2b4c1f2 100644
@@ -722,17 +722,11 @@ static int mvebu_pcie_setup(int nr, struct pci_sys_data *sys)
 {
 	struct mvebu_pcie *pcie = sys_to_pcie(sys);
 	int i;
-	int domain = 0;
 
-#ifdef CONFIG_PCI_DOMAINS
-	domain = sys->domain;
-#endif
-
-	snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x",
-		 domain);
+	snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x", nr);
 	pcie->mem.name = pcie->mem_name;
 
-	snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", domain);
+	snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", nr);
 	pcie->realio.name = pcie->io_name;
 
 	if (request_resource(&iomem_resource, &pcie->mem))

drivers/pci/host/pcie-designware.c +0 -3

index dfed00a..6790b87 100644
@@ -502,9 +502,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
 	dw_pci.private_data = (void **)&pp;
 
 	pci_common_init_dev(pp->dev, &dw_pci);
-#ifdef CONFIG_PCI_DOMAINS
-	dw_pci.domain++;
-#endif
 
 	return 0;
 }

drivers/pci/host/pcie-rcar.c +0 -4

index 61158e0..b6b859e 100644
@@ -404,9 +404,6 @@ static void rcar_pcie_enable(struct rcar_pcie *pcie)
 	rcar_pci.private_data = (void **)&pcie;
 
 	pci_common_init_dev(&pdev->dev, &rcar_pci);
-#ifdef CONFIG_PCI_DOMAINS
-	rcar_pci.domain++;
-#endif
 }
 
 static int phy_wait_for_ack(struct rcar_pcie *pcie)
--

2.1.2

-----Original Message-----
From: Jingoo Han [mailto:jg1.han at samsung.com]
Sent: Sunday, November 02, 2014 8:18 PM
To: 'Lorenzo Pieralisi'
Cc: linux-arm-kernel at lists.infradead.org; linux-pci at vger.kernel.org; liviu.dudau at arm.com; 'Arnd Bergmann'; 'Phil Edworthy'; 'Jason Gunthorpe'; 'Bjorn Helgaas'; 'Russell King'; 'Mohit Kumar'; 'Richard Zhu'; 'Lucas Stach'; KISHON VIJAY ABRAHAM; Karicheri, Muralidharan; 'Jingoo Han'
Subject: Re: [RFC PATCH 2/2] arm: pcibios: move to generic PCI domains

Quoted 24 lines · Lorenzo Pieralisi

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Quoted 8 lines

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

(+CC Richard Zhu, Lucas Stach, Kishon Vijay Abraham I, Murali Karicheri)

Acked-by Jingoo Han <[email protected]>

For a long time, I have wanted the patch like this. Personally, I want to increase the build coverage and keep the same binary regardless of config options as possible; thus, I don't like #ifdef guards such as '#ifdef CONFIG_PCI_DOMAINS'. When I submitted the first patch for 'pcie-designware.c', I was not able to find a way to remove '#ifdef CONFIG_PCI_DOMAINS' from 'pcie-designware.c'.

This patch looks good and I think that this patch will not make the problem. However, I didn't test this patch with Exynos platform, due to some reasons. So, I hope that other engineers test this patch on other SoC platforms related to designware PCIe.

To Mohit Kumar (ST SPEAR13XX), Richard Zhu/Lucas Stach (IMX6)
Kishon Vijay Abraham I (TI DRA7XX), Murali Karicheri (TI KEYSTONE)

Would you test this patch and share the result?
It would be very helpful. Thank you.

Best regards,
Jingoo Han

arch/arm/kernel/bios32.c static void pcibios_init_hw(struct device *parent, struct hw_pci

Quoted 68 lines

---
 arch/arm/Kconfig                   |  3 +++
 arch/arm/include/asm/mach/pci.h    |  3 ---
 arch/arm/include/asm/pci.h         |  7 -------
 arch/arm/kernel/bios32.c           | 26 +++++++++++++++++++++++---
 drivers/pci/host/pci-mvebu.c       | 10 ++--------
 drivers/pci/host/pcie-designware.c |  3 ---
 drivers/pci/host/pcie-rcar.c       |  3 ---
 7 files changed, 28 insertions(+), 27 deletions(-)

arch/arm/Kconfig index renamed from arch/arm/Kconfig +0 -0

89c4b5c..29544f0 100644

arch/arm/Kconfig +3 -0

@@ -1292,6 +1292,9 @@ config PCI_DOMAINS
 	bool
 	depends on PCI
 
+config PCI_DOMAINS_GENERIC
+	def_bool PCI_DOMAINS
+
 config PCI_NANOENGINE
 	bool "BSE nanoEngine PCI support"
 	depends on SA1100_NANOENGINE

(quoted diff) +0 -0

b/arch/arm/include/asm/mach/pci.h index 7fc4278..f19f627 100644

arch/arm/include/asm/mach/pci.h +0 -3

@@ -44,9 +44,6 @@ struct hw_pci {
  * Per-controller structure
  */
 struct pci_sys_data {
-#ifdef CONFIG_PCI_DOMAINS
-	int		domain;
-#endif
 	struct list_head node;
 	int		busnr;		/* primary bus number			*/
 	u64		mem_offset;	/* bus->cpu memory mapping offset	*/

arch/arm/include/asm/pci.h +0 -6

index 7e95d85..585dc33 100644
@@ -18,13 +18,6 @@ static inline int pcibios_assign_all_busses(void)
 }
 
 #ifdef CONFIG_PCI_DOMAINS
-static inline int pci_domain_nr(struct pci_bus *bus) -{
-	struct pci_sys_data *root = bus->sysdata;
-
-	return root->domain;
-}
-
 static inline int pci_proc_domain(struct pci_bus *bus)  {
 	return pci_domain_nr(bus);

arch/arm/kernel/bios32.c index renamed from arch/arm/kernel/bios32.c +0 -0

17a26c1..d8c2b4e 100644

arch/arm/kernel/bios32.c +2 -0

@@ -11,6 +11,8 @@
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_pci.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>

@@ -468,9 +470,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci

*hw,

arch/arm/kernel/bios32.c static void pcibios_init_hw(struct device *parent, struct hw_pci

Quoted 10 lines

arch/arm/kernel/bios32.c +0 -3

 		if (!sys)
 			panic("PCI: unable to allocate sys data!");
 
-#ifdef CONFIG_PCI_DOMAINS
-		sys->domain  = hw->domain;
-#endif
 		sys->busnr   = busnr;
 		sys->swizzle = hw->swizzle;
 		sys->map_irq = hw->map_irq;

@@ -511,6 +510,27 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci

*hw,

Quoted 81 lines

arch/arm/kernel/bios32.c +21 -0

 	}
 }
 
+#ifdef CONFIG_PCI_DOMAINS_GENERIC
+static bool dt_domain_found;
+
+void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device
+*parent) {
+	int domain = of_get_pci_domain_nr(parent->of_node);
+
+	if (domain >= 0) {
+		dt_domain_found = true;
+	} else if (dt_domain_found == true) {
+		dev_err(parent, "Node %s is missing \"linux,pci-domain\" property in DT\n",
+			parent->of_node->full_name);
+		return;
+	} else {
+		domain = pci_get_new_domain_nr();
+	}
+
+	bus->domain_nr = domain;
+}
+#endif
+
 void pci_common_init_dev(struct device *parent, struct hw_pci *hw)  {
 	struct pci_sys_data *sys;

(quoted diff) +0 -0

b/drivers/pci/host/pci-mvebu.c index b1315e1..2b4c1f2 100644

drivers/pci/host/pci-mvebu.c +3 -8

@@ -722,17 +722,11 @@ static int mvebu_pcie_setup(int nr, struct
 pci_sys_data *sys)  {
 	struct mvebu_pcie *pcie = sys_to_pcie(sys);
 	int i;
-	int domain = 0;
 
-#ifdef CONFIG_PCI_DOMAINS
-	domain = sys->domain;
-#endif
-
-	snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x",
-		 domain);
+	snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x",
+nr);
 	pcie->mem.name = pcie->mem_name;
 
-	snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", domain);
+	snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", nr);
 	pcie->realio.name = pcie->io_name;
 
 	if (request_resource(&iomem_resource, &pcie->mem)) diff --git

a/drivers/pci/host/pcie-designware.c
b/drivers/pci/host/pcie-designware.c
index dfed00a..6790b87 100644

drivers/pci/host/pcie-designware.c +0 -2

@@ -502,9 +502,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
 	dw_pci.private_data = (void **)&pp;
 
 	pci_common_init_dev(pp->dev, &dw_pci); -#ifdef CONFIG_PCI_DOMAINS
-	dw_pci.domain++;
-#endif
 
 	return 0;
 }

(quoted diff) +0 -0

b/drivers/pci/host/pcie-rcar.c index 61158e0..b6b859e 100644

drivers/pci/host/pcie-rcar.c +0 -0

@@ -404,9 +404,6 @@ static void rcar_pcie_enable(struct rcar_pcie *pcie)
 	rcar_pci.private_data = (void **)&pcie;
 
 	pci_common_init_dev(&pdev->dev, &rcar_pci); -#ifdef

CONFIG_PCI_DOMAINS

drivers/pci/host/pcie-rcar.c +0 -3

-	rcar_pci.domain++;
-#endif
 }
 
 static int phy_wait_for_ack(struct rcar_pcie *pcie)
--

2.1.2

Quoted 24 lines · Lorenzo Pieralisi

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Quoted 8 lines

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

(+CC Richard Zhu, Lucas Stach, Kishon Vijay Abraham I, Murali Karicheri)

Acked-by Jingoo Han <[email protected]>

For a long time, I have wanted the patch like this. Personally, I want to increase the build coverage and keep the same binary regardless of config options as possible; thus, I don't like #ifdef guards such as '#ifdef CONFIG_PCI_DOMAINS'. When I submitted the first patch for 'pcie-designware.c', I was not able to find a way to remove '#ifdef CONFIG_PCI_DOMAINS' from 'pcie-designware.c'.

This patch looks good and I think that this patch will not make the problem. However, I didn't test this patch with Exynos platform, due to some reasons. So, I hope that other engineers test this patch on other SoC platforms related to designware PCIe.

To Mohit Kumar (ST SPEAR13XX), Richard Zhu/Lucas Stach (IMX6)
Kishon Vijay Abraham I (TI DRA7XX), Murali Karicheri (TI KEYSTONE)

Would you test this patch and share the result?
It would be very helpful. Thank you.

Best regards,
Jingoo Han

Quoted 160 lines

---
 arch/arm/Kconfig                   |  3 +++
 arch/arm/include/asm/mach/pci.h    |  3 ---
 arch/arm/include/asm/pci.h         |  7 -------
 arch/arm/kernel/bios32.c           | 26 +++++++++++++++++++++++---
 drivers/pci/host/pci-mvebu.c       | 10 ++--------
 drivers/pci/host/pcie-designware.c |  3 ---
 drivers/pci/host/pcie-rcar.c       |  3 ---
 7 files changed, 28 insertions(+), 27 deletions(-)

arch/arm/Kconfig +3 -0

index 89c4b5c..29544f0 100644
@@ -1292,6 +1292,9 @@ config PCI_DOMAINS
      bool
      depends on PCI
 
+config PCI_DOMAINS_GENERIC
+     def_bool PCI_DOMAINS
+
 config PCI_NANOENGINE
      bool "BSE nanoEngine PCI support"
      depends on SA1100_NANOENGINE

arch/arm/include/asm/mach/pci.h +0 -3

index 7fc4278..f19f627 100644
@@ -44,9 +44,6 @@ struct hw_pci {
  * Per-controller structure
  */
 struct pci_sys_data {
-#ifdef CONFIG_PCI_DOMAINS
-     int             domain;
-#endif
      struct list_head node;
      int             busnr;          /* primary bus number                   */
      u64             mem_offset;     /* bus->cpu memory mapping offset       */

arch/arm/include/asm/pci.h +0 -7

index 7e95d85..585dc33 100644
@@ -18,13 +18,6 @@ static inline int pcibios_assign_all_busses(void)
 }
 
 #ifdef CONFIG_PCI_DOMAINS
-static inline int pci_domain_nr(struct pci_bus *bus)
-{
-     struct pci_sys_data *root = bus->sysdata;
-
-     return root->domain;
-}
-
 static inline int pci_proc_domain(struct pci_bus *bus)
 {
      return pci_domain_nr(bus);

arch/arm/kernel/bios32.c +23 -3

index 17a26c1..d8c2b4e 100644
@@ -11,6 +11,8 @@
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_pci.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>

@@ -468,9 +470,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
              if (!sys)
                      panic("PCI: unable to allocate sys data!");
 
-#ifdef CONFIG_PCI_DOMAINS
-             sys->domain  = hw->domain;
-#endif
              sys->busnr   = busnr;
              sys->swizzle = hw->swizzle;
              sys->map_irq = hw->map_irq;

@@ -511,6 +510,27 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
      }
 }
 
+#ifdef CONFIG_PCI_DOMAINS_GENERIC
+static bool dt_domain_found;
+
+void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent)
+{
+     int domain = of_get_pci_domain_nr(parent->of_node);
+
+     if (domain >= 0) {
+             dt_domain_found = true;
+     } else if (dt_domain_found == true) {
+             dev_err(parent, "Node %s is missing \"linux,pci-domain\" property in DT\n",
+                     parent->of_node->full_name);
+             return;
+     } else {
+             domain = pci_get_new_domain_nr();
+     }
+
+     bus->domain_nr = domain;
+}
+#endif
+
 void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
 {
      struct pci_sys_data *sys;

drivers/pci/host/pci-mvebu.c +2 -8

index b1315e1..2b4c1f2 100644
@@ -722,17 +722,11 @@ static int mvebu_pcie_setup(int nr, struct pci_sys_data *sys)
 {
      struct mvebu_pcie *pcie = sys_to_pcie(sys);
      int i;
-     int domain = 0;
 
-#ifdef CONFIG_PCI_DOMAINS
-     domain = sys->domain;
-#endif
-
-     snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x",
-              domain);
+     snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x", nr);
      pcie->mem.name = pcie->mem_name;
 
-     snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", domain);
+     snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", nr);
      pcie->realio.name = pcie->io_name;
 
      if (request_resource(&iomem_resource, &pcie->mem))

drivers/pci/host/pcie-designware.c +0 -3

index dfed00a..6790b87 100644
@@ -502,9 +502,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
      dw_pci.private_data = (void **)&pp;
 
      pci_common_init_dev(pp->dev, &dw_pci);
-#ifdef CONFIG_PCI_DOMAINS
-     dw_pci.domain++;
-#endif
 
      return 0;
 }

drivers/pci/host/pcie-rcar.c +0 -4

index 61158e0..b6b859e 100644
@@ -404,9 +404,6 @@ static void rcar_pcie_enable(struct rcar_pcie *pcie)
      rcar_pci.private_data = (void **)&pcie;
 
      pci_common_init_dev(&pdev->dev, &rcar_pci);
-#ifdef CONFIG_PCI_DOMAINS
-     rcar_pci.domain++;
-#endif
 }
 
 static int phy_wait_for_ack(struct rcar_pcie *pcie)
--

Quoted 1 line

2.1.2

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Quoted 34 lines · Lorenzo Pieralisi

Quoted 24 lines

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Quoted 8 lines

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

Quoted 3 lines

(+CC Richard Zhu, Lucas Stach, Kishon Vijay Abraham I, Murali Karicheri)

Acked-by Jingoo Han <[email protected]>

Thank you Jingoo.

Quoted 12 lines

For a long time, I have wanted the patch like this. Personally, I want to increase the build coverage and keep the same binary regardless of config options as possible; thus, I don't like #ifdef guards such as '#ifdef CONFIG_PCI_DOMAINS'. When I submitted the first patch for 'pcie-designware.c', I was not able to find a way to remove '#ifdef CONFIG_PCI_DOMAINS' from 'pcie-designware.c'.

This patch looks good and I think that this patch will not make the problem. However, I didn't test this patch with Exynos platform, due to some reasons. So, I hope that other engineers test this patch on other SoC platforms related to designware PCIe.

Quoted 5 lines

To Mohit Kumar (ST SPEAR13XX), Richard Zhu/Lucas Stach (IMX6)
Kishon Vijay Abraham I (TI DRA7XX), Murali Karicheri (TI KEYSTONE)

Would you test this patch and share the result?
It would be very helpful. Thank you.

I am happy to wait for a week or two before asking to add this code to -next, it would be definitely great to get more coverage on pcie-designware.

Am Montag, den 03.11.2014, 11:23 +0000 schrieb Lorenzo Pieralisi:

Quoted 59 lines · Jingoo Han

Quoted 34 lines · Lorenzo Pieralisi

Quoted 24 lines

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Quoted 8 lines

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

Quoted 3 lines

(+CC Richard Zhu, Lucas Stach, Kishon Vijay Abraham I, Murali Karicheri)

Acked-by Jingoo Han <[email protected]>

Thank you Jingoo.

Quoted 17 lines

For a long time, I have wanted the patch like this. Personally, I want to increase the build coverage and keep the same binary regardless of config options as possible; thus, I don't like #ifdef guards such as '#ifdef CONFIG_PCI_DOMAINS'. When I submitted the first patch for 'pcie-designware.c', I was not able to find a way to remove '#ifdef CONFIG_PCI_DOMAINS' from 'pcie-designware.c'.

This patch looks good and I think that this patch will not make the problem. However, I didn't test this patch with Exynos platform, due to some reasons. So, I hope that other engineers test this patch on other SoC platforms related to designware PCIe.

To Mohit Kumar (ST SPEAR13XX), Richard Zhu/Lucas Stach (IMX6)
Kishon Vijay Abraham I (TI DRA7XX), Murali Karicheri (TI KEYSTONE)

Would you test this patch and share the result?
It would be very helpful. Thank you.

Quoted 3 lines

I am happy to wait for a week or two before asking to add this code to -next, it would be definitely great to get more coverage on pcie-designware.

I've just tested this on i.MX6 on top of 3.18-rc3. Given that we only use a single domain there this patch should obviously not break anything. Testing backs this claim, so:

Tested-by Lucas Stach <[email protected]>

I also looked through the patch briefly and it seems sane to me, so this is also:

Acked-by Lucas Stach <[email protected]>

I don't like the fact that a proper binding documentation is missing for the "linux,pci-domain" property, but this isn't the fault of this patchset.

Regards,
Lucas

--

Pengutronix e.K.             | Lucas Stach                 |
Industrial Linux Solutions   | http://www.pengutronix.de/  |

Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits:

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

In order to assign a domain number dynamically, the ARM pcibios defines the function, called by core PCI code:

void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a counter; its usage replaces the current domain assignment code in PCI host controllers present in the kernel.

Cc Arnd Bergmann <[email protected]>

Cc Phil Edworthy <[email protected]>

Cc Jason Gunthorpe <[email protected]>

Cc Jingoo Han <[email protected]>

Cc Bjorn Helgaas <[email protected]>

Cc Russell King <[email protected]>

Cc Mohit Kumar <[email protected]>

Signed-off-by Lorenzo Pieralisi <[email protected]>

---
 arch/arm/Kconfig                   |  3 +++
 arch/arm/include/asm/mach/pci.h    |  3 ---
 arch/arm/include/asm/pci.h         |  7 -------
 arch/arm/kernel/bios32.c           | 26 +++++++++++++++++++++++---
 drivers/pci/host/pci-mvebu.c       | 10 ++--------
 drivers/pci/host/pcie-designware.c |  3 ---
 drivers/pci/host/pcie-rcar.c       |  3 ---
 7 files changed, 28 insertions(+), 27 deletions(-)

arch/arm/Kconfig +3 -0

index 89c4b5c..29544f0 100644
@@ -1292,6 +1292,9 @@ config PCI_DOMAINS
 	bool
 	depends on PCI
 
+config PCI_DOMAINS_GENERIC
+	def_bool PCI_DOMAINS
+
 config PCI_NANOENGINE
 	bool "BSE nanoEngine PCI support"
 	depends on SA1100_NANOENGINE

arch/arm/include/asm/mach/pci.h +0 -0

index 7fc4278..f19f627 100644

arch/arm/include/asm/mach/pci.h +0 -3

 struct pci_sys_data {
-#ifdef CONFIG_PCI_DOMAINS
-	int		domain;
-#endif
 	struct list_head node;
 	int		busnr;		/* primary bus number			*/
 	u64		mem_offset;	/* bus->cpu memory mapping offset	*/

arch/arm/include/asm/pci.h +0 -7

index 7e95d85..585dc33 100644
@@ -18,13 +18,6 @@ static inline int pcibios_assign_all_busses(void)
 }
 
 #ifdef CONFIG_PCI_DOMAINS
-static inline int pci_domain_nr(struct pci_bus *bus)
-{
-	struct pci_sys_data *root = bus->sysdata;
-
-	return root->domain;
-}
-
 static inline int pci_proc_domain(struct pci_bus *bus)
 {
 	return pci_domain_nr(bus);

arch/arm/kernel/bios32.c +23 -3

index 17a26c1..d8c2b4e 100644
@@ -11,6 +11,8 @@
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_pci.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>

@@ -468,9 +470,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 		if (!sys)
 			panic("PCI: unable to allocate sys data!");
 
-#ifdef CONFIG_PCI_DOMAINS
-		sys->domain  = hw->domain;
-#endif
 		sys->busnr   = busnr;
 		sys->swizzle = hw->swizzle;
 		sys->map_irq = hw->map_irq;

@@ -511,6 +510,27 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 	}
 }
 
+#ifdef CONFIG_PCI_DOMAINS_GENERIC
+static bool dt_domain_found;
+
+void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent)
+{
+	int domain = of_get_pci_domain_nr(parent->of_node);
+
+	if (domain >= 0) {
+		dt_domain_found = true;
+	} else if (dt_domain_found == true) {
+		dev_err(parent, "Node %s is missing \"linux,pci-domain\" property in DT\n",
+			parent->of_node->full_name);
+		return;
+	} else {
+		domain = pci_get_new_domain_nr();
+	}
+
+	bus->domain_nr = domain;
+}
+#endif
+
 void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
 {
 	struct pci_sys_data *sys;

drivers/pci/host/pci-mvebu.c +2 -8

index b1315e1..2b4c1f2 100644
@@ -722,17 +722,11 @@ static int mvebu_pcie_setup(int nr, struct pci_sys_data *sys)
 {
 	struct mvebu_pcie *pcie = sys_to_pcie(sys);
 	int i;
-	int domain = 0;
 
-#ifdef CONFIG_PCI_DOMAINS
-	domain = sys->domain;
-#endif
-
-	snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x",
-		 domain);
+	snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x", nr);
 	pcie->mem.name = pcie->mem_name;
 
-	snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", domain);
+	snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", nr);
 	pcie->realio.name = pcie->io_name;
 
 	if (request_resource(&iomem_resource, &pcie->mem))

drivers/pci/host/pcie-designware.c +0 -3

index dfed00a..6790b87 100644
@@ -502,9 +502,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
 	dw_pci.private_data = (void **)&pp;
 
 	pci_common_init_dev(pp->dev, &dw_pci);
-#ifdef CONFIG_PCI_DOMAINS
-	dw_pci.domain++;
-#endif
 
 	return 0;
 }

drivers/pci/host/pcie-rcar.c +0 -3

index 61158e0..b6b859e 100644
@@ -404,9 +404,6 @@ static void rcar_pcie_enable(struct rcar_pcie *pcie)
 	rcar_pci.private_data = (void **)&pcie;
 
 	pci_common_init_dev(&pdev->dev, &rcar_pci);
-#ifdef CONFIG_PCI_DOMAINS
-	rcar_pci.domain++;
-#endif
 }
 
 static int phy_wait_for_ack(struct rcar_pcie *pcie)

On 2014/10/30 19:44, Lorenzo Pieralisi wrote:

arch/arm/include/asm/mach/pci.h struct hw_pci { · line 45

Quoted 7 lines

arch/arm/include/asm/mach/pci.h +0 -0

index 7fc4278..f19f627 100644
@@ -44,9 +44,6 @@ struct hw_pci {
  * Per-controller structure
  */

domain in hw_pci also should be clean up, right ?

struct hw_pci {

#ifdef CONFIG_PCI_DOMAINS
	int		domain;
#endif
	struct pci_ops	*ops;
	int		nr_controllers;
	void		**private_data;

Code in drivers/pci/pci-mvebu.c has been changed to add a domain number to PCI resources by using the nr value coming from the setup pcibios32 callback, which may not be correct and should be considered a temporary solution waiting for review comments.

Quoted 4 lines · Lorenzo Pieralisi

Code in drivers/pci/pci-mvebu.c has been changed to add a domain number to PCI resources by using the nr value coming from the setup pcibios32 callback, which may not be correct and should be considered a temporary solution waiting for review comments.

The intent of the string was to have the domain number so that resources in /proc/iomem can be correlated with lspci.

This would be a 'best practice' - all PCI drivers need to request resource, and the resource should be relatable back to the PCI domain... So it would be best if the domain number was available at this point in a driver's flow.

Review

Quoted 3 lines

(quoted diff) +1 -2

-       snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x",
-                domain);
+       snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x", nr);

I'm not sure what 'nr' is in this context, if it is not the domain number then I'd just drop the 0x04x entirely rather than include some nonsense number...

Quoted 7 lines · Jason Gunthorpe

Quoted 4 lines · Lorenzo Pieralisi

Code in drivers/pci/pci-mvebu.c has been changed to add a domain number to PCI resources by using the nr value coming from the setup pcibios32 callback, which may not be correct and should be considered a temporary solution waiting for review comments.

Quoted 7 lines

The intent of the string was to have the domain number so that resources in /proc/iomem can be correlated with lspci.

This would be a 'best practice' - all PCI drivers need to request resource, and the resource should be relatable back to the PCI domain... So it would be best if the domain number was available at this point in a driver's flow.

It is not available with the new approach and the generic PCI domains since the set-up hook is called before creating the pci_bus. That's why I mentioned that in the cover letter, and that's good it caught your attention.

On a side note, when the resources are parsed from DT ranges, ie in:

of_pci_get_host_bridge_resources()

the resources won't contain the domain number you are looking for here, for the records, so we'd better find an agreement sooner rather than later.

So basically I could go as far as sticking 0000 to the string given the current code. I did not drop the 0x04x entirely since I do not want to break userspace, I was tempted though, let me know if I am allowed to do that.

Quoted 23 lines · Lorenzo Pieralisi

Quoted 7 lines · Jason Gunthorpe

Quoted 4 lines · Lorenzo Pieralisi

Code in drivers/pci/pci-mvebu.c has been changed to add a domain number to PCI resources by using the nr value coming from the setup pcibios32 callback, which may not be correct and should be considered a temporary solution waiting for review comments.

Quoted 7 lines

The intent of the string was to have the domain number so that resources in /proc/iomem can be correlated with lspci.

This would be a 'best practice' - all PCI drivers need to request resource, and the resource should be relatable back to the PCI domain... So it would be best if the domain number was available at this point in a driver's flow.

It is not available with the new approach and the generic PCI domains since the set-up hook is called before creating the pci_bus. That's why I mentioned that in the cover letter, and that's good it caught your attention.

On a side note, when the resources are parsed from DT ranges, ie in:

Quoted 4 lines

of_pci_get_host_bridge_resources()

the resources won't contain the domain number you are looking for here, for the records, so we'd better find an agreement sooner rather than later.

Well, it is very unfortunate that things are globally not sequenced to allow proper resource names :(

But it also isn't really a big deal in the grand scheme of things. Maybe it can be fixed later :|

Quoted 3 lines

So basically I could go as far as sticking 0000 to the string given the current code. I did not drop the 0x04x entirely since I do not want to break userspace, I was tempted though, let me know if I am allowed to do that.

I'd just drop it entirely then, nobody is going to parse /proc/iomem

Jason

But of_pci_get_host_bridge_resources() does not request the resources, it only creates them out of the DT ranges. If/when the driver decides the list of resources is correct and it can work with it can also request them and use whatever domain number allocation strategy it wants (auto-incrementing or DT based). So I don't think the global sequencing is broken here.

Quoted 5 lines · Liviu Dudau

But of_pci_get_host_bridge_resources() does not request the resources, it only creates them out of the DT ranges. If/when the driver decides the list of resources is correct and it can work with it can also request them and use whatever domain number allocation strategy it wants (auto-incrementing or DT based). So I don't think the global sequencing is broken here.

So how does mvebu now allocate a unique domain number per mvebu_pcie?

Which hw_pci callback should do that?

It is done through core code in pci_create_root_bus(), that in turn calls pci_bus_assign_domain_nr() which is implemented now in pcibios for arm, it is all in patch 2. What Liviu is saying is correct, it all

Quoted 5 lines · Liviu Dudau

But of_pci_get_host_bridge_resources() does not request the resources, it only creates them out of the DT ranges. If/when the driver decides the list of resources is correct and it can work with it can also request them and use whatever domain number allocation strategy it wants (auto-incrementing or DT based). So I don't think the global sequencing is broken here.

So how does mvebu now allocate a unique domain number per mvebu_pcie?

Which hw_pci callback should do that?

Quoted 1 line

So how does mvebu now allocate a unique domain number per mvebu_pcie?

I believe the answer to that is that the mvebu PCIe driver currently only supports one domain, and it will have the unique number '0', which is the default.

Quoted 5 lines · Arnd Bergmann

Quoted 1 line

So how does mvebu now allocate a unique domain number per mvebu_pcie?

I believe the answer to that is that the mvebu PCIe driver currently only supports one domain, and it will have the unique number '0', which is the default.

It is like most of the the other new drivers, each mvebu_pcie_probe expects to create a new domain with a unique bus number set for that platform_device. AFAIK everything is uniq'd to the struct mcebu_pcie, so there is nothing precluding the driver from being instantiated twice.

Indeed, the way mvebu hardware works you could actually create a DT that assigned some ports to one domain and some other ports to a different domain, using two platform_devices. All that was missing from the driver was to increment the domain number.

I think Lorenzo's patches improve this, at least it appears that unique domain numbers are now being assigned, I'm not sure - I'm a little confused how we can safely blindly apply the new domain logic without the driver opt'ing in....

I thought older PCI platforms tended to call pci_common_init for each physical PCI bus, and we don't want them to suddenly have non-zero domain numbers??