arm, at91, spl: add spl support for the taurus and corvus boards
Subsystems (5)
v3 cover arm, at91, spl: add spl support for the taurus and corvus boards
This patchset add SPL support for the AT91SAM9G20 based taurus board, and the AT91SAM9M10G45 based corvus board from siemens, and replaces the at91bootstrap code.
The boot.bin which replaces the at91bootstrap image can created with mkimage:
./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin
For other SoC this step is done in one step ... should we add this also for AT91 based boards?
For example add a "u-boot.at91" target in the Makefile?
This patchset is based on the common updates for the taurus and corvus board:
Patchwork [U-Boot] arm, at91: add generic board support for the taurus and corvus board
http://patchwork.ozlabs.org/patch/395398/
(now in mainline)
Patchwork [U-Boot] arm, at91: add spi dataflash support for the taurus board
http://patchwork.ozlabs.org/patch/395400/
Changes in v3:
rebased against 571bdf16a78e9e116a93d46f4809c4f8a3f2adb6
add Reviewed-by from Bo Shen
add Acked-by from Scott Wood
add comment from Bo shen
- ignore 80 characters length as Bo Shen and Adreas Biessmann suggested
- fix AT91_PMC_MCKR_CSS_MASK and AT91_PMC_MCKR_PRES_MASK
- make matrix_init weak, and add it in the taurus board code
- do not introduce ifdef mess for the differences between the SoCs, instead use a seperate file for each SoC:
- for armv5 (arm926ejs, now at91 series), named it spl_at91.c,
- for armv7 (cortex-a5, now, sama5d3), named it spl_atmel.c
- move common code to arch/arm/cpu/at91-common/spl.c
Changes in v2:
- rebased against d58a9451e7339ed4cf2b2627e534611f427fb791
- spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header new in v2
- add comment from Jagan Teki:
- remove spi_init_f() from board file
- remove CONFIG_SYS_SPI_WRITE_TOUT from board config file instead define a default in the spi driver -> new patch for v2
- add Reviewed-by: Andreas Bie?mann <[email protected]>
- add comment from Andreas Biessmann:
rename "MPDDRC_CR_EBISHARE" to "MPDDRC_CR_DQMS_SHARED"
- add comment from scott wood:
move nand_erase_one into "include/nand.h" and rename it to spl_nand_erase_one
Heiko Schocher (12):
spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header arm, at91: add spi dataflash support for the taurus board arm, at91, mpddrc: fix typo in ddr2_init()
arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45 arm, at91: add missing ddr2 cr register MPDDRC_CR_EBISHARE define spl, nand: add option to boot raw u-boot.bin image only
mtd: atmel_nand: add missign include
spl, nand, atmel_nand: add erase one block function spl, mtd, nand, atmel_nand: invert device ready pin logic arm, spl, at91: add at91sam9260 and at91sam9g45 spl support arm, at91, spl: add spl support for the taurus board arm, spl, at91: add spl support for the corvus board
README | 4 + arch/arm/Kconfig | 2 + arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c | 22 ++++ arch/arm/cpu/arm926ejs/at91/clock.c | 60 ++++++++++ arch/arm/cpu/armv7/at91/clock.c | 27 +++++ arch/arm/cpu/at91-common/Makefile | 7 +- arch/arm/cpu/at91-common/mpddrc.c | 13 ++- arch/arm/cpu/at91-common/sdram.c | 77 +++++++++++++ arch/arm/cpu/at91-common/spl.c | 89 +-------------- arch/arm/cpu/at91-common/spl_at91.c | 124 +++++++++++++++++++++ arch/arm/cpu/at91-common/spl_atmel.c | 76 +++++++++++++ arch/arm/include/asm/arch-at91/at91_common.h | 6 + arch/arm/include/asm/arch-at91/at91_pmc.h | 1 + arch/arm/include/asm/arch-at91/at91sam9260.h | 1 + .../arm/include/asm/arch-at91/at91sam9260_matrix.h | 5 + arch/arm/include/asm/arch-at91/at91sam9_sdramc.h | 22 +++- arch/arm/include/asm/arch-at91/atmel_mpddrc.h | 1 + board/siemens/corvus/board.c | 109 ++++++++++++++++-- board/siemens/taurus/taurus.c | 100 +++++++++++++++-- common/spl/spl.c | 15 ++- common/spl/spl_nand.c | 13 +++ configs/corvus_defconfig | 5 +- configs/taurus_defconfig | 5 +- drivers/mtd/nand/atmel_nand.c | 40 ++++++- drivers/spi/atmel_spi.h | 4 + include/configs/afeb9260.h | 1 - include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9261ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9rlek.h | 1 - include/configs/corvus.h | 54 ++++++++- include/configs/ethernut5.h | 1 - include/configs/meesc.h | 1 - include/configs/otc570.h | 1 - include/configs/pm9261.h | 1 - include/configs/pm9263.h | 1 - include/configs/sbc35_a9g20.h | 1 - include/configs/taurus.h | 62 ++++++++++- include/configs/tny_a9260.h | 1 - include/configs/usb_a9263.h | 1 - include/nand.h | 1 + include/spl.h | 1 + 42 files changed, 815 insertions(+), 144 deletions(-) create mode 100644 arch/arm/cpu/at91-common/sdram.c create mode 100644 arch/arm/cpu/at91-common/spl_at91.c create mode 100644 arch/arm/cpu/at91-common/spl_atmel.c
Signature · 1 line
1.8.3.1
PATCH v3 1/12 spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header
move CONFIG_SYS_SPI_WRITE_TOUT into drivers/spi/atmel_spi.h and define a default value. Delete this define in the board config files, where it is possible (all boards use currently the same value).
---
Changes in v3:
rebased against 571bdf16a78e9e116a93d46f4809c4f8a3f2adb6
Changes in v2:
rebased against d58a9451e7339ed4cf2b2627e534611f427fb791 new in v2
drivers/spi/atmel_spi.h | 4 ++++ include/configs/afeb9260.h | 1 - include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9261ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9rlek.h | 1 - include/configs/ethernut5.h | 1 - include/configs/meesc.h | 1 - include/configs/otc570.h | 1 - include/configs/pm9261.h | 1 - include/configs/pm9263.h | 1 - include/configs/sbc35_a9g20.h | 1 - include/configs/tny_a9260.h | 1 - include/configs/usb_a9263.h | 1 - 14 files changed, 4 insertions(+), 13 deletions(-)
drivers/spi/atmel_spi.h +4 -0
@@ -94,3 +94,7 @@ static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave) readl(as->regs + ATMEL_SPI_##reg)#define spi_writel (as, reg, value) \ writel(value, as->regs + ATMEL_SPI_##reg) + +#if !defined(CONFIG_SYS_SPI_WRITE_TOUT ) +#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) +#endif
include/configs/afeb9260.h +0 -1
@@ -77,7 +77,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000/* CS1 */
include/configs/at91sam9260ek.h +0 -1
@@ -135,7 +135,6 @@#ifndef CONFIG_AT91SAM9G20EK_2MMC #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000/* CS1 */
include/configs/at91sam9261ek.h +0 -1
@@ -107,7 +107,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000/* CS3 */
include/configs/at91sam9263ek.h +0 -1
@@ -119,7 +119,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define AT91_SPI_CLK 15000000
include/configs/at91sam9rlek.h +0 -1
@@ -100,7 +100,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define AT91_SPI_CLK 15000000
include/configs/ethernut5.h +0 -1
@@ -78,7 +78,6 @@/* SPI */ #define CONFIG_ATMEL_SPI -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define AT91_SPI_CLK 15000000/* Serial port */
include/configs/meesc.h +0 -1
@@ -124,7 +124,6 @@#ifdef CONFIG_SYS_USE_DATAFLASH # define CONFIG_ATMEL_DATAFLASH_SPI # define CONFIG_HAS_DATAFLASH -# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ # define AT91_SPI_CLK 15000000
include/configs/otc570.h +0 -1
@@ -174,7 +174,6 @@#ifdef CONFIG_SYS_USE_DATAFLASH # define CONFIG_ATMEL_DATAFLASH_SPI # define CONFIG_HAS_DATAFLASH -# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ # define AT91_SPI_CLK 15000000
include/configs/pm9261.h +0 -1
@@ -202,7 +202,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000/* CS3 */
include/configs/pm9263.h +0 -1
@@ -216,7 +216,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define AT91_SPI_CLK 15000000
include/configs/sbc35_a9g20.h +0 -1
@@ -80,7 +80,6 @@#define CONFIG_SPI #define CONFIG_CMD_SPI #define CONFIG_ATMEL_SPI -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define CONFIG_CMD_EEPROM #define CONFIG_SPI_M95XXX
include/configs/tny_a9260.h +0 -1
@@ -85,7 +85,6 @@#define CONFIG_SPI #define CONFIG_CMD_SPI #define CONFIG_ATMEL_SPI -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define CONFIG_CMD_EEPROM #define CONFIG_SPI_M95XXX
include/configs/usb_a9263.h +0 -1
@@ -85,7 +85,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000#define AT91_SPI_CLK 8000000
Signature · 1 line
1.8.3.1
PATCH v3 1/12 spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header
Quoted 200 lines · Heiko Schocher
move
CONFIG_SYS_SPI_WRITE_TOUTintodrivers/spi/atmel_spi.hand define a default value. Delete this define in the board config files, where it is possible (all boards use currently the same value).Signed-off-by Heiko Schocher <[email protected]>---
Changes in v3:
rebased against571bdf16a78e9e116a93d46f4809c4f8a3f2adb6Changes in v2:
rebased againstd58a9451e7339ed4cf2b2627e534611f427fb791new in v2drivers/spi/atmel_spi.h | 4 ++++ include/configs/afeb9260.h | 1 - include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9261ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9rlek.h | 1 - include/configs/ethernut5.h | 1 - include/configs/meesc.h | 1 - include/configs/otc570.h | 1 - include/configs/pm9261.h | 1 - include/configs/pm9263.h | 1 - include/configs/sbc35_a9g20.h | 1 - include/configs/tny_a9260.h | 1 - include/configs/usb_a9263.h | 1 - 14 files changed, 4 insertions(+), 13 deletions(-)drivers/spi/atmel_spi.h +4
-0@@ -94,3 +94,7 @@ static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave) readl(as->regs + ATMEL_SPI_##reg)#define spi_writel (as, reg, value) \ writel(value, as->regs + ATMEL_SPI_##reg) + +#if !defined(CONFIG_SYS_SPI_WRITE_TOUT ) +#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) +#endif include/configs/afeb9260.h +0
-1@@ -77,7 +77,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000/* CS1 */ include/configs/at91sam9260ek.h +0
-1@@ -135,7 +135,6 @@#ifndef CONFIG_AT91SAM9G20EK_2MMC #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000/* CS1 */ include/configs/at91sam9261ek.h +0
-1@@ -107,7 +107,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000/* CS3 */ include/configs/at91sam9263ek.h +0
-1@@ -119,7 +119,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define AT91_SPI_CLK 15000000include/configs/at91sam9rlek.h +0
-1@@ -100,7 +100,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define AT91_SPI_CLK 15000000include/configs/ethernut5.h +0
-1@@ -78,7 +78,6 @@/* SPI */ #define CONFIG_ATMEL_SPI -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define AT91_SPI_CLK 15000000/* Serial port */ include/configs/meesc.h +0
-1@@ -124,7 +124,6 @@#ifdef CONFIG_SYS_USE_DATAFLASH # define CONFIG_ATMEL_DATAFLASH_SPI # define CONFIG_HAS_DATAFLASH -# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ # define AT91_SPI_CLK 15000000include/configs/otc570.h +0
-1@@ -174,7 +174,6 @@#ifdef CONFIG_SYS_USE_DATAFLASH # define CONFIG_ATMEL_DATAFLASH_SPI # define CONFIG_HAS_DATAFLASH -# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ # define AT91_SPI_CLK 15000000include/configs/pm9261.h +0
-1@@ -202,7 +202,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000/* CS3 */ include/configs/pm9263.h +0
-1@@ -216,7 +216,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000/* CS0 */ #define AT91_SPI_CLK 15000000include/configs/sbc35_a9g20.h +0
-1@@ -80,7 +80,6 @@#define CONFIG_SPI #define CONFIG_CMD_SPI #define CONFIG_ATMEL_SPI -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define CONFIG_CMD_EEPROM #define CONFIG_SPI_M95XXX include/configs/tny_a9260.h +0
-1@@ -85,7 +85,6 @@#define CONFIG_SPI #define CONFIG_CMD_SPI #define CONFIG_ATMEL_SPI -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)#define CONFIG_CMD_EEPROM #define CONFIG_SPI_M95XXX include/configs/usb_a9263.h +0
-2@@ -85,7 +85,6 @@/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000#define AT91_SPI_CLK 8000000 --
Quoted 2 lines
1.8.3.1
thanks!
Signature · 1 line
Jagan.
PATCH v3 1/12 spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header
In reply to Heiko SchocherQuoted 6 lines · Heiko Schocher
move
CONFIG_SYS_SPI_WRITE_TOUTintodrivers/spi/atmel_spi.hand define a default value. Delete this define in the board config files, where it is possible (all boards use currently the same value).Signed-off-by Heiko Schocher <[email protected]>
Quoted 24 lines
---
Changes in v3:
rebased against571bdf16a78e9e116a93d46f4809c4f8a3f2adb6Changes in v2:
rebased againstd58a9451e7339ed4cf2b2627e534611f427fb791new in v2drivers/spi/atmel_spi.h | 4 ++++ include/configs/afeb9260.h | 1 - include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9261ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9rlek.h | 1 - include/configs/ethernut5.h | 1 - include/configs/meesc.h | 1 - include/configs/otc570.h | 1 - include/configs/pm9261.h | 1 - include/configs/pm9263.h | 1 - include/configs/sbc35_a9g20.h | 1 - include/configs/tny_a9260.h | 1 - include/configs/usb_a9263.h | 1 - 14 files changed, 4 insertions(+), 13 deletions(-)
PATCH v3 1/12 spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header
In reply to Heiko SchocherDear Heiko Schocher,
Quoted 17 lines · Heiko Schocher
move
CONFIG_SYS_SPI_WRITE_TOUTintodrivers/spi/atmel_spi.hand define a default value. Delete this define in the board config files, where it is possible (all boards use currently the same value).Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Jagannadha Sutradharudu Teki <[email protected]>Reviewed-by Andreas Bie?mann <[email protected]>---
Changes in v3:
rebased against571bdf16a78e9e116a93d46f4809c4f8a3f2adb6Changes in v2:
rebased againstd58a9451e7339ed4cf2b2627e534611f427fb791new in v2
Quoted 15 lines
drivers/spi/atmel_spi.h | 4 ++++ include/configs/afeb9260.h | 1 - include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9261ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9rlek.h | 1 - include/configs/ethernut5.h | 1 - include/configs/meesc.h | 1 - include/configs/otc570.h | 1 - include/configs/pm9261.h | 1 - include/configs/pm9263.h | 1 - include/configs/sbc35_a9g20.h | 1 - include/configs/tny_a9260.h | 1 - include/configs/usb_a9263.h | 1 - 14 files changed, 4 insertions(+), 13 deletions(-)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
PATCH v3 2/12 arm, at91: add spi dataflash support for the taurus board
In reply to Heiko Schocher---
Changes in v3:
add Reviewed-by from Bo Shen
Changes in v2:
- add comment from Jagan Teki:
- remove spi_init_f() from board file
- remove CONFIG_SYS_SPI_WRITE_TOUT from board config file
instead define a default in the spi driver -> new patch for v2
board/siemens/taurus/taurus.c | 18 ++++++++++++++++++ include/configs/taurus.h | 10 ++++++++++ 2 files changed, 28 insertions(+)
board/siemens/taurus/taurus.c +18 -0
@@ -22,6 +22,8 @@#include <asm/arch/gpio.h> #include <asm/arch/at91sam9_sdramc.h> #include <atmel_mci.h> +#include <asm/arch/at91_spi.h> +#include <spi.h> #include <net.h> #include <netdev.h>
@@ -127,6 +129,21 @@ int board_early_init_f(void)return 0 ; } +int spi_cs_is_valid (unsigned int bus,unsigned int cs) +{ +return bus ==0 && cs ==0 ; +} + +void spi_cs_activate (struct spi_slave *slave) +{ +at91_set_gpio_value (TAURUS_SPI_CS_PIN ,0 ); +} + +void spi_cs_deactivate (struct spi_slave *slave) +{ +at91_set_gpio_value (TAURUS_SPI_CS_PIN ,1 ); +} +int board_init (void ) {/* adress of boot parameters */
@@ -139,6 +156,7 @@ int board_init(void)#ifdef CONFIG_MACB taurus_macb_hw_init ();#endif +at91_spi0_hw_init (TAURUS_SPI_MASK );return 0 ; }
include/configs/taurus.h +10 -0
@@ -127,6 +127,16 @@#define CONFIG_USB_STORAGE #endif +/* SPI EEPROM */ +#define CONFIG_SPI +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_ATMEL_SPI +#define CONFIG_SPI_FLASH_STMICRO +#define TAURUS_SPI_MASK (1 << 4) +#define TAURUS_SPI_CS_PIN AT91_PIN_PA3 +/* load address */ #define CONFIG_SYS_LOAD_ADDR 0x22000000
Signature · 1 line
1.8.3.1
PATCH v3 2/12 arm, at91: add spi dataflash support for the taurus board
Quoted 40 lines · Heiko Schocher
Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Bo Shen <[email protected]>---
Changes in v3:
add Reviewed-by from Bo ShenChanges in v2:
- add comment from Jagan Teki:
- removespi_init_f()from board file
- removeCONFIG_SYS_SPI_WRITE_TOUTfrom board config fileinstead define a default in the spi driver -> new patch for v2board/siemens/taurus/taurus.c | 18 ++++++++++++++++++ include/configs/taurus.h | 10 ++++++++++ 2 files changed, 28 insertions(+)board/siemens/taurus/taurus.c +7
-0@@ -22,6 +22,8 @@#include <asm/arch/gpio.h> #include <asm/arch/at91sam9_sdramc.h> #include <atmel_mci.h> +#include <asm/arch/at91_spi.h> +#include <spi.h> #include <net.h> #include <netdev.h> @@ -127,6 +129,21 @@ int board_early_init_f(void)return 0 ; } +int spi_cs_is_valid (unsigned int bus,unsigned int cs) +{ +return bus ==0 && cs ==0 ; +} +
board/siemens/taurus/taurus.c int board_early_init_f(void) · line 146
Quoted 10 lines
board/siemens/taurus/taurus.c +10
-0+void spi_cs_activate (struct spi_slave *slave) +{ +at91_set_gpio_value (TAURUS_SPI_CS_PIN ,0 ); +} + +void spi_cs_deactivate (struct spi_slave *slave) +{ +at91_set_gpio_value (TAURUS_SPI_CS_PIN ,1 ); +} +
Please add all these stuff in drivers/spi/atmel_spi.c
Did you see any issues?
Quoted 22 lines
board/siemens/taurus/taurus.c +1
-0int board_init (void ) {/* adress of boot parameters */ @@ -139,6 +156,7 @@ int board_init(void)#ifdef CONFIG_MACB taurus_macb_hw_init ();#endif +at91_spi0_hw_init (TAURUS_SPI_MASK );return 0 ; }include/configs/taurus.h +3
-0@@ -127,6 +127,16 @@#define CONFIG_USB_STORAGE #endif +/* SPI EEPROM */ +#define CONFIG_SPI +#define CONFIG_CMD_SPI
include/configs/taurus.h line 142
Quoted 10 lines
include/configs/taurus.h +7
-0+#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_ATMEL_SPI +#define CONFIG_SPI_FLASH_STMICRO +#define TAURUS_SPI_MASK (1 << 4) +#define TAURUS_SPI_CS_PIN AT91_PIN_PA3 +/* load address */ #define CONFIG_SYS_LOAD_ADDR 0x22000000
thanks!
Signature · 1 line
Jagan.
PATCH v3 2/12 arm, at91: add spi dataflash support for the taurus board
Hello Jagan,
Am 31.10.2014 11:48, schrieb Jagan Teki:
Quoted 54 lines · Heiko Schocher
Quoted 40 lines
Signed-off-by Heiko Schocher<[email protected]>Reviewed-by Bo Shen<[email protected]>---
Changes in v3:
add Reviewed-by from Bo ShenChanges in v2:
- add comment from Jagan Teki:
- removespi_init_f()from board file
- removeCONFIG_SYS_SPI_WRITE_TOUTfrom board config fileinstead define a default in the spi driver -> new patch for v2board/siemens/taurus/taurus.c | 18 ++++++++++++++++++ include/configs/taurus.h | 10 ++++++++++ 2 files changed, 28 insertions(+)board/siemens/taurus/taurus.c +7
-0@@ -22,6 +22,8 @@#include <asm/arch/gpio.h> #include <asm/arch/at91sam9_sdramc.h> #include <atmel_mci.h> +#include <asm/arch/at91_spi.h> +#include <spi.h> #include <net.h> #include <netdev.h> @@ -127,6 +129,21 @@ int board_early_init_f(void)return 0 ; } +int spi_cs_is_valid (unsigned int bus,unsigned int cs) +{ +return bus ==0 && cs ==0 ; +} +board/siemens/taurus/taurus.c int board_early_init_f(void) · line 146
Quoted 10 lines
board/siemens/taurus/taurus.c +10
-0+void spi_cs_activate (struct spi_slave *slave) +{ +at91_set_gpio_value (TAURUS_SPI_CS_PIN ,0 ); +} + +void spi_cs_deactivate (struct spi_slave *slave) +{ +at91_set_gpio_value (TAURUS_SPI_CS_PIN ,1 ); +} +Please add all these stuff in
drivers/spi/atmel_spi.c
Quoted 1 line
Did you see any issues?
Hmm.. this is board specific ... or?
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 2/12 arm, at91: add spi dataflash support for the taurus board
Dear Jagan Teki,
Quoted 58 lines · Heiko Schocher
Hello Jagan,
Am 31.10.2014 11:48, schrieb Jagan Teki:
Quoted 55 lines · Heiko Schocher
Quoted 41 lines
Signed-off-by Heiko Schocher<[email protected]>Reviewed-by Bo Shen<[email protected]>---
Changes in v3:
add Reviewed-by from Bo ShenChanges in v2:
- add comment from Jagan Teki:
- removespi_init_f()from board file
- removeCONFIG_SYS_SPI_WRITE_TOUTfrom board config fileinstead define a default in the spi driver -> new patch for v2board/siemens/taurus/taurus.c | 18 ++++++++++++++++++ include/configs/taurus.h | 10 ++++++++++ 2 files changed, 28 insertions(+)board/siemens/taurus/taurus.c +7
-0@@ -22,6 +22,8 @@#include <asm/arch/gpio.h> #include <asm/arch/at91sam9_sdramc.h> #include <atmel_mci.h> +#include <asm/arch/at91_spi.h> +#include <spi.h> #include <net.h> #include <netdev.h> @@ -127,6 +129,21 @@ int board_early_init_f(void)return 0 ; } +int spi_cs_is_valid (unsigned int bus,unsigned int cs) +{ +return bus ==0 && cs ==0 ; +} +board/siemens/taurus/taurus.c int board_early_init_f(void) · line 146
Quoted 10 lines
board/siemens/taurus/taurus.c +10
-0+void spi_cs_activate (struct spi_slave *slave) +{ +at91_set_gpio_value (TAURUS_SPI_CS_PIN ,0 ); +} + +void spi_cs_deactivate (struct spi_slave *slave) +{ +at91_set_gpio_value (TAURUS_SPI_CS_PIN ,1 ); +} +Please add all these stuff in
drivers/spi/atmel_spi.c
Quoted 3 lines
Quoted 1 line
Did you see any issues?
Hmm.. this is board specific ... or?
Heiko is right, this is board specific and follows the current way to implement spi for the atmel driver.
But Jagan is also right, we should move this code to the driver code cause in fact it is parametrisation of generic code. Unfortunately this change will blow up this series. I think we should consider this when rewriting the atmel spi driver for dm, which will be done soon (but I think not in this merge window). Jagan, is this Ok for you?
Best regards
Andreas Bie?mann
PATCH v3 2/12 arm, at91: add spi dataflash support for the taurus board
Quoted 65 lines · Andreas Bie?mann
Dear Jagan Teki,
Quoted 58 lines · Heiko Schocher
Hello Jagan,
Am 31.10.2014 11:48, schrieb Jagan Teki:
Quoted 55 lines · Heiko Schocher
Quoted 41 lines
Signed-off-by Heiko Schocher<[email protected]>Reviewed-by Bo Shen<[email protected]>---
Changes in v3:
add Reviewed-by from Bo ShenChanges in v2:
- add comment from Jagan Teki:
- removespi_init_f()from board file
- removeCONFIG_SYS_SPI_WRITE_TOUTfrom board config fileinstead define a default in the spi driver -> new patch for v2board/siemens/taurus/taurus.c | 18 ++++++++++++++++++ include/configs/taurus.h | 10 ++++++++++ 2 files changed, 28 insertions(+)board/siemens/taurus/taurus.c +7
-0@@ -22,6 +22,8 @@#include <asm/arch/gpio.h> #include <asm/arch/at91sam9_sdramc.h> #include <atmel_mci.h> +#include <asm/arch/at91_spi.h> +#include <spi.h> #include <net.h> #include <netdev.h> @@ -127,6 +129,21 @@ int board_early_init_f(void)return 0 ; } +int spi_cs_is_valid (unsigned int bus,unsigned int cs) +{ +return bus ==0 && cs ==0 ; +} +board/siemens/taurus/taurus.c int board_early_init_f(void) · line 146
Quoted 10 lines
board/siemens/taurus/taurus.c +10
-0+void spi_cs_activate (struct spi_slave *slave) +{ +at91_set_gpio_value (TAURUS_SPI_CS_PIN ,0 ); +} + +void spi_cs_deactivate (struct spi_slave *slave) +{ +at91_set_gpio_value (TAURUS_SPI_CS_PIN ,1 ); +} +Please add all these stuff in
drivers/spi/atmel_spi.cQuoted 3 lines
Quoted 1 line
Did you see any issues?
Hmm.. this is board specific ... or?
Quoted 7 lines
Heiko is right, this is board specific and follows the current way to implement spi for the atmel driver.
But Jagan is also right, we should move this code to the driver code cause in fact it is parametrisation of generic code. Unfortunately this change will blow up this series. I think we should consider this when rewriting the atmel spi driver for dm, which will be done soon (but I think not in this merge window). Jagan, is this Ok for you?
OK, go ahead with I marked this in my TODO's
thanks!
Signature · 1 line
Jagan.
PATCH v3 2/12 arm, at91: add spi dataflash support for the taurus board
In reply to Heiko SchocherDear Heiko Schocher,
Quoted 12 lines · Heiko Schocher
Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Bo Shen <[email protected]>---
Changes in v3:
add Reviewed-by from Bo ShenChanges in v2:
- add comment from Jagan Teki:
- removespi_init_f()from board file
- removeCONFIG_SYS_SPI_WRITE_TOUTfrom board config file
Quoted 5 lines
instead define a default in the spi driver -> new patch for v2board/siemens/taurus/taurus.c | 18 ++++++++++++++++++ include/configs/taurus.h | 10 ++++++++++ 2 files changed, 28 insertions(+)
this patch looks good from my side.
Best regards
Andreas Bie?mann
PATCH v3 2/12 arm, at91: add spi dataflash support for the taurus board
In reply to Heiko SchocherDear Heiko Schocher,
Quoted 14 lines · Heiko Schocher
Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Bo Shen <[email protected]>Reviewed-by Jagannadha Sutradharudu Teki <[email protected]>---
Changes in v3:
add Reviewed-by from Bo ShenChanges in v2:
- add comment from Jagan Teki:
- removespi_init_f()from board file
- removeCONFIG_SYS_SPI_WRITE_TOUTfrom board config file instead define a default in the spi driver -> new patch for v2
Quoted 3 lines
board/siemens/taurus/taurus.c| 18 ++++++++++++++++++include/configs/taurus.h| 10 ++++++++++2 files changed, 28 insertions(+)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
PATCH v3 3/12 arm, at91, mpddrc: fix typo in ddr2_init()
In reply to Heiko Schocheruse the configure value for computing the ba_off value not the value from the cr register. This leaded in a wrong ram configuration on the upcoming corvus spl board support.
---
Changes in v3:
ignore 80 characters length as Bo Shen and Adreas Biessmann suggested
Changes in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>
arch/arm/cpu/at91-common/mpddrc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/cpu/at91-common/mpddrc.c +1 -1
@@ -26,7 +26,7 @@ int ddr2_init(const unsigned int ram_address,/* Compute bank offset according to NC in configuration register */ ba_off = (mpddr_value->cr &ATMEL_MPDDRC_CR_NC_MASK ) +9 ;if (!(mpddr_value->cr &ATMEL_MPDDRC_CR_DECOD_INTERLEAVED )) - ba_off += ((mpddr->cr &ATMEL_MPDDRC_CR_NR_MASK ) >>2 ) +11 ; + ba_off += ((mpddr_value->cr &ATMEL_MPDDRC_CR_NR_MASK ) >>2 ) +11 ; ba_off += (mpddr_value->md &ATMEL_MPDDRC_MD_DBW_MASK ) ?1 :2 ;
Signature · 1 line
1.8.3.1
PATCH v3 3/12 arm, at91, mpddrc: fix typo in ddr2_init()
Dear Heiko Schocher,
Quoted 9 lines · Heiko Schocher
use the configure value for computing the
ba_offvalue not the value from the cr register. This leaded in a wrong ram configuration on the upcoming corvus spl board support.Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Andreas Bie?mann <[email protected]>---
Quoted 8 lines
Changes in v3:
ignore 80 characters length as Bo Shen and Adreas Biessmann suggestedChanges in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>
arch/arm/cpu/at91-common/mpddrc.c| 2 +-1 file changed, 1 insertion(+), 1 deletion(-)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
PATCH v3 4/12 arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45
In reply to Heiko Schocher- compile mpddrc ram init code also for AT91SAM9M10G45
based boards.
- in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED in the cr configuration
---
Changes in v3:
add Reviewed-by from Bo Shen
Changes in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>
arch/arm/cpu/at91-common/Makefile | 6 +++++- arch/arm/cpu/at91-common/mpddrc.c | 11 ++++++++++- 2 files changed, 15 insertions(+), 2 deletions(-)
arch/arm/cpu/at91-common/Makefile +5 -1
@@ -9,4 +9,8 @@ # obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o -obj-$(CONFIG_SPL_BUILD) += mpddrc.o spl.o +ifneq ($(CONFIG_SPL_BUILD),) +obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o +obj-$(CONFIG_SAMA5D3) += mpddrc.o +obj-y += spl.o +endif
arch/arm/cpu/at91-common/mpddrc.c +10 -1
@@ -17,6 +17,15 @@ static inline void atmel_mpddr_op(int mode, u32 ram_address)writel (0 , ram_address); } +static int ddr2_decodtype_is_seq (u32 cr) +{ +#if defined(CONFIG_SAMA5D3 ) +if (cr &ATMEL_MPDDRC_CR_DECOD_INTERLEAVED ) +return 0 ; +#endif +return 1 ; +} +int ddr2_init (const unsigned int ram_address,const struct atmel_mpddr *mpddr_value) {
@@ -25,7 +34,7 @@ int ddr2_init(const unsigned int ram_address,/* Compute bank offset according to NC in configuration register */ ba_off = (mpddr_value->cr &ATMEL_MPDDRC_CR_NC_MASK ) +9 ; -if (!(mpddr_value->cr &ATMEL_MPDDRC_CR_DECOD_INTERLEAVED )) +if (ddr2_decodtype_is_seq (mpddr_value->cr)) ba_off += ((mpddr_value->cr &ATMEL_MPDDRC_CR_NR_MASK ) >>2 ) +11 ; ba_off += (mpddr_value->md &ATMEL_MPDDRC_MD_DBW_MASK ) ?1 :2 ;
Signature · 1 line
1.8.3.1
PATCH v3 4/12 arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45
Dear Heiko Schocher,
Quoted 13 lines · Heiko Schocher
- compile mpddrc ram init code also for AT91SAM9M10G45
based boards.
- inCONFIG_SAMA5D3case, look for theATMEL_MPDDRC_CR_DECOD_INTERLEAVEDin the cr configurationSigned-off-by Heiko Schocher <[email protected]>Reviewed-by Andreas Bie?mann <[email protected]>Reviewed-by Bo Shen <[email protected]>---
Changes in v3:
add Reviewed-by from Bo Shen
Quoted 6 lines
Changes in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>
arch/arm/cpu/at91-common/Makefile| 6 +++++-arch/arm/cpu/at91-common/mpddrc.c| 11 ++++++++++-2 files changed, 15 insertions(+), 2 deletions(-)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
PATCH v3 5/12 arm, at91: add missing ddr2 cr register MPDDRC_CR_EBISHARE define
In reply to Heiko Schocher---
Changes in v3:
add Reviewed-by from Bo Shen
Changes in v2:
add comment from Andreas Biessmann:
- rename "MPDDRC_CR_EBISHARE" to "MPDDRC_CR_DQMS_SHARED"
arch/arm/include/asm/arch-at91/atmel_mpddrc.h | 1 + 1 file changed, 1 insertion(+)
arch/arm/include/asm/arch-at91/atmel_mpddrc.h +1 -0
@@ -57,6 +57,7 @@ int ddr2_init(const unsigned int ram_address,#define ATMEL_MPDDRC_CR_DIC_DS (0x1 << 8)#define ATMEL_MPDDRC_CR_DIS_DLL (0x1 << 9)#define ATMEL_MPDDRC_CR_OCD_DEFAULT (0x7 << 12) +#define ATMEL_MPDDRC_CR_DQMS_SHARED (0x1 << 16)#define ATMEL_MPDDRC_CR_ENRDM_ON (0x1 << 17)#define ATMEL_MPDDRC_CR_NB_8BANKS (0x1 << 20)#define ATMEL_MPDDRC_CR_NDQS_DISABLED (0x1 << 21)
Signature · 1 line
1.8.3.1
PATCH v3 5/12 arm, at91: add missing ddr2 cr register MPDDRC_CR_EBISHARE define
Dear Heiko Schocher,
Quoted 7 lines · Heiko Schocher
Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Bo Shen <[email protected]>---
Changes in v3:
add Reviewed-by from Bo Shen
Quoted 6 lines
Changes in v2:
add comment from Andreas Biessmann:
- rename "MPDDRC_CR_EBISHARE" to "MPDDRC_CR_DQMS_SHARED"
arch/arm/include/asm/arch-at91/atmel_mpddrc.h| 1 +1 file changed, 1 insertion(+)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
PATCH v3 6/12 spl, nand: add option to boot raw u-boot.bin image only
In reply to Heiko Schocherenable to boot only a raw u-boot.bin image from nand with the CONFIG_SPL_NAND_RAW_ONLY define. This option saves space on boards where spl space is low.
---
on the siemens taurus board, this option saved 0x14d bytes
Changes in v3:
add Reviewed-by from Bo Shen
Changes in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>
README | 4 ++++ common/spl/spl.c | 15 ++++++++++----- common/spl/spl_nand.c | 13 +++++++++++++ include/spl.h | 1 + 4 files changed, 28 insertions(+), 5 deletions(-)
README +4 -0
@@ -3605,6 +3605,10 @@ FIT uImage format: Support for the MTD subsystem within SPL. Useful for environment on NAND support within SPL. + CONFIG_SPL_NAND_RAW_ONLY + Support to boot only raw u-boot.bin images. Use this only + if you need to save space. + CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT Set for the SPL on PPC mpc8xxx targets, support for drivers/ddr/fsl/libddr.o in SPL binary.
common/spl/spl.c +10 -5
@@ -62,6 +62,15 @@ __weak void spl_board_prepare_for_linux(void)/* Nothing to do! */ } +void spl_set_header_raw_uboot (void ) +{ + spl_image.size =CONFIG_SYS_MONITOR_LEN ; + spl_image.entry_point =CONFIG_SYS_UBOOT_START ; + spl_image.load_addr =CONFIG_SYS_TEXT_BASE ; + spl_image.os =IH_OS_U_BOOT ; + spl_image.name ="U-Boot" ; +} +void spl_parse_image_header (const struct image_header *header) {u32 header_size =sizeof (struct image_header );
@@ -93,11 +102,7 @@ void spl_parse_image_header(const struct image_header *header)/* Signature not found - assume u-boot.bin */ debug ("mkimage signature not found - ih_magic = %x\n" , header->ih_magic); - spl_image.size =CONFIG_SYS_MONITOR_LEN ; - spl_image.entry_point =CONFIG_SYS_UBOOT_START ; - spl_image.load_addr =CONFIG_SYS_TEXT_BASE ; - spl_image.os =IH_OS_U_BOOT ; - spl_image.name ="U-Boot" ; +spl_set_header_raw_uboot (); } }
common/spl/spl_nand.c +13 -0
@@ -10,6 +10,18 @@#include <asm/io.h> #include <nand.h> +#if defined(CONFIG_SPL_NAND_RAW_ONLY ) +void spl_nand_load_image (void ) +{ +nand_init (); + +nand_spl_load_image (CONFIG_SYS_NAND_U_BOOT_OFFS , +CONFIG_SYS_NAND_U_BOOT_SIZE , + (void *)CONFIG_SYS_NAND_U_BOOT_DST ); +spl_set_header_raw_uboot (); +nand_deselect (); +} +#else void spl_nand_load_image (void ) {struct image_header *header;
@@ -82,3 +94,4 @@ void spl_nand_load_image(void) spl_image.size, (void *)spl_image.load_addr); nand_deselect(); } +#endif
include/spl.h +1 -0
@@ -35,6 +35,7 @@ extern struct spl_image_info spl_image;void preloader_console_init (void );u32 spl_boot_device (void );u32 spl_boot_mode (void ); +void spl_set_header_raw_uboot (void );void spl_parse_image_header (const struct image_header *header);void spl_board_prepare_for_linux (void );void __noreturn jump_to_image_linux (void *arg);
Signature · 1 line
1.8.3.1
PATCH v3 6/12 spl, nand: add option to boot raw u-boot.bin image only
Dear Heiko Schocher,
Quoted 13 lines · Heiko Schocher
enable to boot only a raw u-boot.bin image from nand with the
CONFIG_SPL_NAND_RAW_ONLYdefine. This option saves space on boards where spl space is low.Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Andreas Bie?mann <[email protected]>Reviewed-by Bo Shen <[email protected]>---
on the siemens taurus board, this option saved0x14dbytesChanges in v3:
add Reviewed-by from Bo Shen
Quoted 8 lines
Changes in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>README | 4 ++++ common/spl/spl.c | 15 ++++++++++----- common/spl/spl_nand.c | 13 +++++++++++++ include/spl.h | 1 + 4 files changed, 28 insertions(+), 5 deletions(-)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
PATCH v3 7/12 mtd: atmel_nand: add missign include
In reply to Heiko Schocherusing this driver in SPL code with CONFIG_SPL_NAND_ECC configured leads in an compileerror. Fix this.
---
Changes in v3:
add Reviewed-by from Bo Shen
Changes in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>
drivers/mtd/nand/atmel_nand.c | 1 + 1 file changed, 1 insertion(+)
drivers/mtd/nand/atmel_nand.c +1 -0
@@ -18,6 +18,7 @@#include <malloc.h> #include <nand.h> #include <watchdog.h> +#include <linux/mtd/nand_ecc.h> #ifdef CONFIG_ATMEL_NAND_HWECC
Signature · 1 line
1.8.3.1
PATCH v3 7/12 mtd: atmel_nand: add missign include
Hi Heiko,
Sorry for missing the subject typo error on v2 review.
s/missign/missing.
I think it can be corrected when apply.
Quoted 23 lines · Heiko Schocher
using this driver in SPL code with
CONFIG_SPL_NAND_ECCconfigured leads in an compileerror. Fix this.Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Andreas Bie?mann <[email protected]>Reviewed-by Bo Shen <[email protected]>---
Changes in v3:
add Reviewed-by from Bo ShenChanges in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>drivers/mtd/nand/atmel_nand.c | 1 + 1 file changed, 1 insertion(+)drivers/mtd/nand/atmel_nand.c +0
-0
drivers/mtd/nand/atmel_nand.c line 23
Quoted 6 lines
drivers/mtd/nand/atmel_nand.c +1
-0@@ -18,6 +18,7 @@#include <malloc.h> #include <nand.h> #include <watchdog.h> +#include <linux/mtd/nand_ecc.h> #ifdef CONFIG_ATMEL_NAND_HWECC
Best Regards,
Bo Shen
PATCH v3 7/12 mtd: atmel_nand: add missign include
Hello Bo,
Am 31.10.2014 08:43, schrieb Bo Shen:
Quoted 4 lines
Hi Heiko,
Sorry for missing the subject typo error on v2 review.s/missign/missing.
Ups ... corrected ...
Quoted 1 line
I think it can be corrected when apply.
That would be great, thanks!
bye,
Heiko
Quoted 36 lines · Heiko Schocher
Quoted 23 lines
using this driver in SPL code with
CONFIG_SPL_NAND_ECCconfigured leads in an compileerror. Fix this.Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Andreas Bie?mann <[email protected]>Reviewed-by Bo Shen <[email protected]>---
Changes in v3:
add Reviewed-by from Bo ShenChanges in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>
drivers/mtd/nand/atmel_nand.c| 1 +1 file changed, 1 insertion(+)drivers/mtd/nand/atmel_nand.c +0
-0drivers/mtd/nand/atmel_nand.c line 23
Quoted 6 lines
drivers/mtd/nand/atmel_nand.c +1
-0@@ -18,6 +18,7 @@#include <malloc.h> #include <nand.h> #include <watchdog.h> +#include <linux/mtd/nand_ecc.h> #ifdef CONFIG_ATMEL_NAND_HWECC Best Regards,
Bo Shen
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 7/12 mtd: atmel_nand: add missign include
Hi Heiko,
Quoted 6 lines · Heiko Schocher
Hello Bo,
Am 31.10.2014 08:43, schrieb Bo Shen:
Quoted 3 lines
Hi Heiko,
Sorry for missing the subject typo error on v2 review.
Quoted 7 lines
Quoted 1 line
s/missign/missing.
Ups ... corrected ...
Quoted 1 line
I think it can be corrected when apply.
That would be great, thanks!
No problem, I'll change it when applying.
Best regards
Andreas Bie?mann
PATCH v3 7/12 mtd: atmel_nand: add missing include
In reply to Heiko SchocherDear Heiko Schocher,
Quoted 10 lines · Heiko Schocher
using this driver in SPL code with
CONFIG_SPL_NAND_ECCconfigured leads in an compileerror. Fix this.Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Andreas Bie?mann <[email protected]>Reviewed-by Bo Shen <[email protected]>[fix subject]Signed-off-by Andreas Bie?mann <[email protected]>---
Quoted 8 lines
Changes in v3:
add Reviewed-by from Bo ShenChanges in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>
drivers/mtd/nand/atmel_nand.c| 1 +1 file changed, 1 insertion(+)
applied to u-boot-atmel/master, with changed subject thanks!
Best regards,
Andreas Bie?mann
PATCH v3 8/12 spl, nand, atmel_nand: add erase one block function
In reply to Heiko Schochererase one nand block in spl code. keep it simple, as size matters This is used on the upcoming taurus spl support.
---
Changes in v3:
add Acked-by from Scott Wood
add Reviewed-by from Bo Shen
Changes in v2:
add comment from scott wood:
- move nand_erase_one into "include/nand.h" and rename it to spl_nand_erase_one
drivers/mtd/nand/atmel_nand.c | 33 +++++++++++++++++++++++++++++++++ include/nand.h | 1 + 2 files changed, 34 insertions(+)
drivers/mtd/nand/atmel_nand.c +33 -0
@@ -1274,6 +1274,39 @@ static int nand_read_page(int block, int page, void *dst)return 0 ; } + +int spl_nand_erase_one (int block,int page) +{ +struct nand_chip *this = mtd.priv; +void (*hwctrl)(struct mtd_info *mtd,int cmd, +unsigned int ctrl) = this->cmd_ctrl; +int page_addr; + +if (nand_chip.select_chip) + nand_chip.select_chip (&mtd,0 ); + + page_addr = page + block *CONFIG_SYS_NAND_PAGE_COUNT ; +hwctrl (&mtd,NAND_CMD_ERASE1 ,NAND_CTRL_CLE |NAND_CTRL_CHANGE ); +/* Row address */ +hwctrl (&mtd, (page_addr &0xff ),NAND_CTRL_ALE |NAND_CTRL_CHANGE ); +hwctrl (&mtd, ((page_addr >>8 ) &0xff ), +NAND_CTRL_ALE |NAND_CTRL_CHANGE ); +#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE +/* One more address cycle for devices > 128MiB */ +hwctrl (&mtd, (page_addr >>16 ) &0x0f , +NAND_CTRL_ALE |NAND_CTRL_CHANGE ); +#endif + +hwctrl (&mtd,NAND_CMD_ERASE2 ,NAND_CTRL_CLE |NAND_CTRL_CHANGE ); +udelay (2000 ); + +while (!this->dev_ready (&mtd)) + ; + +nand_deselect (); + +return 0 ; +}#else static int nand_read_page (int block,int page,void *dst) {
include/nand.h +1 -0
@@ -167,3 +167,4 @@ __attribute__((noreturn)) void nand_boot(void);#define ENV_OFFSET_SIZE 8int get_nand_env_oob (nand_info_t *nand,unsigned long *result);#endif +int spl_nand_erase_one (int block,int page);
Signature · 1 line
1.8.3.1
PATCH v3 8/12 spl, nand, atmel_nand: add erase one block function
Quoted 6 lines · Heiko Schocher
erase one nand block in spl code. keep it simple, as size matters This is used on the upcoming taurus spl support.
Signed-off-by Heiko Schocher <[email protected]>Acked-by Scott Wood <[email protected]>Reviewed-by Bo Shen <[email protected]>
Quoted 15 lines
---
Changes in v3:
add Acked-by from Scott Wood
add Reviewed-by from Bo ShenChanges in v2:
add comment from scott wood:
- movenand_erase_oneinto "include/nand.h" and rename it tospl_nand_erase_onedrivers/mtd/nand/atmel_nand.c | 33 +++++++++++++++++++++++++++++++++ include/nand.h | 1 + 2 files changed, 34 insertions(+)
PATCH v3 8/12 spl, nand, atmel_nand: add erase one block function
In reply to Heiko SchocherDear Heiko Schocher,
Quoted 13 lines · Heiko Schocher
erase one nand block in spl code. keep it simple, as size matters This is used on the upcoming taurus spl support.
Signed-off-by Heiko Schocher <[email protected]>Acked-by Scott Wood <[email protected]>Reviewed-by Bo Shen <[email protected]>Reviewed-by Andreas Bie?mann <[email protected]>---
Changes in v3:
add Acked-by from Scott Wood
add Reviewed-by from Bo Shen
Quoted 8 lines
Changes in v2:
add comment from scott wood:
- movenand_erase_oneinto "include/nand.h" and rename it tospl_nand_erase_one
drivers/mtd/nand/atmel_nand.c| 33 +++++++++++++++++++++++++++++++++include/nand.h| 1 +2 files changed, 34 insertions(+)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
PATCH v3 9/12 spl, mtd, nand, atmel_nand: invert device ready pin logic
In reply to Heiko Schocherdevice ready pin is signalling that the device is ready on state 1 not on 0. Simmiliar as it is in drivers/mtd/nand/nand_spl_simple.c
---
Changes in v3:
add Acked-by from Scott Wood
add Reviewed-by from Bo Shen
Changes in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>
drivers/mtd/nand/atmel_nand.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/mtd/nand/atmel_nand.c +3 -3
@@ -1188,7 +1188,7 @@ static int nand_command(int block, int page, uint32_t offs, u8 cmd)void (*hwctrl)(struct mtd_info *mtd,int cmd,unsigned int ctrl) = this->cmd_ctrl; -while (this->dev_ready (&mtd)) +while (!this->dev_ready (&mtd)) ;if (cmd ==NAND_CMD_READOOB ) {
@@ -1213,7 +1213,7 @@ static int nand_command(int block, int page, uint32_t offs, u8 cmd)hwctrl (&mtd,NAND_CMD_READSTART ,NAND_CTRL_CLE |NAND_CTRL_CHANGE );hwctrl (&mtd,NAND_CMD_NONE ,NAND_NCE |NAND_CTRL_CHANGE ); -while (this->dev_ready (&mtd)) +while (!this->dev_ready (&mtd)) ;return 0 ;
@@ -1353,7 +1353,7 @@ int at91_nand_wait_ready(struct mtd_info *mtd)udelay (this->chip_delay); -return 0 ; +return 1 ; }int board_nand_init (struct nand_chip *nand)
Signature · 1 line
1.8.3.1
PATCH v3 9/12 spl, mtd, nand, atmel_nand: invert device ready pin logic
Dear Heiko Schocher,
Quoted 13 lines · Heiko Schocher
device ready pin is signalling that the device is ready on state 1 not on 0. Simmiliar as it is in
drivers/mtd/nand/nand_spl_simple.cSigned-off-by Heiko Schocher <[email protected]>Reviewed-by Andreas Bie?mann <[email protected]>Reviewed-by Bo Shen <[email protected]>Acked-by Scott Wood <[email protected]>---
Changes in v3:
add Acked-by from Scott Wood
add Reviewed-by from Bo Shen
Quoted 5 lines
Changes in v2:
add Reviewed-by: Andreas Bie?mann <[email protected]>
drivers/mtd/nand/atmel_nand.c| 6 +++---1 file changed, 3 insertions(+), 3 deletions(-)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
PATCH v3 10/12 arm, spl, at91: add at91sam9260 and at91sam9g45 spl support
In reply to Heiko Schocheradd support for using spl code on at91sam9260 and at91sam9g45 based boards.
---
Changes in v3:
add comment from Bo shen
- fix AT91_PMC_MCKR_CSS_MASK and AT91_PMC_MCKR_PRES_MASK
- make matrix_init weak, and add it in the taurus board code
- do not introduce ifdef mess for the differences between the SoCs, instead use a seperate file for each SoC:
- for armv5 (arm926ejs, now at91 series), named it spl_at91.c,
- for armv7 (cortex-a5, now, sama5d3), named it spl_atmel.c
- move common code to arch/arm/cpu/at91-common/spl.c
Changes in v2: None
arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c | 22 ++++ arch/arm/cpu/arm926ejs/at91/clock.c | 60 ++++++++++ arch/arm/cpu/armv7/at91/clock.c | 27 +++++ arch/arm/cpu/at91-common/Makefile | 5 +- arch/arm/cpu/at91-common/sdram.c | 77 +++++++++++++ arch/arm/cpu/at91-common/spl.c | 89 +-------------- arch/arm/cpu/at91-common/spl_at91.c | 124 +++++++++++++++++++++ arch/arm/cpu/at91-common/spl_atmel.c | 76 +++++++++++++ arch/arm/include/asm/arch-at91/at91_common.h | 6 + arch/arm/include/asm/arch-at91/at91_pmc.h | 1 + arch/arm/include/asm/arch-at91/at91sam9260.h | 1 + .../arm/include/asm/arch-at91/at91sam9260_matrix.h | 5 + arch/arm/include/asm/arch-at91/at91sam9_sdramc.h | 22 +++- 13 files changed, 424 insertions(+), 91 deletions(-) create mode 100644 arch/arm/cpu/at91-common/sdram.c create mode 100644 arch/arm/cpu/at91-common/spl_at91.c create mode 100644 arch/arm/cpu/at91-common/spl_atmel.c
arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c +22 -0
@@ -8,8 +8,10 @@#include <common.h> #include <asm/io.h> +#include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> +#include <asm/arch/at91sam9_sdramc.h> #include <asm/arch/gpio.h> /*
@@ -207,3 +209,23 @@ void at91_mci_hw_init(void)#endif }#endif + +void at91_sdram_hw_init (void ) +{ +at91_set_a_periph (AT91_PIO_PORTC ,16 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,17 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,18 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,19 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,20 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,21 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,22 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,23 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,24 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,25 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,26 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,27 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,28 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,29 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,30 ,0 ); +at91_set_a_periph (AT91_PIO_PORTC ,31 ,0 ); +}
arch/arm/cpu/arm926ejs/at91/clock.c +60 -0
63 lines not on this page · raw message
arch/arm/cpu/armv7/at91/clock.c +27 -0
@@ -111,6 +111,33 @@ int at91_clock_init(unsigned long main_clock)return 0 ; } +void at91_plla_init (u32 pllar) +{ +struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC ; + +writel (pllar, &pmc->pllar); +while (!(readl (&pmc->sr) & (AT91_PMC_LOCKA |AT91_PMC_MCKRDY ))) + ; +} + +void at91_mck_init (u32 mckr) +{ +struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC ; +u32 tmp; + + tmp =readl (&pmc->mckr); + tmp &= ~(AT91_PMC_MCKR_PRES_MASK | +AT91_PMC_MCKR_MDIV_MASK | +AT91_PMC_MCKR_PLLADIV_2 ); + tmp |= mckr & (AT91_PMC_MCKR_PRES_MASK | +AT91_PMC_MCKR_MDIV_MASK | +AT91_PMC_MCKR_PLLADIV_2 ); +writel (tmp, &pmc->mckr); + +while (!(readl (&pmc->sr) &AT91_PMC_MCKRDY )) + ; +} +void at91_periph_clk_enable (int id) {struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC ;
arch/arm/cpu/at91-common/Makefile +3 -2
@@ -10,7 +10,8 @@ obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o ifneq ($(CONFIG_SPL_BUILD),) -obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o -obj-$(CONFIG_SAMA5D3) += mpddrc.o +obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o +obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o +obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o obj-y += spl.o endif
arch/arm/cpu/at91-common/sdram.c new file +77 -0
77 lines not on this page · raw message
arch/arm/cpu/at91-common/spl.c +1 -88
108 lines not on this page · raw message
arch/arm/cpu/at91-common/spl_at91.c new file +124 -0
124 lines not on this page · raw message
arch/arm/cpu/at91-common/spl_atmel.c new file +76 -0
76 lines not on this page · raw message
arch/arm/include/asm/arch-at91/at91_common.h +6 -0
@@ -23,9 +23,15 @@ void at91_udp_hw_init(void);void at91_uhp_hw_init (void );void at91_lcd_hw_init (void );void at91_plla_init (u32 pllar); +void at91_pllb_init (u32 pllar);void at91_mck_init (u32 mckr);void at91_pmc_init (void );void mem_init (void );void at91_phy_reset (void ); +void at91_sdram_hw_init (void ); +void at91_mck_init (u32 mckr); +void at91_spl_board_init (void ); +void at91_disable_wdt (void ); +void matrix_init (void );#endif /* AT91_COMMON_H */
arch/arm/include/asm/arch-at91/at91_pmc.h +1 -0
@@ -133,6 +133,7 @@ typedef struct at91_pmc {#define AT91_PMC_MCKR_MDIV_MASK 0x00000300#endif +#define AT91_PMC_MCKR_PLLADIV_MASK 0x00003000#define AT91_PMC_MCKR_PLLADIV_1 0x00000000#define AT91_PMC_MCKR_PLLADIV_2 0x00001000
arch/arm/include/asm/arch-at91/at91sam9260.h +1 -0
@@ -95,6 +95,7 @@#define ATMEL_BASE_SDRAMC 0xffffea00#define ATMEL_BASE_SMC 0xffffec00#define ATMEL_BASE_MATRIX 0xffffee00 +#define ATMEL_BASE_CCFG 0xffffef14#define ATMEL_BASE_AIC 0xfffff000#define ATMEL_BASE_DBGU 0xfffff200#define ATMEL_BASE_PIOA 0xfffff400
arch/arm/include/asm/arch-at91/at91sam9260_matrix.h +5 -0
@@ -61,5 +61,10 @@ struct at91_matrix {#define AT91_MATRIX_DBPUC (1 << 8)#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) +#define AT91_MATRIX_EBI_IOSR_SEL (1 << 17) + +/* Maximum Number of Allowed Cycles for a Burst */ +#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) +#define AT91_MATRIX_SLOT_CYCLE_ (x) (x << 0)#endif
arch/arm/include/asm/arch-at91/at91sam9_sdramc.h +21 -1
@@ -25,6 +25,21 @@#define AT91_ASM_SDRAMC_CR (ATMEL_BASE_SDRAMC + 0x08)#define AT91_ASM_SDRAMC_MDR (ATMEL_BASE_SDRAMC + 0x24) +#else +struct sdramc_reg { +u32 mr; +u32 tr; +u32 cr; +u32 lpr; +u32 ier; +u32 idr; +u32 imr; +u32 isr; +u32 mdr; +}; + +int sdramc_initialize (unsigned int sdram_address, +const struct sdramc_reg *p);#endif /* SDRAM Controller (SDRAMC) registers */
@@ -62,11 +77,17 @@#define AT91_SDRAMC_DBW_32 (0 << 7)#define AT91_SDRAMC_DBW_16 (1 << 7)#define AT91_SDRAMC_TWR (0xf << 8)/* Write Recovery Delay */ +#define AT91_SDRAMC_TWR_VAL (x) (x << 8)#define AT91_SDRAMC_TRC (0xf << 12)/* Row Cycle Delay */ +#define AT91_SDRAMC_TRC_VAL (x) (x << 12)#define AT91_SDRAMC_TRP (0xf << 16)/* Row Precharge Delay */ +#define AT91_SDRAMC_TRP_VAL (x) (x << 16)#define AT91_SDRAMC_TRCD (0xf << 20)/* Row to Column Delay */ +#define AT91_SDRAMC_TRCD_VAL (x) (x << 20)#define AT91_SDRAMC_TRAS (0xf << 24)/* Active to Precharge Delay */ +#define AT91_SDRAMC_TRAS_VAL (x) (x << 24)#define AT91_SDRAMC_TXSR (0xf << 28)/* Exit Self Refresh to Active Delay */ +#define AT91_SDRAMC_TXSR_VAL (x) (x << 28)#define AT91_SDRAMC_LPR (ATMEL_BASE_SDRAMC + 0x10)/* SDRAM Controller Low Power Register */ #define AT91_SDRAMC_LPCB (3 << 0)/* Low-power Configurations */
@@ -93,5 +114,4 @@#define AT91_SDRAMC_MD_SDRAM 0#define AT91_SDRAMC_MD_LOW_POWER_SDRAM 1 -#endif
Signature · 1 line
1.8.3.1
PATCH v3 10/12 arm, spl, at91: add at91sam9260 and at91sam9g45 spl support
Quoted 5 lines · Heiko Schocher
add support for using spl code on at91sam9260 and at91sam9g45 based boards.
Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Bo Shen <[email protected]>
Quoted 32 lines
---
Changes in v3:
add comment from Bo shen
- fixAT91_PMC_MCKR_CSS_MASKandAT91_PMC_MCKR_PRES_MASK
- makematrix_initweak, and add it in the taurus board code
- do not introduce ifdef mess for the differences between the SoCs, instead use a seperate file for each SoC:
- for armv5 (arm926ejs, now at91 series), named itspl_at91.c,
- for armv7 (cortex-a5, now, sama5d3), named itspl_atmel.c
- move common code toarch/arm/cpu/at91-common/spl.cChanges in v2: None
arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c | 22 ++++ arch/arm/cpu/arm926ejs/at91/clock.c | 60 ++++++++++ arch/arm/cpu/armv7/at91/clock.c | 27 +++++ arch/arm/cpu/at91-common/Makefile | 5 +- arch/arm/cpu/at91-common/sdram.c | 77 +++++++++++++ arch/arm/cpu/at91-common/spl.c | 89 +-------------- arch/arm/cpu/at91-common/spl_at91.c | 124 +++++++++++++++++++++ arch/arm/cpu/at91-common/spl_atmel.c | 76 +++++++++++++ arch/arm/include/asm/arch-at91/at91_common.h | 6 + arch/arm/include/asm/arch-at91/at91_pmc.h | 1 + arch/arm/include/asm/arch-at91/at91sam9260.h | 1 + .../arm/include/asm/arch-at91/at91sam9260_matrix.h | 5 + arch/arm/include/asm/arch-at91/at91sam9_sdramc.h | 22 +++- 13 files changed, 424 insertions(+), 91 deletions(-) create mode 100644 arch/arm/cpu/at91-common/sdram.c create mode 100644 arch/arm/cpu/at91-common/spl_at91.c create mode 100644 arch/arm/cpu/at91-common/spl_atmel.c
PATCH v3 10/12 arm, spl, at91: add at91sam9260 and at91sam9g45 spl support
In reply to Heiko SchocherDear Heiko Schocher,
Quoted 36 lines · Heiko Schocher
add support for using spl code on at91sam9260 and at91sam9g45 based boards.
Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Bo Shen <[email protected]>Reviewed-by Andreas Bie?mann <[email protected]>[adopt Bo's change in spl.c]Signed-off-by Andreas Bie?mann <[email protected]>---
Changes in v3:
add comment from Bo shen
- fixAT91_PMC_MCKR_CSS_MASKandAT91_PMC_MCKR_PRES_MASK
- makematrix_initweak, and add it in the taurus board code
- do not introduce ifdef mess for the differences between the SoCs, instead use a seperate file for each SoC:
- for armv5 (arm926ejs, now at91 series), named itspl_at91.c,
- for armv7 (cortex-a5, now, sama5d3), named itspl_atmel.c
- move common code toarch/arm/cpu/at91-common/spl.cChanges in v2: None
arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c | 22 ++++ arch/arm/cpu/arm926ejs/at91/clock.c | 60 ++++++++++ arch/arm/cpu/armv7/at91/clock.c | 27 +++++ arch/arm/cpu/at91-common/Makefile | 5 +- arch/arm/cpu/at91-common/sdram.c | 77 +++++++++++++ arch/arm/cpu/at91-common/spl.c | 89 +-------------- arch/arm/cpu/at91-common/spl_at91.c | 124 +++++++++++++++++++++ arch/arm/cpu/at91-common/spl_atmel.c | 76 +++++++++++++ arch/arm/include/asm/arch-at91/at91_common.h | 6 + arch/arm/include/asm/arch-at91/at91_pmc.h | 1 + arch/arm/include/asm/arch-at91/at91sam9260.h | 1 + .../arm/include/asm/arch-at91/at91sam9260_matrix.h | 5 + arch/arm/include/asm/arch-at91/at91sam9_sdramc.h | 22 +++- 13 files changed, 424 insertions(+), 91 deletions(-)
Quoted 3 lines
create mode 100644
arch/arm/cpu/at91-common/sdram.ccreate mode 100644arch/arm/cpu/at91-common/spl_at91.ccreate mode 100644arch/arm/cpu/at91-common/spl_atmel.c
applied with little changes to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
PATCH v3 11/12 arm, at91, spl: add spl support for the taurus board
In reply to Heiko Schocherreplaces the at91bootstrap code with SPL code.
make the spl image with:./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin
this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader.
---
Changes in v3:
add comment from Bo Shen:
- make matrix_init weak, and add it in taurs board code
- add Reviewed-by from Bo Shen
Changes in v2:
- rename function "nand_erase_one" to "spl_nand_erase_one" as Scott Wood suggested
arch/arm/Kconfig | 1 + board/siemens/taurus/taurus.c | 82 +++++++++++++++++++++++++++++++++++++------ configs/taurus_defconfig | 5 +-- include/configs/taurus.h | 52 ++++++++++++++++++++++++++- 4 files changed, 127 insertions(+), 13 deletions(-)
arch/arm/Kconfig +1 -0
@@ -210,6 +210,7 @@ config TARGET_CORVUS select CPU_ARM926EJS config TARGET_TAURUS + select SUPPORT_SPL bool "Support taurus" select CPU_ARM926EJS
board/siemens/taurus/taurus.c +72 -10
119 lines not on this page · raw message
configs/taurus_defconfig +3 -2
@@ -1,3 +1,4 @@ +CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS" -CONFIG_ARM=y -CONFIG_TARGET_TAURUS=y ++S:CONFIG_ARM=y ++S:CONFIG_TARGET_TAURUS=y
include/configs/taurus.h +51 -1
62 lines not on this page · raw message
Signature · 1 line
1.8.3.1
PATCH v3 11/12 arm, at91, spl: add spl support for the taurus board
Dear Heiko Schocher,
Quoted 21 lines · Heiko Schocher
replaces the at91bootstrap code with SPL code.
make the spl image with:
./tools/mkimage-T atmelimage -d spl/u-boot-spl.bin spl/boot.binthis writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader.
Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Bo Shen <[email protected]>---
Changes in v3:
add comment from Bo Shen:
- makematrix_initweak, and add it in taurs board code
- add Reviewed-by from Bo ShenChanges in v2:
- rename function "nand_erase_one" to "spl_nand_erase_one" as Scott Wood suggested
Quoted 5 lines
arch/arm/Kconfig | 1 + board/siemens/taurus/taurus.c | 82 +++++++++++++++++++++++++++++++++++++------ configs/taurus_defconfig | 5 +-- include/configs/taurus.h | 52 ++++++++++++++++++++++++++- 4 files changed, 127 insertions(+), 13 deletions(-)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
PATCH v3 12/12 arm, spl, at91: add spl support for the corvus board
In reply to Heiko Schocherreplaces the at91bootstrap code with SPL code.
make the spl image with:./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin
this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader.
---
Changes in v3:
add Reviewed-by from Bo Shen
Changes in v2:
- rename function "nand_erase_one" to "spl_nand_erase_one" as Scott Wood suggested
- add comment from Andreas Biessmann:
rename "MPDDRC_CR_EBISHARE" to "MPDDRC_CR_DQMS_SHARED"
arch/arm/Kconfig | 1 + board/siemens/corvus/board.c | 109 ++++++++++++++++++++++++++++++++++++++----- configs/corvus_defconfig | 5 +- include/configs/corvus.h | 54 +++++++++++++++++++-- 4 files changed, 151 insertions(+), 18 deletions(-)
arch/arm/Kconfig +1 -0
@@ -206,6 +206,7 @@ config TARGET_PM9G45 select CPU_ARM926EJS config TARGET_CORVUS + select SUPPORT_SPL bool "Support corvus" select CPU_ARM926EJS
board/siemens/corvus/board.c +97 -12
141 lines not on this page · raw message
configs/corvus_defconfig +3 -2
@@ -1,3 +1,4 @@ +CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH" -CONFIG_ARM=y -CONFIG_TARGET_CORVUS=y ++S:CONFIG_ARM=y ++S:CONFIG_TARGET_CORVUS=y
include/configs/corvus.h +50 -4
77 lines not on this page · raw message
Signature · 1 line
1.8.3.1
PATCH v3 12/12 arm, spl, at91: add spl support for the corvus board
Quoted 9 lines · Heiko Schocher
replaces the at91bootstrap code with SPL code.
make the spl image with:./tools/mkimage-T atmelimage -d spl/u-boot-spl.bin spl/boot.binthis writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader.
Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Bo Shen <[email protected]>
Quoted 17 lines
---
Changes in v3:
add Reviewed-by from Bo ShenChanges in v2:
- rename function "nand_erase_one" to "spl_nand_erase_one" as Scott Wood suggested
- add comment from Andreas Biessmann:
rename "MPDDRC_CR_EBISHARE" to "MPDDRC_CR_DQMS_SHARED"arch/arm/Kconfig | 1 + board/siemens/corvus/board.c | 109 ++++++++++++++++++++++++++++++++++++++----- configs/corvus_defconfig | 5 +- include/configs/corvus.h | 54 +++++++++++++++++++-- 4 files changed, 151 insertions(+), 18 deletions(-)
PATCH v3 12/12 arm, spl, at91: add spl support for the corvus board
In reply to Heiko SchocherDear Heiko Schocher,
Quoted 19 lines · Heiko Schocher
replaces the at91bootstrap code with SPL code.
make the spl image with:./tools/mkimage-T atmelimage -d spl/u-boot-spl.bin spl/boot.binthis writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader.
Signed-off-by Heiko Schocher <[email protected]>Reviewed-by Bo Shen <[email protected]>Reviewed-by Andreas Bie?mann <[email protected]>---
Changes in v3:
add Reviewed-by from Bo ShenChanges in v2:
- rename function "nand_erase_one" to "spl_nand_erase_one" as Scott Wood suggested
- add comment from Andreas Biessmann:
Quoted 7 lines
rename "MPDDRC_CR_EBISHARE" to "MPDDRC_CR_DQMS_SHARED"arch/arm/Kconfig | 1 + board/siemens/corvus/board.c | 109 ++++++++++++++++++++++++++++++++++++++----- configs/corvus_defconfig | 5 +- include/configs/corvus.h | 54 +++++++++++++++++++-- 4 files changed, 151 insertions(+), 18 deletions(-)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
v3 cover arm, at91, spl: add spl support for the taurus and corvus boards
In reply to Heiko SchocherHi Heiko,
Quoted 40 lines · Heiko Schocher
This patchset add SPL support for the AT91SAM9G20 based taurus board, and the AT91SAM9M10G45 based corvus board from siemens, and replaces the at91bootstrap code.
The boot.bin which replaces the at91bootstrap image can created with mkimage:
./tools/mkimage-T atmelimage -d spl/u-boot-spl.bin spl/boot.binFor other SoC this step is done in one step ... should we add this also for AT91 based boards?
For example add a "u-boot.at91" target in the
Makefile?This patchset is based on the common updates for the taurus and corvus board:
Patchwork [U-Boot] arm, at91: add generic board support for the taurus and corvus board
http://patchwork.ozlabs.org/patch/395398/
(now in mainline)Patchwork [U-Boot] arm, at91: add spi dataflash support for the taurus board
http://patchwork.ozlabs.org/patch/395400/Changes in v3:
rebased against571bdf16a78e9e116a93d46f4809c4f8a3f2adb6
add Reviewed-by from Bo Shen
add Acked-by from Scott Wood
add comment from Bo shen
- ignore 80 characters length as Bo Shen and Adreas Biessmann suggested
- fixAT91_PMC_MCKR_CSS_MASKandAT91_PMC_MCKR_PRES_MASK
- makematrix_initweak, and add it in the taurus board code
- do not introduce ifdef mess for the differences between the SoCs, instead use a seperate file for each SoC:
- for armv5 (arm926ejs, now at91 series), named itspl_at91.c,
- for armv7 (cortex-a5, now, sama5d3), named itspl_atmel.c
- move common code toarch/arm/cpu/at91-common/spl.c
Quoted 14 lines
Changes in v2:
- rebased againstd58a9451e7339ed4cf2b2627e534611f427fb791
- spi, atmel: moveCONFIG_SYS_SPI_WRITE_TOUTinto common header new in v2
- add comment from Jagan Teki:
- removespi_init_f()from board file
- removeCONFIG_SYS_SPI_WRITE_TOUTfrom board config file instead define a default in the spi driver -> new patch for v2
- add Reviewed-by: Andreas Bie?mann <[email protected]>
- add comment from Andreas Biessmann:
rename "MPDDRC_CR_EBISHARE" to "MPDDRC_CR_DQMS_SHARED"
- add comment from scott wood:
movenand_erase_oneinto "include/nand.h" and rename it tospl_nand_erase_one
for me this series looks good. Lets wait for Jagan's Ok for '[v3 PATCH 02/12] arm, at91: add spi dataflash support for the taurus board', then I'll apply it this weekend or so.
Best regards
Andreas Bie?mann
v3 cover arm, at91, spl: add spl support for the taurus and corvus boards
Hello Andreas,
Am 06.11.2014 01:24, schrieb Andreas Bie?mann:
Quoted 58 lines
Hi Heiko,
Quoted 40 lines · Heiko Schocher
This patchset add SPL support for the AT91SAM9G20 based taurus board, and the AT91SAM9M10G45 based corvus board from siemens, and replaces the at91bootstrap code.
The boot.bin which replaces the at91bootstrap image can created with mkimage:
./tools/mkimage-T atmelimage -d spl/u-boot-spl.bin spl/boot.binFor other SoC this step is done in one step ... should we add this also for AT91 based boards?
For example add a "u-boot.at91" target in the
Makefile?This patchset is based on the common updates for the taurus and corvus board:
Patchwork [U-Boot] arm, at91: add generic board support for the taurus and corvus board
http://patchwork.ozlabs.org/patch/395398/
(now in mainline)Patchwork [U-Boot] arm, at91: add spi dataflash support for the taurus board
http://patchwork.ozlabs.org/patch/395400/Changes in v3:
rebased against571bdf16a78e9e116a93d46f4809c4f8a3f2adb6
add Reviewed-by from Bo Shen
add Acked-by from Scott Wood
add comment from Bo shen
- ignore 80 characters length as Bo Shen and Adreas Biessmann suggested
- fixAT91_PMC_MCKR_CSS_MASKandAT91_PMC_MCKR_PRES_MASK
- makematrix_initweak, and add it in the taurus board code
- do not introduce ifdef mess for the differences between the SoCs, instead use a seperate file for each SoC:
- for armv5 (arm926ejs, now at91 series), named itspl_at91.c,
- for armv7 (cortex-a5, now, sama5d3), named itspl_atmel.c
- move common code toarch/arm/cpu/at91-common/spl.cQuoted 14 lines
Changes in v2:
- rebased againstd58a9451e7339ed4cf2b2627e534611f427fb791
- spi, atmel: moveCONFIG_SYS_SPI_WRITE_TOUTinto common header new in v2
- add comment from Jagan Teki:
- removespi_init_f()from board file
- removeCONFIG_SYS_SPI_WRITE_TOUTfrom board config file instead define a default in the spi driver -> new patch for v2
- add Reviewed-by: Andreas Bie?mann<[email protected]>
- add comment from Andreas Biessmann:
rename "MPDDRC_CR_EBISHARE" to "MPDDRC_CR_DQMS_SHARED"
- add comment from scott wood:
movenand_erase_oneinto "include/nand.h" and rename it tospl_nand_erase_one
Quoted 3 lines
for me this series looks good. Lets wait for Jagan's Ok for '[v3 PATCH 02/12] arm, at91: add spi dataflash support for the taurus board', then I'll apply it this weekend or so.
Thanks for this info!
bye,
Heiko
Signature · 2 lines
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