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Make Armada 375 use the reference clock when possible

PATCH Superseded Ezequiel Garcia 4 participants 15 messages Oct 25, 2014 – Nov 3, 2014

Subsystems (3)

v2 of 3 Superseded Latest is v3 →

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#0 lore raw

v2 cover Make Armada 375 use the reference clock when possible

Changes from v1:

* Make the A375 timer and watchdog devicetree binding match the hardware and require the two available clocks: core and reference clock.

This series adds support for the 25 MHz reference clock available on Armada 375 SoC to be used on the timer and watchdog drivers. It is similar to the one present in Armada XP SoC.

Given we initially had access to only a very early SoC revision (A375 Z1) and due to a hardware issue, the timer and watchdog support was originally submitted to use the core clock.

Now that the A0 SoC revision is out, we can fix this and use the reference clock. The reason for this change is that the core clock is subject to the SSCG (Spread Spectrum Clock Generator), so boards where SSCG is enabled exhibit a very large timer drift.

Notice that this change will produce unpleseant results on A375 Z1, given the reference 25 MHz clock doesn't work properly on that SoC revision.

But since the Z1 revision is not supported by the recently submitted A375 network driver (mvpp2), and therefore nobody is expected to run mainline (if there are users at all of this early revision), the support might be dropped entirely in a near future.

To prevent any compatibility issues when booting with an older devicetree, this series provides proper fall backs in each case.

The series applies on v3.18-rc1.

Ezequiel Garcia (4):
clocksource: armada-370-xp: Add missing clock enable
watchdog: orion: Use the reference clock on Armada 375 SoC
clocksource: armada-370-xp: Use the reference clock on A375 SoC
ARM: mvebu: Enable the reference clock for timer and watchdog on
Armada 375 SoC

 .../bindings/timer/marvell,armada-370-xp-timer.txt |  9 +++--
 .../devicetree/bindings/watchdog/marvel.txt        | 13 +++++++
 arch/arm/boot/dts/armada-375.dtsi                  | 12 +++++--
 drivers/clocksource/time-armada-370-xp.c           | 30 ++++++++++++++++
 drivers/watchdog/orion_wdt.c                       | 40 +++++++++++++++++++++-
 5 files changed, 98 insertions(+), 6 deletions(-)
Signature · 1 line
2.1.0
#1 lore raw

PATCH v2 1/4 clocksource: armada-370-xp: Add missing clock enable

This commit makes sure the timer clock is prepared and enabled before retrieving its rate.

---
 drivers/clocksource/time-armada-370-xp.c | 2 ++
 1 file changed, 2 insertions(+)
drivers/clocksource/time-armada-370-xp.c +2 -0
index 0451e62..d8555f9 100644
@@ -293,6 +293,7 @@ static void __init armada_xp_timer_init(struct device_node *np)
 
 	/* The 25Mhz fixed clock is mandatory, and must always be available */
 	BUG_ON(IS_ERR(clk));
+	clk_prepare_enable(clk);
 	timer_clk = clk_get_rate(clk);
 
 	armada_370_xp_timer_common_init(np);
@@ -305,6 +306,7 @@ static void __init armada_370_timer_init(struct device_node *np)
 	struct clk *clk = of_clk_get(np, 0);
 
 	BUG_ON(IS_ERR(clk));
+	clk_prepare_enable(clk);
 	timer_clk = clk_get_rate(clk) / TIMER_DIVIDER;
 	timer25Mhz = false;
 
Signature · 1 line
2.1.0
#2 lore raw

PATCH v2 1/4 clocksource: armada-370-xp: Add missing clock enable

Daniel,

Quoted 9 lines · Ezequiel Garcia

This commit makes sure the timer clock is prepared and enabled before retrieving its rate.

---
 drivers/clocksource/time-armada-370-xp.c | 2 ++
 1 file changed, 2 insertions(+)

thx,

Jason.

#3 lore raw

PATCH v2 2/4 watchdog: orion: Use the reference clock on Armada 375 SoC

In reply to Ezequiel Garcia

The 25 MHz reference clock has better stability so its use is preferred over the core clock. Change the Armada 375 clock initialization to use this reference clock. To ensure the driver is compatible with an old devicetree, also provide a fallback path which will silently return to the previous behavior.

While here, add the clock specification to the binding documentation.

---
 .../devicetree/bindings/watchdog/marvel.txt        | 13 +++++++
 drivers/watchdog/orion_wdt.c                       | 40 +++++++++++++++++++++-
 2 files changed, 52 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/watchdog/marvel.txt +13 -0
index 97223fd..858ed92 100644
@@ -17,6 +17,18 @@ For "marvell,armada-375-wdt" and "marvell,armada-380-wdt":
 - reg		: A third entry is mandatory and should contain the
                   shared mask/unmask RSTOUT address.
 
+Clocks required for compatibles = "marvell,orion-wdt",
+				  "marvell,armada-370-wdt":
+- clocks : Must contain a single entry describing the clock input
+
+Clocks required for compatibles = "marvell,armada-xp-wdt"
+				  "marvell,armada-375-wdt"
+				  "marvell,armada-380-wdt":
+- clocks : Must contain an entry for each entry in clock-names.
+- clock-names : Must include the following entries:
+  "nbclk" (L2/coherency fabric clock),
+  "fixed" (Reference 25 MHz fixed-clock).
+
 Optional properties:
 
 - interrupts	: Contains the IRQ for watchdog expiration
@@ -30,4 +42,5 @@ Example:
 		interrupts = <3>;
 		timeout-sec = <10>;
 		status = "okay";
+		clocks = <&gate_clk 7>;
 	};
drivers/watchdog/orion_wdt.c +39 -1
index 00d0741..6452fa2 100644
@@ -114,6 +114,44 @@ static int armada370_wdt_clock_init(struct platform_device *pdev,
 	return 0;
 }
 
+static int armada375_wdt_clock_init(struct platform_device *pdev,
+				    struct orion_watchdog *dev)
+{
+	int ret;
+
+	dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
+	if (!IS_ERR(dev->clk)) {
+
+		ret = clk_prepare_enable(dev->clk);
+		if (ret) {
+			clk_put(dev->clk);
+			return ret;
+		}
+
+		atomic_io_modify(dev->reg + TIMER_CTRL,
+				WDT_AXP_FIXED_ENABLE_BIT,
+				WDT_AXP_FIXED_ENABLE_BIT);
+		dev->clk_rate = clk_get_rate(dev->clk);
+		return 0;
+	}
+
+	/* Mandatory fallback for proper devicetree backward compatibility */
+	dev->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(dev->clk))
+		return PTR_ERR(dev->clk);
+	ret = clk_prepare_enable(dev->clk);
+	if (ret) {
+		clk_put(dev->clk);
+		return ret;
+	}
+
+	atomic_io_modify(dev->reg + TIMER_CTRL,
+			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
+			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
+	dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
+	return 0;
+}
+
 static int armadaxp_wdt_clock_init(struct platform_device *pdev,
 				   struct orion_watchdog *dev)
 {
@@ -394,7 +432,7 @@ static const struct orion_watchdog_data armada375_data = {
 	.rstout_mask_bit = BIT(10),
 	.wdt_enable_bit = BIT(8),
 	.wdt_counter_offset = 0x34,
-	.clock_init = armada370_wdt_clock_init,
+	.clock_init = armada375_wdt_clock_init,
 	.enabled = armada375_enabled,
 	.start = armada375_start,
 	.stop = armada375_stop,
Signature · 1 line
2.1.0
#4 lore raw

PATCH v2 2/4 watchdog: orion: Use the reference clock on Armada 375 SoC

Dear Ezequiel Garcia,

It's really nitpicking, but I find the usage of empty newlines rather unfortunate in the below function.

drivers/watchdog/orion_wdt.c static int armada370_wdt_clock_init(struct platform_device *pdev, · line 124

Quoted 8 lines · Ezequiel Garcia
drivers/watchdog/orion_wdt.c +8 -0
+static int armada375_wdt_clock_init(struct platform_device *pdev,
+				    struct orion_watchdog *dev)
+{
+	int ret;
+
+	dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
+	if (!IS_ERR(dev->clk)) {
+

This empty new line seems not needed.

drivers/watchdog/orion_wdt.c static int armada370_wdt_clock_init(struct platform_device *pdev, · line 135

Quoted 11 lines
drivers/watchdog/orion_wdt.c +11 -0
+		ret = clk_prepare_enable(dev->clk);
+		if (ret) {
+			clk_put(dev->clk);
+			return ret;
+		}
+
+		atomic_io_modify(dev->reg + TIMER_CTRL,
+				WDT_AXP_FIXED_ENABLE_BIT,
+				WDT_AXP_FIXED_ENABLE_BIT);
+		dev->clk_rate = clk_get_rate(dev->clk);
+		return 0;

But one empty new line before the return would be good.

drivers/watchdog/orion_wdt.c static int armada370_wdt_clock_init(struct platform_device *pdev, · line 141

Quoted 6 lines
drivers/watchdog/orion_wdt.c +6 -0
+	}
+
+	/* Mandatory fallback for proper devicetree backward compatibility */
+	dev->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(dev->clk))
+		return PTR_ERR(dev->clk);

An empty newline would be good here as well.

drivers/watchdog/orion_wdt.c static int armada370_wdt_clock_init(struct platform_device *pdev, · line 151

Quoted 10 lines
drivers/watchdog/orion_wdt.c +10 -0
+	ret = clk_prepare_enable(dev->clk);
+	if (ret) {
+		clk_put(dev->clk);
+		return ret;
+	}
+
+	atomic_io_modify(dev->reg + TIMER_CTRL,
+			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
+			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
+	dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;

And here.

With this fixed:

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
#5 lore raw

PATCH v2 2/4 watchdog: orion: Use the reference clock on Armada 375 SoC

Ezequiel, Wim,

Quoted 4 lines · Thomas Petazzoni

Dear Ezequiel Garcia,

It's really nitpicking, but I find the usage of empty newlines rather unfortunate in the below function.

oops, I thought this was against patch #3. Ezequiel, please feel free to add my Ack once these changes are made.

thx,

Jason.

Quoted 56 lines · Ezequiel Garcia

drivers/watchdog/orion_wdt.c static int armada370_wdt_clock_init(struct platform_device *pdev, · line 124

Quoted 9 lines
drivers/watchdog/orion_wdt.c +8 -0
+static int armada375_wdt_clock_init(struct platform_device *pdev,
+				    struct orion_watchdog *dev)
+{
+	int ret;
+
+	dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
+	if (!IS_ERR(dev->clk)) {
+

This empty new line seems not needed.

drivers/watchdog/orion_wdt.c static int armada370_wdt_clock_init(struct platform_device *pdev, · line 135

Quoted 11 lines
drivers/watchdog/orion_wdt.c +11 -0
+		ret = clk_prepare_enable(dev->clk);
+		if (ret) {
+			clk_put(dev->clk);
+			return ret;
+		}
+
+		atomic_io_modify(dev->reg + TIMER_CTRL,
+				WDT_AXP_FIXED_ENABLE_BIT,
+				WDT_AXP_FIXED_ENABLE_BIT);
+		dev->clk_rate = clk_get_rate(dev->clk);
+		return 0;

But one empty new line before the return would be good.

drivers/watchdog/orion_wdt.c static int armada370_wdt_clock_init(struct platform_device *pdev, · line 141

Quoted 6 lines
drivers/watchdog/orion_wdt.c +6 -0
+	}
+
+	/* Mandatory fallback for proper devicetree backward compatibility */
+	dev->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(dev->clk))
+		return PTR_ERR(dev->clk);

An empty newline would be good here as well.

drivers/watchdog/orion_wdt.c static int armada370_wdt_clock_init(struct platform_device *pdev, · line 151

Quoted 10 lines
drivers/watchdog/orion_wdt.c +10 -0
+	ret = clk_prepare_enable(dev->clk);
+	if (ret) {
+		clk_put(dev->clk);
+		return ret;
+	}
+
+	atomic_io_modify(dev->reg + TIMER_CTRL,
+			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
+			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
+	dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;

And here.

With this fixed:

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
#6 lore raw

PATCH v2 2/4 watchdog: orion: Use the reference clock on Armada 375 SoC

In reply to Ezequiel Garcia

Wim,

Quoted 5 lines · Ezequiel Garcia

The 25 MHz reference clock has better stability so its use is preferred over the core clock. Change the Armada 375 clock initialization to use this reference clock. To ensure the driver is compatible with an old devicetree, also provide a fallback path which will silently return to the previous behavior.

Quoted 7 lines

While here, add the clock specification to the binding documentation.

---
 .../devicetree/bindings/watchdog/marvel.txt        | 13 +++++++
 drivers/watchdog/orion_wdt.c                       | 40 +++++++++++++++++++++-
 2 files changed, 52 insertions(+), 1 deletion(-)

thx,

Jason.

#7 lore raw

PATCH v2 3/4 clocksource: armada-370-xp: Use the reference clock on A375 SoC

In reply to Ezequiel Garcia

The 25 MHz reference clock has better stability so its use is preferred over the core clock.

This commit takes advantage of the already introduced Armada 375 devicetree compatible string and adds a new timer initialization. If available, the timer will use the reference clock (named as 'fixed'). Otherwise, it falls back to the previous behavior.

---
 .../bindings/timer/marvell,armada-370-xp-timer.txt |  9 ++++---
 drivers/clocksource/time-armada-370-xp.c           | 28 ++++++++++++++++++++++
 2 files changed, 34 insertions(+), 3 deletions(-)
Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt +6 -3
index f455182..e9c78ce 100644
@@ -2,8 +2,10 @@ Marvell Armada 370 and Armada XP Timers
 ---------------------------------------
 
 Required properties:
-- compatible: Should be either "marvell,armada-370-timer" or
-  "marvell,armada-xp-timer" as appropriate.
+- compatible: Should be one of the following
+              "marvell,armada-370-timer",
+	      "marvell,armada-375-timer",
+	      "marvell,armada-xp-timer".
 - interrupts: Should contain the list of Global Timer interrupts and
   then local timer interrupts
 - reg: Should contain location and length for timers register. First
@@ -13,7 +15,8 @@ Required properties:
 Clocks required for compatible = "marvell,armada-370-timer":
 - clocks : Must contain a single entry describing the clock input
 
-Clocks required for compatible = "marvell,armada-xp-timer":
+Clocks required for compatibles = "marvell,armada-xp-timer",
+				  "marvell,armada-375-timer":
 - clocks : Must contain an entry for each entry in clock-names.
 - clock-names : Must include the following entries:
   "nbclk" (L2/coherency fabric clock),
drivers/clocksource/time-armada-370-xp.c +28 -0
index d8555f9..3a0704b 100644
@@ -301,6 +301,34 @@ static void __init armada_xp_timer_init(struct device_node *np)
 CLOCKSOURCE_OF_DECLARE(armada_xp, "marvell,armada-xp-timer",
 		       armada_xp_timer_init);
 
+static void __init armada_375_timer_init(struct device_node *np)
+{
+	struct clk *clk;
+
+	clk = of_clk_get_by_name(np, "fixed");
+	if (!IS_ERR(clk)) {
+		clk_prepare_enable(clk);
+		timer_clk = clk_get_rate(clk);
+	} else {
+
+		/*
+		 * This fallback is required in order to retain proper
+		 * devicetree backwards compatibility.
+		 */
+		clk = of_clk_get(np, 0);
+
+		/* Must have at least a clock */
+		BUG_ON(IS_ERR(clk));
+		clk_prepare_enable(clk);
+		timer_clk = clk_get_rate(clk) / TIMER_DIVIDER;
+		timer25Mhz = false;
+	}
+
+	armada_370_xp_timer_common_init(np);
+}
+CLOCKSOURCE_OF_DECLARE(armada_375, "marvell,armada-375-timer",
+		       armada_375_timer_init);
+
 static void __init armada_370_timer_init(struct device_node *np)
 {
 	struct clk *clk = of_clk_get(np, 0);
Signature · 1 line
2.1.0
#8 lore raw

PATCH v2 3/4 clocksource: armada-370-xp: Use the reference clock on A375 SoC

Dear Ezequiel Garcia,

Quoted 8 lines · Ezequiel Garcia

The 25 MHz reference clock has better stability so its use is preferred over the core clock.

This commit takes advantage of the already introduced Armada 375 devicetree compatible string and adds a new timer initialization. If available, the timer will use the reference clock (named as 'fixed'). Otherwise, it falls back to the previous behavior.

Quoted 5 lines
---
 .../bindings/timer/marvell,armada-370-xp-timer.txt |  9 ++++---
 drivers/clocksource/time-armada-370-xp.c           | 28 ++++++++++++++++++++++
 2 files changed, 34 insertions(+), 3 deletions(-)

Thanks,

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
#9 lore raw

PATCH v2 3/4 clocksource: armada-370-xp: Use the reference clock on A375 SoC

In reply to Ezequiel Garcia

Daniel,

Quoted 8 lines · Ezequiel Garcia

The 25 MHz reference clock has better stability so its use is preferred over the core clock.

This commit takes advantage of the already introduced Armada 375 devicetree compatible string and adds a new timer initialization. If available, the timer will use the reference clock (named as 'fixed'). Otherwise, it falls back to the previous behavior.

Quoted 5 lines
---
 .../bindings/timer/marvell,armada-370-xp-timer.txt |  9 ++++---
 drivers/clocksource/time-armada-370-xp.c           | 28 ++++++++++++++++++++++
 2 files changed, 34 insertions(+), 3 deletions(-)

thx,

Jason.

#10 lore raw

PATCH v2 3/4 clocksource: armada-370-xp: Use the reference clock on A375 SoC

In reply to Ezequiel Garcia

Hi Ezequiel,

Quoted 8 lines · Ezequiel Garcia

The 25 MHz reference clock has better stability so its use is preferred over the core clock.

This commit takes advantage of the already introduced Armada 375 devicetree compatible string and adds a new timer initialization. If available, the timer will use the reference clock (named as 'fixed'). Otherwise, it falls back to the previous behavior.

Quoted 6 lines
---
 .../bindings/timer/marvell,armada-370-xp-timer.txt |  9 ++++---
 drivers/clocksource/time-armada-370-xp.c           | 28 ++++++++++++++++++++++
 2 files changed, 34 insertions(+), 3 deletions(-)

Thanks,

Gregory

Signature · 4 lines
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#11 lore raw

PATCH v2 4/4 ARM: mvebu: Enable the reference clock for timer and watchdog on Armada 375 SoC

In reply to Ezequiel Garcia

Now that the timer and watchdog drivers support the Armada 375 usage of the reference clock, we can enable it in the devicetree.

---
 arch/arm/boot/dts/armada-375.dtsi | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)
arch/arm/boot/dts/armada-375.dtsi +10 -2
index de65714..9721e55 100644
@@ -36,6 +36,12 @@
 			#clock-cells = <0>;
 			clock-frequency = <2000000000>;
 		};
+		/* 25 MHz reference crystal */
+		refclk: oscillator {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <25000000>;
+		};
 	};
 
 	cpus {
@@ -366,13 +372,15 @@
 						      <&gic  GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 						      <&mpic 5>,
 						      <&mpic 6>;
-				clocks = <&coreclk 0>;
+				clocks = <&coreclk 0>, <&refclk>;
+				clock-names = "nbclk", "fixed";
 			};
 
 			watchdog at 20300 {
 				compatible = "marvell,armada-375-wdt";
 				reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>;
-				clocks = <&coreclk 0>;
+				clocks = <&coreclk 0>, <&refclk>;
+				clock-names = "nbclk", "fixed";
 			};
 
 			cpurst at 20800 {
Signature · 1 line
2.1.0
#12 lore raw

PATCH v2 4/4 ARM: mvebu: Enable the reference clock for timer and watchdog on Armada 375 SoC

Dear Ezequiel Garcia,

Quoted 7 lines · Ezequiel Garcia

Now that the timer and watchdog drivers support the Armada 375 usage of the reference clock, we can enable it in the devicetree.

---
 arch/arm/boot/dts/armada-375.dtsi | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
#13 lore raw

PATCH v2 4/4 ARM: mvebu: Enable the reference clock for timer and watchdog on Armada 375 SoC

In reply to Ezequiel Garcia
Quoted 7 lines · Ezequiel Garcia

Now that the timer and watchdog drivers support the Armada 375 usage of the reference clock, we can enable it in the devicetree.

---
 arch/arm/boot/dts/armada-375.dtsi | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

Applied to mvebu/dt with a Reviewed-by and a Tested-by from Thomas.

thx,

Jason.

#14 lore raw

v2 cover Make Armada 375 use the reference clock when possible

In reply to Ezequiel Garcia

Dear Ezequiel Garcia,

Quoted 7 lines · Ezequiel Garcia

Ezequiel Garcia (4):
clocksource: armada-370-xp: Add missing clock enable
watchdog: orion: Use the reference clock on Armada 375 SoC
clocksource: armada-370-xp: Use the reference clock on A375 SoC
ARM: mvebu: Enable the reference clock for timer and watchdog on
Armada 375 SoC

Quoted 6 lines
 .../bindings/timer/marvell,armada-370-xp-timer.txt |  9 +++--
 .../devicetree/bindings/watchdog/marvel.txt        | 13 +++++++
 arch/arm/boot/dts/armada-375.dtsi                  | 12 +++++--
 drivers/clocksource/time-armada-370-xp.c           | 30 ++++++++++++++++
 drivers/watchdog/orion_wdt.c                       | 40 +++++++++++++++++++++-
 5 files changed, 98 insertions(+), 6 deletions(-)

For the entire series:

I've tested on an Armada 375 A0 platform. Before this series, due to the SSCG, I had a lot of drift in the system time. With this series, the platform now uses the 25 Mhz timer not affected by the SSCG, and I'm no longer experiencing any drift.

Thanks!

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com