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ARM: zynq: Add OCM controller driver

PATCH In review Michal Simek 3 participants 4 messages Oct 6, 2014 – Nov 5, 2014

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Michal Simek

author
#0 lore raw

PATCH v3 1/2 ARM: zynq: Add OCM controller driver

The driver provide memory allocator which can be used by others drivers to allocate memory inside OCM. All location for 64kB blocks are supported
and driver is trying to allocate the largest continuous block of memory.

Checking mpcore addressing filterring is not done here but could be added in future.

Signed-off-by Michal Simek <[email protected]>

---

Changes in v3:
- Move OCM to drivers/soc
- Update year
- Extract DTS node to be able to apply it out of driver
- Remove generic allocator enabling
- Extract SLCR part
- Use const in of_device_id
- OCM->OCMC
- Use ocmc-1.0 compatible string

Changes in v2:
- Change compatibility string to be in xilinx format
- Fix kernel-doc format

For everybody on-chip SRAM driver "mmio-sram"
is missing parity IRQ handling not sure how to write
in generic way and also the memory layout
can be changed at run time (not currently supported by this driver)

smp-sram trampoline allocation can be used from mmio-sram and size allocated via DT but currently no reason for using it.

Creating mmio-sram node with setting at run time based on current setting is possible but it won't look good.
One way how to do it is here
"ARM: mvebu: Add quirk for i2c for the OpenBlocks AX3-4 board" (sha1: 85e618a1be2b2092318178d1d66bdad49cbbeeeb)
but creating nodes at run-time or changing compact strings will be just more hacky code.

---
 .../bindings/arm/zynq/xlnx,zynq-ocmc.txt           |  17 ++
 drivers/soc/Makefile                               |   1 +
 drivers/soc/zynq/Makefile                          |   1 +
 drivers/soc/zynq/zynq_ocmc.c                       | 246 +++++++++++++++++++++
 4 files changed, 265 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt
 create mode 100644 drivers/soc/zynq/Makefile
 create mode 100644 drivers/soc/zynq/zynq_ocmc.c
Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt new file +17 -0
new file mode 100644
index 000000000000..8ddbd1e5ffc1
@@ -0,0 +1,17 @@
+Device tree bindings for Zynq's OCM controller
+
+The OCM is divided to 4 64kB segments which can be separately configured
+to low or high location. Location is controlled via SLCR.
+
+Required properties:
+ compatible: Compatibility string. Must be "xlnx,zynq-ocmc-1.0".
+ reg: Specify the base and size of the OCMC registers in the memory map.
+      E.g.: reg = <0xf800c000 0x1000>;
+
+Example:
+ocmc: ocmc at f800c000 {
+	compatible =  "xlnx,zynq-ocmc-1.0";
+	interrupt-parent = <&intc>;
+	interrupts = <0 3 4>;
+	reg = <0xf800c000 0x1000>;
+} ;
drivers/soc/Makefile +1 -0
index 3b1b95d932d1..dbe19f721701 100644
@@ -4,3 +4,4 @@
 
 obj-$(CONFIG_ARCH_QCOM)		+= qcom/
 obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
+obj-$(CONFIG_ARCH_ZYNQ)		+= zynq/
drivers/soc/zynq/Makefile new file +1 -0
new file mode 100644
index 000000000000..7c6a5612ee66
@@ -0,0 +1 @@
+obj-y += zynq_ocmc.o
drivers/soc/zynq/zynq_ocmc.c new file +246 -0

246 lines not on this page · raw message

--
1.8.2.3

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author
#1 lore raw

PATCH v3 2/2 ARM: zynq: DT: Add OCM controller node

Add the on-chip-memory controller node to the Zynq devicetree.

Signed-off-by Michal Simek <[email protected]>

---

Changes in v3:
- Extract from OCM driver

Changes in v2: None

 arch/arm/boot/dts/zynq-7000.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm/boot/dts/zynq-7000.dtsi +7 -0
index 6cc83d4c6c76..b8e87d615635 100644
@@ -146,6 +146,13 @@
 			cache-level = <2>;
 		};
 
+		ocmc: ocmc at f800c000 {
+			compatible = "xlnx,zynq-ocmc-1.0";
+			interrupt-parent = <&intc>;
+			interrupts = <0 3 4>;
+			reg = <0xf800c000 0x1000>;
+		} ;
+
 		uart0: serial at e0000000 {
 			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
 			status = "disabled";

--
1.8.2.3

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#2 lore raw
In reply to Michal Simek
Quoted 11 lines · Michal Simek

The driver provide memory allocator which can be used by others drivers to allocate memory inside OCM. All location for 64kB blocks are supported
and driver is trying to allocate the largest continuous block of memory.

Checking mpcore addressing filterring is not done here but could be added in future.

Signed-off-by Michal Simek <[email protected]>

---

[...]

Quoted 8 lines
Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt new file +2 -0
new file mode 100644
index 000000000000..8ddbd1e5ffc1
@@ -0,0 +1,17 @@
+Device tree bindings for Zynq's OCM controller
+

Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt line 12

Quoted 10 lines
Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt new file +10 -0
+The OCM is divided to 4 64kB segments which can be separately configured
+to low or high location. Location is controlled via SLCR.
+
+Required properties:
+ compatible: Compatibility string. Must be "xlnx,zynq-ocmc-1.0".
+ reg: Specify the base and size of the OCMC registers in the memory map.
+      E.g.: reg = <0xf800c000 0x1000>;
+
+Example:
+ocmc: ocmc at f800c000 {

memory-controller at ...

Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt line 17

Quoted 5 lines
Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt new file +5 -0
+	compatible =  "xlnx,zynq-ocmc-1.0";
+	interrupt-parent = <&intc>;
+	interrupts = <0 3 4>;
+	reg = <0xf800c000 0x1000>;
+} ;

S?ren

#3 lore raw

PATCH v3 1/2 ARM: zynq: Add OCM controller driver

In reply to Michal Simek

Hi Arnd and Olof,

Quoted 43 lines · Michal Simek

The driver provide memory allocator which can be used by others drivers to allocate memory inside OCM. All location for 64kB blocks are supported
and driver is trying to allocate the largest continuous block of memory.

Checking mpcore addressing filterring is not done here but could be added in future.

Signed-off-by Michal Simek <[email protected]>

---

Changes in v3:
- Move OCM to drivers/soc
- Update year
- Extract DTS node to be able to apply it out of driver
- Remove generic allocator enabling
- Extract SLCR part
- Use const in of_device_id
- OCM->OCMC
- Use ocmc-1.0 compatible string

Changes in v2:
- Change compatibility string to be in xilinx format
- Fix kernel-doc format

For everybody on-chip SRAM driver "mmio-sram"
is missing parity IRQ handling not sure how to write
in generic way and also the memory layout
can be changed at run time (not currently supported by this driver)

smp-sram trampoline allocation can be used from mmio-sram and size allocated via DT but currently no reason for using it.

Creating mmio-sram node with setting at run time based on current setting is possible but it won't look good.
One way how to do it is here
"ARM: mvebu: Add quirk for i2c for the OpenBlocks AX3-4 board" (sha1: 85e618a1be2b2092318178d1d66bdad49cbbeeeb)
but creating nodes at run-time or changing compact strings will be just more hacky code.

Quoted 10 lines
---
 .../bindings/arm/zynq/xlnx,zynq-ocmc.txt           |  17 ++
 drivers/soc/Makefile                               |   1 +
 drivers/soc/zynq/Makefile                          |   1 +
 drivers/soc/zynq/zynq_ocmc.c                       | 246 +++++++++++++++++++++
 4 files changed, 265 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt
 create mode 100644 drivers/soc/zynq/Makefile
 create mode 100644 drivers/soc/zynq/zynq_ocmc.c

Can you please review this OCM patch?
I would like to move it when I know how I should handle that slcr connection and reserving trampoline size.

Thanks,
Michal

Signature · 14 lines
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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