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drivers: net: cpsw: Fix TX_IN_SEL offset

PATCH Applied John Ogness 3 participants 3 messages Nov 14, 2014 – Nov 16, 2014

Subsystems (3)
Networking Network drivers TI Ethernet switch driver (cpsw)
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John Ogness

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#0 lore raw

PATCH 1/1 drivers: net: cpsw: Fix TX_IN_SEL offset

The TX_IN_SEL offset for the CPSW_PORT/TX_IN_CTL register was incorrect. This caused the Dual MAC mode to never get set when it should. It also caused possible unintentional setting of a bit in the CPSW_PORT/TX_BLKS_REM register.

The purpose of setting the Dual MAC mode for this register is to:

"... allow packets from both ethernet ports to be written into
the FIFO without one port starving the other port."
- AM335x ARM TRM

Signed-off-by John Ogness <[email protected]>
---
 drivers/net/ethernet/ti/cpsw.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/net/ethernet/ti/cpsw.c +3 -3
index d879448..c560f9a 100644
@@ -129,9 +129,9 @@ do {								\
 #define CPSW_VLAN_AWARE		BIT(1)
 #define CPSW_ALE_VLAN_AWARE	1
 
-#define CPSW_FIFO_NORMAL_MODE		(0 << 15)
-#define CPSW_FIFO_DUAL_MAC_MODE		(1 << 15)
-#define CPSW_FIFO_RATE_LIMIT_MODE	(2 << 15)
+#define CPSW_FIFO_NORMAL_MODE		(0 << 16)
+#define CPSW_FIFO_DUAL_MAC_MODE		(1 << 16)
+#define CPSW_FIFO_RATE_LIMIT_MODE	(2 << 16)
 
 #define CPSW_INTPACEEN		(0x3f << 16)
 #define CPSW_INTPRESCALE_MASK	(0x7FF << 0)
Signature · 1 line
1.7.10.4
Reviewed-by on v1 1/1
#1 lore raw
Quoted 5 lines · John Ogness

The TX_IN_SEL offset for the CPSW_PORT/TX_IN_CTL register was incorrect. This caused the Dual MAC mode to never get set when it should. It also caused possible unintentional setting of a bit in the CPSW_PORT/TX_BLKS_REM register.

Quoted 7 lines

The purpose of setting the Dual MAC mode for this register is to:

"... allow packets from both ethernet ports to be written into
the FIFO without one port starving the other port."
- AM335x ARM TRM

Signed-off-by John Ogness <[email protected]>
Reviewed-by Mugunthan V N <[email protected]>

Regards
Mugunthan V N

maintainer Applied
#2 lore raw
In reply to John Ogness

From: John Ogness <[email protected]>
Date: Fri, 14 Nov 2014 15:42:52 +0100

Quoted 5 lines

The TX_IN_SEL offset for the CPSW_PORT/TX_IN_CTL register was incorrect. This caused the Dual MAC mode to never get set when it should. It also caused possible unintentional setting of a bit in the CPSW_PORT/TX_BLKS_REM register.

Quoted 7 lines

The purpose of setting the Dual MAC mode for this register is to:

"... allow packets from both ethernet ports to be written into
the FIFO without one port starving the other port."
- AM335x ARM TRM

Signed-off-by John Ogness <[email protected]>

Applied, thanks.