blackfin: rename bfin-twi_i2c driver to adi_i2c

similarity index 98%
rename from drivers/i2c/bfin-twi_i2c.c
rename to drivers/i2c/adi_i2c.c
index cfab064..cb74062 100644
@@ -1,7 +1,7 @@
 /*
- * i2c.c - driver for Blackfin on-chip TWI/I2C
+ * i2c.c - driver for ADI TWI/I2C
  *
- * Copyright (c) 2006-2010 Analog Devices Inc.
+ * Copyright (c) 2006-2014 Analog Devices Inc.
  *
  * Licensed under the GPL-2 or later.
  */

@@ -9,9 +9,8 @@
 #include <common.h>
 #include <i2c.h>
 
-#include <asm/blackfin.h>
 #include <asm/clock.h>
-#include <asm/mach-common/bits/twi.h>
+#include <asm/twi.h>
 
 /* Every register is 32bit aligned, but only 16bits in size */
 #define ureg(name) u16 name; u16 __pad_##name;

index d0828d5..f0b74d8 100644
@@ -122,7 +122,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index 20f6ed1..4df51b9 100644
@@ -134,7 +134,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index c33d035..55bfbbe 100644
@@ -131,7 +131,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index b497f26..589c7a5 100644
@@ -119,7 +119,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index 0bca53f..0e68952 100644
@@ -134,7 +134,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index 9d43b81..a3ad7ae 100644
@@ -103,7 +103,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index 3bc364c..d94c2df 100644
@@ -121,7 +121,7 @@
 /*
  * I2C settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 #define CONFIG_SYS_I2C_SPEED		50000
 #define CONFIG_SYS_I2C_SLAVE		0

index ba74a69..6c9a907 100644
@@ -142,7 +142,7 @@
 /*
  * I2C settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index 0b723cf..a6ceffa 100644
@@ -120,7 +120,7 @@
 /*
  * I2C settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 #define CONFIG_SYS_I2C_SPEED		50000
 #define CONFIG_SYS_I2C_SLAVE		0

index 29f9316..7ab644f 100644
@@ -128,7 +128,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index a655282..743e193 100644
@@ -126,7 +126,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index da5f029..6b29d08 100644
@@ -134,7 +134,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index 12192ff..f02e155 100644
@@ -81,7 +81,7 @@
 #define CONFIG_PHYLIB
 
 /* i2c Settings */
-#define CONFIG_BFIN_TWI_I2C
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C
 
 /*

index 3f24008..13e939f 100644
@@ -102,7 +102,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C
 
 

index f5351ad..3668903 100644
@@ -113,7 +113,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index 1729b44..85f5341 100644
@@ -122,7 +122,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index 272aa74..5dffd1b 100644
@@ -120,7 +120,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index 7f27eda..13ea067 100644
@@ -104,7 +104,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index 0f57e86..eb18d6d 100644
@@ -102,7 +102,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C
 
 

index 6673026..e9bff83 100644
@@ -103,7 +103,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index 9998343..caf8847 100644
@@ -122,7 +122,7 @@
 /*
  * I2C Settings
  */
-#define CONFIG_BFIN_TWI_I2C	1
+#define CONFIG_SYS_I2C_ADI
 #define CONFIG_HARD_I2C		1
 
 

index cb74062..71077c5 100644
@@ -11,6 +11,7 @@
 
 #include <asm/clock.h>
 #include <asm/twi.h>
+#include <asm/io.h>
 
 /* Every register is 32bit aligned, but only 16bits in size */
 #define ureg(name) u16 name; u16 __pad_##name;

@@ -39,7 +40,7 @@ struct twi_regs {
 #ifdef TWI_CLKDIV
 #define TWI0_CLKDIV TWI_CLKDIV
 #endif
-static volatile struct twi_regs *twi = (void *)TWI0_CLKDIV;
+static struct twi_regs *twi = (void *)TWI0_CLKDIV;
 
 #ifdef DEBUG
 # define dmemset(s, c, n) memset(s, c, n)

@@ -93,53 +94,54 @@ struct i2c_msg {
  */
 static int wait_for_completion(struct i2c_msg *msg)
 {
-	uint16_t int_stat;
+	u16 int_stat, ctl;
 	ulong timebase = get_timer(0);
 
 	do {
-		int_stat = twi->int_stat;
+		int_stat = readw(&twi->int_stat);
 
 		if (int_stat & XMTSERV) {
 			debugi("processing XMTSERV");
-			twi->int_stat = XMTSERV;
-			SSYNC();
+			writew(XMTSERV, &twi->int_stat);
 			if (msg->alen) {
-				twi->xmt_data8 = *(msg->abuf++);
+				writew(*(msg->abuf++), &twi->xmt_data8);
 				--msg->alen;
 			} else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
-				twi->xmt_data8 = *(msg->buf++);
+				writew(*(msg->buf++), &twi->xmt_data8);
 				--msg->len;
 			} else {
-				twi->master_ctl |= (msg->flags & I2C_M_COMBO) ? RSTART | MDIR : STOP;
-				SSYNC();
+				ctl = readw(&twi->master_ctl);
+				if (msg->flags & I2C_M_COMBO)
+					writew(ctl | RSTART | MDIR,
+							&twi->master_ctl);
+				else
+					writew(ctl | STOP, &twi->master_ctl);
 			}
 		}
 		if (int_stat & RCVSERV) {
 			debugi("processing RCVSERV");
-			twi->int_stat = RCVSERV;
-			SSYNC();
+			writew(RCVSERV, &twi->int_stat);
 			if (msg->len) {
-				*(msg->buf++) = twi->rcv_data8;
+				*(msg->buf++) = readw(&twi->rcv_data8);
 				--msg->len;
 			} else if (msg->flags & I2C_M_STOP) {
-				twi->master_ctl |= STOP;
-				SSYNC();
+				ctl = readw(&twi->master_ctl);
+				writew(ctl | STOP, &twi->master_ctl);
 			}
 		}
 		if (int_stat & MERR) {
 			debugi("processing MERR");
-			twi->int_stat = MERR;
-			SSYNC();
+			writew(MERR, &twi->int_stat);
 			return msg->len;
 		}
 		if (int_stat & MCOMP) {
 			debugi("processing MCOMP");
-			twi->int_stat = MCOMP;
-			SSYNC();
+			writew(MCOMP, &twi->int_stat);
 			if (msg->flags & I2C_M_COMBO && msg->len) {
-				twi->master_ctl = (twi->master_ctl & ~RSTART) |
+				ctl = readw(&twi->master_ctl);
+				ctl = (ctl & ~RSTART) |
 					(min(msg->len, 0xff) << 6) | MEN | MDIR;
-				SSYNC();
+				writew(ctl, &twi->master_ctl);
 			} else
 				break;
 		}

@@ -160,8 +162,11 @@ static int wait_for_completion(struct i2c_msg *msg)
  *	Here we just get the i2c stuff all prepped and ready, and then tail off
  *	into wait_for_completion() for all the bits to go.
  */
-static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, int len, u8 flags)
+static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
+			int len, u8 flags)
 {
+	int ret;
+	u16 ctl;
 	uchar addr_buffer[] = {
 		(addr >>  0),
 		(addr >>  8),

@@ -174,62 +179,59 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, int len,
 		.abuf  = addr_buffer,
 		.alen  = alen,
 	};
-	int ret;
 
 	dmemset(buffer, 0xff, len);
-	debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i flags=0x%02x[%s] ",
-		chip, addr, alen, buffer[0], len, flags, (flags & I2C_M_READ ? "rd" : "wr"));
+	debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i ",
+		chip, addr, alen, buffer[0], len);
+	debugi("flags=0x%02x[%s] ", flags,
+		(flags & I2C_M_READ ? "rd" : "wr"));
 
 	/* wait for things to settle */
-	while (twi->master_stat & BUSBUSY)
+	while (readw(&twi->master_stat) & BUSBUSY)
 		if (ctrlc())
 			return 1;
 
 	/* Set Transmit device address */
-	twi->master_addr = chip;
+	writew(chip, &twi->master_addr);
 
 	/* Clear the FIFO before starting things */
-	twi->fifo_ctl = XMTFLUSH | RCVFLUSH;
-	SSYNC();
-	twi->fifo_ctl = 0;
-	SSYNC();
+	writew(XMTFLUSH | RCVFLUSH, &twi->fifo_ctl);
+	writew(0, &twi->fifo_ctl);
 
 	/* prime the pump */
 	if (msg.alen) {
 		len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
 		debugi("first byte=0x%02x", *msg.abuf);
-		twi->xmt_data8 = *(msg.abuf++);
+		writew(*(msg.abuf++), &twi->xmt_data8);
 		--msg.alen;
 	} else if (!(msg.flags & I2C_M_READ) && msg.len) {
 		debugi("first byte=0x%02x", *msg.buf);
-		twi->xmt_data8 = *(msg.buf++);
+		writew(*(msg.buf++), &twi->xmt_data8);
 		--msg.len;
 	}
 
 	/* clear int stat */
-	twi->master_stat = -1;
-	twi->int_stat = -1;
-	twi->int_mask = 0;
-	SSYNC();
+	writew(-1, &twi->master_stat);
+	writew(-1, &twi->int_stat);
+	writew(0, &twi->int_mask);
 
 	/* Master enable */
-	twi->master_ctl =
-			(twi->master_ctl & FAST) |
-			(min(len, 0xff) << 6) | MEN |
-			((msg.flags & I2C_M_READ) ? MDIR : 0);
-	SSYNC();
-	debugi("CTL=0x%04x", twi->master_ctl);
+	ctl = readw(&twi->master_ctl);
+	ctl = (ctl & FAST) | (min(len, 0xff) << 6) | MEN |
+		((msg.flags & I2C_M_READ) ? MDIR : 0);
+	writew(ctl, &twi->master_ctl);
 
 	/* process the rest */
 	ret = wait_for_completion(&msg);
 	debugi("ret=%d", ret);
 
 	if (ret) {
-		twi->master_ctl &= ~MEN;
-		twi->control &= ~TWI_ENA;
-		SSYNC();
-		twi->control |= TWI_ENA;
-		SSYNC();
+		ctl = readw(&twi->master_ctl) & ~MEN;
+		writew(ctl, &twi->master_ctl);
+		ctl = readw(&twi->control) & ~TWI_ENA;
+		writew(ctl, &twi->control);
+		ctl = readw(&twi->control) | TWI_ENA;
+		writew(ctl, &twi->control);
 	}
 
 	return ret;

@@ -246,10 +248,11 @@ int i2c_set_bus_speed(unsigned int speed)
 	/* Set TWI interface clock */
 	if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN)
 		return -1;
-	twi->clkdiv = (clkdiv << 8) | (clkdiv & 0xff);
+	clkdiv = (clkdiv << 8) | (clkdiv & 0xff);
+	writew(clkdiv, &twi->clkdiv);
 
 	/* Don't turn it on */
-	twi->master_ctl = (speed > 100000 ? FAST : 0);
+	writew(speed > 100000 ? FAST : 0, &twi->master_ctl);
 
 	return 0;
 }

@@ -260,8 +263,9 @@ int i2c_set_bus_speed(unsigned int speed)
  */
 unsigned int i2c_get_bus_speed(void)
 {
+	u16 clkdiv = readw(&twi->clkdiv) & 0xff;
 	/* 10 MHz / (2 * CLKDIV) -> 5 MHz / CLKDIV */
-	return 5000000 / (twi->clkdiv & 0xff);
+	return 5000000 / clkdiv;
 }
 
 /**

@@ -277,24 +281,19 @@ void i2c_init(int speed, int slaveaddr)
 	uint8_t prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
 
 	/* Set TWI internal clock as 10MHz */
-	twi->control = prescale;
+	writew(prescale, &twi->control);
 
 	/* Set TWI interface clock as specified */
 	i2c_set_bus_speed(speed);
 
 	/* Enable it */
-	twi->control = TWI_ENA | prescale;
-	SSYNC();
+	writew(TWI_ENA | prescale, &twi->control);
 
-	debugi("CONTROL:0x%04x CLKDIV:0x%04x", twi->control, twi->clkdiv);
+	debugi("CONTROL:0x%04x CLKDIV:0x%04x", readw(&twi->control),
+		readw(&twi->clkdiv));
 
 #if CONFIG_SYS_I2C_SLAVE
 # error I2C slave support not tested/supported
-	/* If they want us as a slave, do it */
-	if (slaveaddr) {
-		twi->slave_addr = slaveaddr;
-		twi->slave_ctl = SEN;
-	}
 #endif
 }
 

@@ -320,7 +319,8 @@ int i2c_probe(uchar chip)
  */
 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 {
-	return i2c_transfer(chip, addr, alen, buffer, len, (alen ? I2C_M_COMBO : I2C_M_READ));
+	return i2c_transfer(chip, addr, alen, buffer,
+			len, (alen ? I2C_M_COMBO : I2C_M_READ));
 }
 
 /**

@@ -346,15 +346,21 @@ int i2c_set_bus_num(unsigned int bus)
 {
 	switch (bus) {
 #if CONFIG_SYS_MAX_I2C_BUS > 0
-		case 0: twi = (void *)TWI0_CLKDIV; return 0;
+	case 0:
+		twi = (void *)TWI0_CLKDIV;
+		return 0;
 #endif
 #if CONFIG_SYS_MAX_I2C_BUS > 1
-		case 1: twi = (void *)TWI1_CLKDIV; return 0;
+	case 1:
+		twi = (void *)TWI1_CLKDIV;
+		return 0;
 #endif
 #if CONFIG_SYS_MAX_I2C_BUS > 2
-		case 2: twi = (void *)TWI2_CLKDIV; return 0;
+	case 2:
+		twi = (void *)TWI2_CLKDIV;
+		return 0;
 #endif
-		default: return -1;
+	default: return -1;
 	}
 }
 

@@ -365,14 +371,17 @@ unsigned int i2c_get_bus_num(void)
 {
 	switch ((unsigned long)twi) {
 #if CONFIG_SYS_MAX_I2C_BUS > 0
-		case TWI0_CLKDIV: return 0;
+	case TWI0_CLKDIV:
+		return 0;
 #endif
 #if CONFIG_SYS_MAX_I2C_BUS > 1
-		case TWI1_CLKDIV: return 1;
+	case TWI1_CLKDIV:
+		return 1;
 #endif
 #if CONFIG_SYS_MAX_I2C_BUS > 2
-		case TWI2_CLKDIV: return 2;
+	case TWI2_CLKDIV:
+		return 2;
 #endif
-		default: return -1;
+	default: return -1;
 	}
 }

index 71077c5..20495b1 100644
@@ -13,6 +13,8 @@
 #include <asm/twi.h>
 #include <asm/io.h>
 
+static struct twi_regs *i2c_get_base(struct i2c_adapter *adap);
+
 /* Every register is 32bit aligned, but only 16bits in size */
 #define ureg(name) u16 name; u16 __pad_##name;
 struct twi_regs {

@@ -36,25 +38,12 @@ struct twi_regs {
 };
 #undef ureg
 
-/* U-Boot I2C framework allows only one active device at a time.  */
 #ifdef TWI_CLKDIV
 #define TWI0_CLKDIV TWI_CLKDIV
-#endif
-static struct twi_regs *twi = (void *)TWI0_CLKDIV;
-
-#ifdef DEBUG
-# define dmemset(s, c, n) memset(s, c, n)
-#else
-# define dmemset(s, c, n)
-#endif
-#define debugi(fmt, args...) \
-	debug( \
-		"MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t%-20s:%-3i: " fmt "\n", \
-		twi->master_stat, twi->fifo_stat, twi->int_stat, \
-		__func__, __LINE__, ## args)
-
-#ifdef CONFIG_TWICLK_KHZ
-# error do not define CONFIG_TWICLK_KHZ ... use CONFIG_SYS_I2C_SPEED
+# ifdef CONFIG_SYS_MAX_I2C_BUS
+# undef CONFIG_SYS_MAX_I2C_BUS
+# endif
+#define CONFIG_SYS_MAX_I2C_BUS 1
 #endif
 
 /*

@@ -70,7 +59,7 @@ static struct twi_regs *twi = (void *)TWI0_CLKDIV;
 #define SYS_I2C_DUTY              I2C_SPEED_TO_DUTY(CONFIG_SYS_I2C_SPEED)
 /* Note: duty is inverse of speed, so the comparisons below are correct */
 #if SYS_I2C_DUTY < I2C_DUTY_MAX || SYS_I2C_DUTY > I2C_DUTY_MIN
-# error "The Blackfin I2C hardware can only operate 20KHz - 400KHz"
+# error "The I2C hardware can only operate 20KHz - 400KHz"
 #endif
 
 /* All transfers are described by this data structure */

@@ -92,7 +81,7 @@ struct i2c_msg {
  * wait_for_completion - manage the actual i2c transfer
  *	@msg: the i2c msg
  */
-static int wait_for_completion(struct i2c_msg *msg)
+static int wait_for_completion(struct twi_regs *twi, struct i2c_msg *msg)
 {
 	u16 int_stat, ctl;
 	ulong timebase = get_timer(0);

@@ -101,7 +90,6 @@ static int wait_for_completion(struct i2c_msg *msg)
 		int_stat = readw(&twi->int_stat);
 
 		if (int_stat & XMTSERV) {
-			debugi("processing XMTSERV");
 			writew(XMTSERV, &twi->int_stat);
 			if (msg->alen) {
 				writew(*(msg->abuf++), &twi->xmt_data8);

@@ -119,7 +107,6 @@ static int wait_for_completion(struct i2c_msg *msg)
 			}
 		}
 		if (int_stat & RCVSERV) {
-			debugi("processing RCVSERV");
 			writew(RCVSERV, &twi->int_stat);
 			if (msg->len) {
 				*(msg->buf++) = readw(&twi->rcv_data8);

@@ -130,12 +117,10 @@ static int wait_for_completion(struct i2c_msg *msg)
 			}
 		}
 		if (int_stat & MERR) {
-			debugi("processing MERR");
 			writew(MERR, &twi->int_stat);
 			return msg->len;
 		}
 		if (int_stat & MCOMP) {
-			debugi("processing MCOMP");
 			writew(MCOMP, &twi->int_stat);
 			if (msg->flags & I2C_M_COMBO && msg->len) {
 				ctl = readw(&twi->master_ctl);

@@ -155,16 +140,10 @@ static int wait_for_completion(struct i2c_msg *msg)
 	return msg->len;
 }
 
-/**
- * i2c_transfer - setup an i2c transfer
- *	@return: 0 if things worked, non-0 if things failed
- *
- *	Here we just get the i2c stuff all prepped and ready, and then tail off
- *	into wait_for_completion() for all the bits to go.
- */
-static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
-			int len, u8 flags)
+static int i2c_transfer(struct i2c_adapter *adap, uint8_t chip, uint addr,
+			int alen, uint8_t *buffer, int len, uint8_t flags)
 {
+	struct twi_regs *twi = i2c_get_base(adap);
 	int ret;
 	u16 ctl;
 	uchar addr_buffer[] = {

@@ -180,12 +159,6 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
 		.alen  = alen,
 	};
 
-	dmemset(buffer, 0xff, len);
-	debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i ",
-		chip, addr, alen, buffer[0], len);
-	debugi("flags=0x%02x[%s] ", flags,
-		(flags & I2C_M_READ ? "rd" : "wr"));
-
 	/* wait for things to settle */
 	while (readw(&twi->master_stat) & BUSBUSY)
 		if (ctrlc())

@@ -201,11 +174,9 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
 	/* prime the pump */
 	if (msg.alen) {
 		len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
-		debugi("first byte=0x%02x", *msg.abuf);
 		writew(*(msg.abuf++), &twi->xmt_data8);
 		--msg.alen;
 	} else if (!(msg.flags & I2C_M_READ) && msg.len) {
-		debugi("first byte=0x%02x", *msg.buf);
 		writew(*(msg.buf++), &twi->xmt_data8);
 		--msg.len;
 	}

@@ -222,8 +193,7 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
 	writew(ctl, &twi->master_ctl);
 
 	/* process the rest */
-	ret = wait_for_completion(&msg);
-	debugi("ret=%d", ret);
+	ret = wait_for_completion(twi, &msg);
 
 	if (ret) {
 		ctl = readw(&twi->master_ctl) & ~MEN;

@@ -237,12 +207,9 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
 	return ret;
 }
 
-/**
- * i2c_set_bus_speed - set i2c bus speed
- *	@speed: bus speed (in HZ)
- */
-int i2c_set_bus_speed(unsigned int speed)
+static uint adi_i2c_setspeed(struct i2c_adapter *adap, uint speed)
 {
+	struct twi_regs *twi = i2c_get_base(adap);
 	u16 clkdiv = I2C_SPEED_TO_DUTY(speed);
 
 	/* Set TWI interface clock */

@@ -257,28 +224,10 @@ int i2c_set_bus_speed(unsigned int speed)
 	return 0;
 }
 
-/**
- * i2c_get_bus_speed - get i2c bus speed
- *	@speed: bus speed (in HZ)
- */
-unsigned int i2c_get_bus_speed(void)
-{
-	u16 clkdiv = readw(&twi->clkdiv) & 0xff;
-	/* 10 MHz / (2 * CLKDIV) -> 5 MHz / CLKDIV */
-	return 5000000 / clkdiv;
-}
-
-/**
- * i2c_init - initialize the i2c bus
- *	@speed: bus speed (in HZ)
- *	@slaveaddr: address of device in slave mode (0 - not slave)
- *
- *	Slave mode isn't actually implemented.  It'll stay that way until
- *	we get a real request for it.
- */
-void i2c_init(int speed, int slaveaddr)
+static void adi_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
 {
-	uint8_t prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
+	struct twi_regs *twi = i2c_get_base(adap);
+	u16 prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
 
 	/* Set TWI internal clock as 10MHz */
 	writew(prescale, &twi->control);

@@ -288,100 +237,69 @@ void i2c_init(int speed, int slaveaddr)
 
 	/* Enable it */
 	writew(TWI_ENA | prescale, &twi->control);
-
-	debugi("CONTROL:0x%04x CLKDIV:0x%04x", readw(&twi->control),
-		readw(&twi->clkdiv));
-
-#if CONFIG_SYS_I2C_SLAVE
-# error I2C slave support not tested/supported
-#endif
 }
 
-/**
- * i2c_probe - test if a chip exists at a given i2c address
- *	@chip: i2c chip addr to search for
- *	@return: 0 if found, non-0 if not found
- */
-int i2c_probe(uchar chip)
+static int adi_i2c_read(struct i2c_adapter *adap, uint8_t chip,
+			uint addr, int alen, uint8_t *buffer, int len)
 {
-	u8 byte;
-	return i2c_read(chip, 0, 0, &byte, 1);
+	return i2c_transfer(adap, chip, addr, alen, buffer,
+			len, alen ? I2C_M_COMBO : I2C_M_READ);
 }
 
-/**
- * i2c_read - read data from an i2c device
- *	@chip: i2c chip addr
- *	@addr: memory (register) address in the chip
- *	@alen: byte size of address
- *	@buffer: buffer to store data read from chip
- *	@len: how many bytes to read
- *	@return: 0 on success, non-0 on failure
- */
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int adi_i2c_write(struct i2c_adapter *adap, uint8_t chip,
+			uint addr, int alen, uint8_t *buffer, int len)
 {
-	return i2c_transfer(chip, addr, alen, buffer,
-			len, (alen ? I2C_M_COMBO : I2C_M_READ));
+	return i2c_transfer(adap, chip, addr, alen, buffer, len, 0);
 }
 
-/**
- * i2c_write - write data to an i2c device
- *	@chip: i2c chip addr
- *	@addr: memory (register) address in the chip
- *	@alen: byte size of address
- *	@buffer: buffer holding data to write to chip
- *	@len: how many bytes to write
- *	@return: 0 on success, non-0 on failure
- */
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int adi_i2c_probe(struct i2c_adapter *adap, uint8_t chip)
 {
-	return i2c_transfer(chip, addr, alen, buffer, len, 0);
+	u8 byte;
+	return adi_i2c_read(adap, chip, 0, 0, &byte, 1);
 }
 
-/**
- * i2c_set_bus_num - change active I2C bus
- *	@bus: bus index, zero based
- *	@returns: 0 on success, non-0 on failure
- */
-int i2c_set_bus_num(unsigned int bus)
+static struct twi_regs *i2c_get_base(struct i2c_adapter *adap)
 {
-	switch (bus) {
-#if CONFIG_SYS_MAX_I2C_BUS > 0
-	case 0:
-		twi = (void *)TWI0_CLKDIV;
-		return 0;
+	switch (adap->hwadapnr) {
+#if CONFIG_SYS_MAX_I2C_BUS > 2
+	case 2:
+		return (struct twi_regs *)TWI2_CLKDIV;
 #endif
 #if CONFIG_SYS_MAX_I2C_BUS > 1
 	case 1:
-		twi = (void *)TWI1_CLKDIV;
-		return 0;
-#endif
-#if CONFIG_SYS_MAX_I2C_BUS > 2
-	case 2:
-		twi = (void *)TWI2_CLKDIV;
-		return 0;
+		return (struct twi_regs *)TWI1_CLKDIV;
 #endif
-	default: return -1;
+	case 0:
+		return (struct twi_regs *)TWI0_CLKDIV;
+
+	default:
+		printf("wrong hwadapnr: %d\n", adap->hwadapnr);
 	}
+
+	return NULL;
 }
 
-/**
- * i2c_get_bus_num - returns index of active I2C bus
- */
-unsigned int i2c_get_bus_num(void)
-{
-	switch ((unsigned long)twi) {
-#if CONFIG_SYS_MAX_I2C_BUS > 0
-	case TWI0_CLKDIV:
-		return 0;
-#endif
+U_BOOT_I2C_ADAP_COMPLETE(adi_i2c0, adi_i2c_init, adi_i2c_probe,
+			 adi_i2c_read, adi_i2c_write,
+			 adi_i2c_setspeed,
+			 CONFIG_SYS_I2C_SPEED,
+			 0,
+			 0)
+
 #if CONFIG_SYS_MAX_I2C_BUS > 1
-	case TWI1_CLKDIV:
-		return 1;
+U_BOOT_I2C_ADAP_COMPLETE(adi_i2c1, adi_i2c_init, adi_i2c_probe,
+			 adi_i2c_read, adi_i2c_write,
+			 adi_i2c_setspeed,
+			 CONFIG_SYS_I2C_SPEED,
+			 0,
+			 1)
 #endif
+
 #if CONFIG_SYS_MAX_I2C_BUS > 2
-	case TWI2_CLKDIV:
-		return 2;
+U_BOOT_I2C_ADAP_COMPLETE(adi_i2c2, adi_i2c_init, adi_i2c_probe,
+			 adi_i2c_read, adi_i2c_write,
+			 adi_i2c_setspeed,
+			 CONFIG_SYS_I2C_SPEED,
+			 0,
+			 2)
 #endif
-	default: return -1;
-	}
-}

index f0b74d8..39982ef 100644
@@ -122,8 +122,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index 4df51b9..50e85ca 100644
@@ -134,8 +134,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index 55bfbbe..7fc882a 100644
@@ -131,8 +131,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index 589c7a5..c2958e8 100644
@@ -119,8 +119,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index 0e68952..79e440a 100644
@@ -134,8 +134,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index a3ad7ae..b374ab5 100644
@@ -103,8 +103,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index d94c2df..6df89af 100644
@@ -121,8 +121,8 @@
 /*
  * I2C settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 #define CONFIG_SYS_I2C_SPEED		50000
 #define CONFIG_SYS_I2C_SLAVE		0
 

index 6c9a907..4f2b2cb 100644
@@ -142,8 +142,8 @@
 /*
  * I2C settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index a6ceffa..d01d88f 100644
@@ -120,8 +120,8 @@
 /*
  * I2C settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 #define CONFIG_SYS_I2C_SPEED		50000
 #define CONFIG_SYS_I2C_SLAVE		0
 

index 7ab644f..7b5a5a7 100644
@@ -128,8 +128,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index 743e193..e60558e 100644
@@ -126,8 +126,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index 6b29d08..e71e6d3 100644
@@ -134,8 +134,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index f02e155..878009f 100644
@@ -81,8 +81,8 @@
 #define CONFIG_PHYLIB
 
 /* i2c Settings */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C
 
 /*
  * Flash Settings

index ea9acf6..d75fc7b 100644
@@ -72,7 +72,7 @@
 # ifdef CONFIG_SPI_FLASH
 #  define CONFIG_CMD_SF
 # endif
-# if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
+# if defined(CONFIG_SYS_I2C) || defined(CONFIG_SYS_I2C_SOFT)
 #  define CONFIG_CMD_I2C
 #  define CONFIG_SOFT_I2C_READ_REPEATED_START
 # endif

@@ -300,7 +300,7 @@
 /*
  * I2C Settings
  */
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
+#if defined(CONFIG_SYS_I2C) || defined(CONFIG_SYS_I2C_SOFT)
 # ifndef CONFIG_SYS_I2C_SPEED
 #  define CONFIG_SYS_I2C_SPEED 50000
 # endif

index 13e939f..48cf184 100644
@@ -102,8 +102,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C
 
 
 /*

index 3668903..643c837 100644
@@ -113,8 +113,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index 85f5341..e059568 100644
@@ -122,8 +122,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index 5dffd1b..1f26457 100644
@@ -120,8 +120,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index 13ea067..72eafc5 100644
@@ -104,8 +104,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index eb18d6d..13fb675 100644
@@ -102,8 +102,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C
 
 
 /*

index e9bff83..e96a742 100644
@@ -103,8 +103,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*

index caf8847..42129fb 100644
@@ -122,8 +122,8 @@
 /*
  * I2C Settings
  */
+#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_ADI
-#define CONFIG_HARD_I2C		1
 
 
 /*