ARM: dts: TI: Add CAN support
Subsystems (2)
v4 cover ARM: dts: TI: Add CAN support
Hi Tony,
These patches add CAN support for am33xx, am43xx and dra7 platforms. They can go in independent of [1] but depend on [1] for functionality.
Tested on am335x-evm, am437x-gp-evm and dra7-evm.
NOTE:
- for DCAN to work on DRA7 we need this patch to keep the CAN PHY powered.
https://lkml.org/lkml/2014/10/21/484
- on DRA7 there is another issue which causes undesired behaviour if WKUPAON and L4CFG clock domains are allowed to HW_AUTO. Undesired behaviour is in the form of DCAN1 module being stuck-in-transition when disabled and RAMINIT-done bit not getting set as part of RAMINIT mechanism. To address these issues there is a patch to prevent these clockdomains from HW_AUTO.
https://github.com/rogerq/linux/commit/31d6da939dbbaf8ea2ab96ca5680b81cd5607e51
Even without this second patch DCAN seems to work.
cheers,
-roger
Changelog:
v4:
- added CAN instance number to "syscon-raminit" and use new compatible ids
v3:
- Move raminit register data into driver data
- rename syscon property to "syscon-raminit"
v2:
- Added vendor prefix "ti," to raminit properties
- Updated am335x dcan nodes
[1] - CAN driver RAMINIT Syscon support
http://article.gmane.org/gmane.linux.can/6892
cheers,
-roger
---
Mugunthan V N (1):
arm: dts: am437x-gp: Add dcan support
Roger Quadros (9):
ARM: dts: dra7: Add syscon regmap for CORE CONTROL area
ARM: dts: DRA7: Add DCAN nodes
ARM: dts: dra7-evm: Add CAN support
ARM: dts: dra72-evm: Add CAN support
ARM: dts: am4372: Add control module syscon node
ARM: dts: am4372: Add DCAN nodes
ARM: dts: am33xx: Add control module syscon node
ARM: dts: am33xx: Update DCAN nodes
ARM: dts: am335x-evm: Add DCAN1 details
arch/arm/boot/dts/am335x-evm.dts | 13 +++++++++++++ arch/arm/boot/dts/am33xx.dtsi | 25 +++++++++++++++++-------- arch/arm/boot/dts/am4372.dtsi | 27 +++++++++++++++++++++++++++ arch/arm/boot/dts/am437x-gp-evm.dts | 26 ++++++++++++++++++++++++++ arch/arm/boot/dts/dra7-evm.dts | 23 +++++++++++++++++++++++ arch/arm/boot/dts/dra7.dtsi | 27 +++++++++++++++++++++++++++ arch/arm/boot/dts/dra72-evm.dts | 23 +++++++++++++++++++++++ 7 files changed, 156 insertions(+), 8 deletions(-)
Signature · 1 line
1.8.3.2
PATCH v4 1/10 ARM: dts: dra7: Add syscon regmap for CORE CONTROL area
Display and DCAN drivers use syscon regmap to access some registers in the CORE control area. Add the syscon regmap node for this area.
--- arch/arm/boot/dts/dra7.dtsi | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/boot/dts/dra7.dtsi +5 -0
@@ -201,6 +201,11 @@ ti,hwmods = "counter_32k"; }; + dra7_ctrl_core: ctrl_core@4a002000 { + compatible = "syscon"; + reg = <0x4a002000 0x6d0>; + }; + dra7_ctrl_general: tisyscon@4a002e00 { compatible = "syscon"; reg = <0x4a002e00 0x7c>;
Signature · 1 line
1.8.3.2
PATCH v4 2/10 ARM: dts: DRA7: Add DCAN nodes
In reply to Roger QuadrosThe SoC supports 2 DCAN nodes. Add them.
--- arch/arm/boot/dts/dra7.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
arch/arm/boot/dts/dra7.dtsi +22 -0
@@ -34,6 +34,8 @@ serial3 = &uart4; serial4 = &uart5; serial5 = &uart6; + d_can0 = &dcan1; + d_can1 = &dcan2; }; timer {
@@ -1270,6 +1272,26 @@ ti,irqs-skip = <10 133 139 140>; ti,irqs-safe-map = <0>; }; + + dcan1: can@481cc000 { + compatible = "ti,dra7-d_can"; + ti,hwmods = "dcan1"; + reg = <0x4ae3c000 0x2000>; + syscon-raminit = <&dra7_ctrl_core 0x558 0>; + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&dcan1_sys_clk_mux>; + status = "disabled"; + }; + + dcan2: can@481d0000 { + compatible = "ti,dra7-d_can"; + ti,hwmods = "dcan2"; + reg = <0x48480000 0x2000>; + syscon-raminit = <&dra7_ctrl_core 0x558 1>; + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&sys_clkin1>; + status = "disabled"; + }; }; };
Signature · 1 line
1.8.3.2
PATCH v4 3/10 ARM: dts: dra7-evm: Add CAN support
In reply to Roger QuadrosThe board has 2 CAN ports but only the first one can be used. Enable the first CAN port.
WAKEUP0 pin doesn't have INPUT enable bit so we just disable weak PULLs.
The second CAN port cannot be used without hardware modification so we don't enable the second port.
--- arch/arm/boot/dts/dra7-evm.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
arch/arm/boot/dts/dra7-evm.dts +23 -0
@@ -171,6 +171,22 @@ 0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle */ >; }; + + dcan1_pins_default: dcan1_pins_default { + pinctrl-single,pins = < + 0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */ + 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ + 0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */ + >; + }; + + dcan1_pins_sleep: dcan1_pins_sleep { + pinctrl-single,pins = < + 0x3d0 (MUX_MODE15) /* dcan1_tx.off */ + 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ + 0x418 (MUX_MODE15) /* wakeup0.off */ + >; + }; }; &i2c1 {
@@ -528,3 +544,10 @@ ti,no-reset-on-init; ti,no-idle-on-init; }; + +&dcan1 { + status = "ok"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&dcan1_pins_default>; + pinctrl-1 = <&dcan1_pins_sleep>; +};
Signature · 1 line
1.8.3.2
PATCH v4 4/10 ARM: dts: dra72-evm: Add CAN support
In reply to Roger QuadrosThe board has 2 CAN ports but only the first one can be used. Enable the first CAN port.
WAKEUP0 pin doesn't have INPUT enable bit so we just disable weak PULLs.
The second CAN port cannot be used without hardware modification so we don't enable the second port.
--- arch/arm/boot/dts/dra72-evm.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
arch/arm/boot/dts/dra72-evm.dts +23 -0
@@ -26,6 +26,22 @@ 0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ >; }; + + dcan1_pins_default: dcan1_pins_default { + pinctrl-single,pins = < + 0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */ + 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ + 0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */ + >; + }; + + dcan1_pins_sleep: dcan1_pins_sleep { + pinctrl-single,pins = < + 0x3d0 (MUX_MODE15) /* dcan1_tx.off */ + 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ + 0x418 (MUX_MODE15) /* wakeup0.off */ + >; + }; }; &i2c1 {
@@ -142,3 +158,10 @@ &uart1 { status = "okay"; }; + +&dcan1 { + status = "ok"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&dcan1_pins_default>; + pinctrl-1 = <&dcan1_pins_sleep>; +};
Signature · 1 line
1.8.3.2
PATCH v4 5/10 ARM: dts: am4372: Add control module syscon node
In reply to Roger QuadrosUse syscon regmap to expose the Control module register space. This register space is shared between many users e.g. DCAN, USB, display, etc.
--- arch/arm/boot/dts/am4372.dtsi | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/boot/dts/am4372.dtsi +5 -0
@@ -57,6 +57,11 @@ cache-level = <2>; }; + am43xx_control_module: control_module@4a002000 { + compatible = "syscon"; + reg = <0x44e10000 0x7f4>; + }; + am43xx_pinmux: pinmux@44e10800 { compatible = "ti,am437-padconf", "pinctrl-single"; reg = <0x44e10800 0x31c>;
Signature · 1 line
1.8.3.2
PATCH v4 6/10 ARM: dts: am4372: Add DCAN nodes
In reply to Roger QuadrosThe SoC contains 2 DCAN modules. Add them.
--- arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
arch/arm/boot/dts/am4372.dtsi +22 -0
@@ -901,6 +901,28 @@ compatible = "mmio-sram"; reg = <0x40300000 0x40000>; /* 256k */ }; + + dcan0: can@481cc000 { + compatible = "ti,am3352-d_can"; + ti,hwmods = "d_can0"; + clocks = <&dcan0_fck>; + clock-names = "fck"; + reg = <0x481cc000 0x2000>; + syscon-raminit = <&am43xx_control_module 0x644 0>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + dcan1: can@481d0000 { + compatible = "ti,am3352-d_can"; + ti,hwmods = "d_can1"; + clocks = <&dcan1_fck>; + clock-names = "fck"; + reg = <0x481d0000 0x2000>; + syscon-raminit = <&am43xx_control_module 0x644 1>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; }; };
Signature · 1 line
1.8.3.2
Marc Kleine-Budde
maintainerRe: [PATCH v4 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 12 lines · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Signed-off-by Roger Quadros <[email protected]>--- arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)arch/arm/boot/dts/am4372.dtsi +0
-0
arch/arm/boot/dts/am4372.dtsi line 906
Quoted 6 lines
arch/arm/boot/dts/am4372.dtsi +3
-0@@ -901,6 +901,28 @@ compatible = "mmio-sram"; reg = <0x40300000 0x40000>; /* 256k */ }; + + dcan0: can@481cc000 { + compatible = "ti,am3352-d_can";
You should add "ti,am4372-d_can" as first compatible here.
arch/arm/boot/dts/am4372.dtsi line 917
Quoted 11 lines
arch/arm/boot/dts/am4372.dtsi +11
-0+ ti,hwmods = "d_can0"; + clocks = <&dcan0_fck>; + clock-names = "fck"; + reg = <0x481cc000 0x2000>; + syscon-raminit = <&am43xx_control_module 0x644 0>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + dcan1: can@481d0000 { + compatible = "ti,am3352-d_can";
Same here.
arch/arm/boot/dts/am4372.dtsi line 928
Quoted 12 lines
arch/arm/boot/dts/am4372.dtsi +8
-0+ ti,hwmods = "d_can1"; + clocks = <&dcan1_fck>; + clock-names = "fck"; + reg = <0x481d0000 0x2000>; + syscon-raminit = <&am43xx_control_module 0x644 1>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; }; };
Marc
Signature · 4 lines
Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions | Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917-5555 | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
Re: [PATCH v4 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 8 lines · Marc Kleine-Budde
Quoted 7 lines · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Signed-off-by Roger Quadros <[email protected]>--- arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
Quoted 14 lines
arch/arm/boot/dts/am4372.dtsi line 906
Quoted 11 lines
arch/arm/boot/dts/am4372.dtsi +3
-0@@ -901,6 +901,28 @@ compatible = "mmio-sram"; reg = <0x40300000 0x40000>; /* 256k */ }; + + dcan0: can@481cc000 { + compatible = "ti,am3352-d_can";You should add "ti,am4372-d_can" as first compatible here.
We don't have a separate compatible id for am4372-d_can as it the IP exactly same as am3352-d_can.
cheers,
-roger
Quoted 29 lines
arch/arm/boot/dts/am4372.dtsi line 917
Quoted 11 lines
arch/arm/boot/dts/am4372.dtsi +11
-0+ ti,hwmods = "d_can0"; + clocks = <&dcan0_fck>; + clock-names = "fck"; + reg = <0x481cc000 0x2000>; + syscon-raminit = <&am43xx_control_module 0x644 0>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + dcan1: can@481d0000 { + compatible = "ti,am3352-d_can";Same here.
arch/arm/boot/dts/am4372.dtsi line 928
Quoted 12 lines
arch/arm/boot/dts/am4372.dtsi +8
-0+ ti,hwmods = "d_can1"; + clocks = <&dcan1_fck>; + clock-names = "fck"; + reg = <0x481d0000 0x2000>; + syscon-raminit = <&am43xx_control_module 0x644 1>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; }; };Marc
Marc Kleine-Budde
maintainerRe: [PATCH v4 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 23 lines · Roger Quadros
Quoted 8 lines · Marc Kleine-Budde
Quoted 7 lines · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Signed-off-by Roger Quadros <[email protected]>--- arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)Quoted 14 lines
arch/arm/boot/dts/am4372.dtsi line 906
Quoted 11 lines
arch/arm/boot/dts/am4372.dtsi +3
-0@@ -901,6 +901,28 @@ compatible = "mmio-sram"; reg = <0x40300000 0x40000>; /* 256k */ }; + + dcan0: can@481cc000 { + compatible = "ti,am3352-d_can";You should add "ti,am4372-d_can" as first compatible here.
Quoted 2 lines
We don't have a separate compatible id for am4372-d_can as it the IP exactly same as am3352-d_can.
Having the "ti,am4372-d_can" compatible gives you the freedom to add some spacial handling for the IP if there turns that you need to without needing to modify the device tree. (We do this on imx.)
Marc
Signature · 4 lines
Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions | Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917-5555 | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
Re: [PATCH v4 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 24 lines · Marc Kleine-Budde
Quoted 23 lines · Roger Quadros
Quoted 22 lines · Marc Kleine-Budde
Quoted 12 lines · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Signed-off-by Roger Quadros <[email protected]>--- arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)arch/arm/boot/dts/am4372.dtsi +0
-0arch/arm/boot/dts/am4372.dtsi line 906
Quoted 6 lines
arch/arm/boot/dts/am4372.dtsi +3
-0@@ -901,6 +901,28 @@ compatible = "mmio-sram"; reg = <0x40300000 0x40000>; /* 256k */ }; + + dcan0: can@481cc000 { + compatible = "ti,am3352-d_can";You should add "ti,am4372-d_can" as first compatible here.
Quoted 6 lines
Quoted 2 lines
We don't have a separate compatible id for am4372-d_can as it the IP exactly same as am3352-d_can.
Having the "ti,am4372-d_can" compatible gives you the freedom to add some spacial handling for the IP if there turns that you need to without needing to modify the device tree. (We do this on imx.)
Agreed. On OMAP platforms we don't add new compatible IDs unless we really need to. Can we add "ti,am4372-d_can" even if it is not mentioned in Documentation/devicetree/bindings?
Tony what is your preference?
cheers,
-roger
Marc Kleine-Budde
maintainerRe: [PATCH v4 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 28 lines · Roger Quadros
Quoted 27 lines · Marc Kleine-Budde
Quoted 25 lines · Roger Quadros
Quoted 8 lines · Marc Kleine-Budde
Quoted 7 lines · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Signed-off-by Roger Quadros <[email protected]>--- arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)Quoted 14 lines
arch/arm/boot/dts/am4372.dtsi line 906
Quoted 11 lines
arch/arm/boot/dts/am4372.dtsi +3
-0@@ -901,6 +901,28 @@ compatible = "mmio-sram"; reg = <0x40300000 0x40000>; /* 256k */ }; + + dcan0: can@481cc000 { + compatible = "ti,am3352-d_can";You should add "ti,am4372-d_can" as first compatible here.
We don't have a separate compatible id for am4372-d_can as it the IP exactly same as am3352-d_can.
Quoted 8 lines
Quoted 3 lines
Having the "ti,am4372-d_can" compatible gives you the freedom to add some spacial handling for the IP if there turns that you need to without needing to modify the device tree. (We do this on imx.)
Agreed. On OMAP platforms we don't add new compatible IDs unless we really need to. Can we add "ti,am4372-d_can" even if it is not mentioned in
Documentation/devicetree/bindings?Tony what is your preference?
I don't insist, do it the Omap way :)
Marc
Signature · 4 lines
Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions | Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917-5555 | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
Re: [PATCH v4 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 33 lines · Marc Kleine-Budde
Quoted 32 lines · Roger Quadros
Quoted 30 lines · Marc Kleine-Budde
Quoted 23 lines · Roger Quadros
Quoted 8 lines · Marc Kleine-Budde
Quoted 7 lines · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Signed-off-by Roger Quadros <[email protected]>--- arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)Quoted 14 lines
arch/arm/boot/dts/am4372.dtsi line 906
Quoted 11 lines
arch/arm/boot/dts/am4372.dtsi +3
-0@@ -901,6 +901,28 @@ compatible = "mmio-sram"; reg = <0x40300000 0x40000>; /* 256k */ }; + + dcan0: can@481cc000 { + compatible = "ti,am3352-d_can";You should add "ti,am4372-d_can" as first compatible here.
Quoted 2 lines
We don't have a separate compatible id for am4372-d_can as it the IP exactly same as am3352-d_can.
Having the "ti,am4372-d_can" compatible gives you the freedom to add some spacial handling for the IP if there turns that you need to without needing to modify the device tree. (We do this on imx.)
Quoted 6 lines
Quoted 4 lines
Agreed. On OMAP platforms we don't add new compatible IDs unless we really need to. Can we add "ti,am4372-d_can" even if it is not mentioned in
Documentation/devicetree/bindings?Tony what is your preference?
I don't insist, do it the Omap way :)
I agree it's good to add if we need to add custom handling later on.
Regards,
Tony
Re: [PATCH v4 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 34 lines · Tony Lindgren
Quoted 33 lines · Marc Kleine-Budde
Quoted 32 lines · Roger Quadros
Quoted 30 lines · Marc Kleine-Budde
Quoted 23 lines · Roger Quadros
Quoted 8 lines · Marc Kleine-Budde
Quoted 7 lines · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Signed-off-by Roger Quadros <[email protected]>--- arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)Quoted 14 lines
arch/arm/boot/dts/am4372.dtsi line 906
Quoted 11 lines
arch/arm/boot/dts/am4372.dtsi +3
-0@@ -901,6 +901,28 @@ compatible = "mmio-sram"; reg = <0x40300000 0x40000>; /* 256k */ }; + + dcan0: can@481cc000 { + compatible = "ti,am3352-d_can";You should add "ti,am4372-d_can" as first compatible here.
Quoted 2 lines
We don't have a separate compatible id for am4372-d_can as it the IP exactly same as am3352-d_can.
Having the "ti,am4372-d_can" compatible gives you the freedom to add some spacial handling for the IP if there turns that you need to without needing to modify the device tree. (We do this on imx.)
Quoted 8 lines
Quoted 6 lines
Quoted 4 lines
Agreed. On OMAP platforms we don't add new compatible IDs unless we really need to. Can we add "ti,am4372-d_can" even if it is not mentioned in
Documentation/devicetree/bindings?Tony what is your preference?
I don't insist, do it the Omap way :)
I agree it's good to add if we need to add custom handling later on.
As of now I don't foresee any custom handling for am4372-d_can vs am3352-d_can, but I can add am4372-d_can anyways. In that case, do I need to mention it in Documentation/devicetree/bindings/net/can/c_can.txt?
I guess not, cause we don't do anything specific to am4372-d_can there.
cheers,
-roger
Re: [PATCH v4 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 42 lines · Roger Quadros
Quoted 41 lines · Tony Lindgren
Quoted 39 lines · Marc Kleine-Budde
Quoted 28 lines · Roger Quadros
Quoted 27 lines · Marc Kleine-Budde
Quoted 25 lines · Roger Quadros
Quoted 8 lines · Marc Kleine-Budde
Quoted 7 lines · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Signed-off-by Roger Quadros <[email protected]>--- arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)Quoted 14 lines
arch/arm/boot/dts/am4372.dtsi line 906
Quoted 11 lines
arch/arm/boot/dts/am4372.dtsi +3
-0@@ -901,6 +901,28 @@ compatible = "mmio-sram"; reg = <0x40300000 0x40000>; /* 256k */ }; + + dcan0: can@481cc000 { + compatible = "ti,am3352-d_can";You should add "ti,am4372-d_can" as first compatible here.
We don't have a separate compatible id for am4372-d_can as it the IP exactly same as am3352-d_can.
Quoted 8 lines
Quoted 3 lines
Having the "ti,am4372-d_can" compatible gives you the freedom to add some spacial handling for the IP if there turns that you need to without needing to modify the device tree. (We do this on imx.)
Agreed. On OMAP platforms we don't add new compatible IDs unless we really need to. Can we add "ti,am4372-d_can" even if it is not mentioned in
Documentation/devicetree/bindings?Tony what is your preference?
I don't insist, do it the Omap way :)
Quoted 7 lines
Quoted 1 line
I agree it's good to add if we need to add custom handling later on.
As of now I don't foresee any custom handling for am4372-d_can vs am3352-d_can, but I can add am4372-d_can anyways. In that case, do I need to mention it in
Documentation/devicetree/bindings/net/can/c_can.txt?I guess not, cause we don't do anything specific to am4372-d_can there.
I think you should to avoid checkpatch.pl warnings.
Regards,
Tony
PATCH v5 6/10 ARM: dts: am4372: Add DCAN nodes
In reply to Roger QuadrosThe SoC contains 2 DCAN modules. Add them.
--- arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
arch/arm/boot/dts/am4372.dtsi +22 -0
@@ -901,6 +901,28 @@ compatible = "mmio-sram"; reg = <0x40300000 0x40000>; /* 256k */ }; + + dcan0: can@481cc000 { + compatible = "ti,am4372-d_can", "ti,am3352-d_can"; + ti,hwmods = "d_can0"; + clocks = <&dcan0_fck>; + clock-names = "fck"; + reg = <0x481cc000 0x2000>; + syscon-raminit = <&am43xx_control_module 0x644 0>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + dcan1: can@481d0000 { + compatible = "ti,am4372-d_can", "ti,am3352-d_can"; + ti,hwmods = "d_can1"; + clocks = <&dcan1_fck>; + clock-names = "fck"; + reg = <0x481d0000 0x2000>; + syscon-raminit = <&am43xx_control_module 0x644 1>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; }; };
Signature · 1 line
1.8.3.2
Re: [PATCH v5 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 1 line · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Thanks applying all into omap-for-v3.19/dt-v2.
Tony
Re: [PATCH v5 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 4 lines · Tony Lindgren
Quoted 1 line · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Thanks applying all into omap-for-v3.19/dt-v2.
Oops, have to drop these as they cause this on make dtbs:
DTC arch/arm/boot/dts/dra7-evm.dtb
Warning (reg_format): "reg" property in /soc/can@481cc000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (reg_format): "reg" property in /soc/can@481d0000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481d0000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481d0000
DTC arch/arm/boot/dts/am57xx-beagle-x15.dtb
Warning (reg_format): "reg" property in /soc/can@481cc000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (reg_format): "reg" property in /soc/can@481d0000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481d0000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481d0000
DTC arch/arm/boot/dts/dra72-evm.dtb
Warning (reg_format): "reg" property in /soc/can@481cc000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (reg_format): "reg" property in /soc/can@481d0000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481d0000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481d0000
Care to update the patches for that and then do a pull request for me?
Regards,
Tony
Re: [PATCH v5 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 30 lines · Tony Lindgren
Quoted 4 lines · Tony Lindgren
Quoted 1 line · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Thanks applying all into omap-for-v3.19/dt-v2.
Oops, have to drop these as they cause this on make dtbs:
DTC
arch/arm/boot/dts/dra7-evm.dtb
Warning (reg_format): "reg" property in /soc/can@481cc000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (reg_format): "reg" property in /soc/can@481d0000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481d0000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481d0000
DTCarch/arm/boot/dts/am57xx-beagle-x15.dtb
Warning (reg_format): "reg" property in /soc/can@481cc000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (reg_format): "reg" property in /soc/can@481d0000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481d0000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481d0000
DTCarch/arm/boot/dts/dra72-evm.dtb
Warning (reg_format): "reg" property in /soc/can@481cc000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (reg_format): "reg" property in /soc/can@481d0000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481d0000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481d0000
Quoted 1 line
Care to update the patches for that and then do a pull request for me?
I didn't see these warnings on 3.18-rc1 though. Looks like some new checks were added in -next. I'll fix these and send you an updated pull request.
cheers,
-roger
Re: [PATCH v5 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 31 lines · Roger Quadros
Quoted 30 lines · Tony Lindgren
Quoted 4 lines · Tony Lindgren
Quoted 1 line · Roger Quadros
The SoC contains 2 DCAN modules. Add them.
Thanks applying all into omap-for-v3.19/dt-v2.
Oops, have to drop these as they cause this on make dtbs:
DTC
arch/arm/boot/dts/dra7-evm.dtb
Warning (reg_format): "reg" property in /soc/can@481cc000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (reg_format): "reg" property in /soc/can@481d0000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481d0000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481d0000
DTCarch/arm/boot/dts/am57xx-beagle-x15.dtb
Warning (reg_format): "reg" property in /soc/can@481cc000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (reg_format): "reg" property in /soc/can@481d0000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481d0000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481d0000
DTCarch/arm/boot/dts/dra72-evm.dtb
Warning (reg_format): "reg" property in /soc/can@481cc000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (reg_format): "reg" property in /soc/can@481d0000 has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481cc000
Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/can@481d0000
Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/can@481d0000
Quoted 4 lines
Quoted 1 line
Care to update the patches for that and then do a pull request for me?
I didn't see these warnings on 3.18-rc1 though. Looks like some new checks were added in -next. I'll fix these and send you an updated pull request.
I couldn't reproduce the errors on linux-next nor on your branch. Maybe you had a conflict resolution issue? I've rebased the patches on omap-for-v3.19/dt-v2 and are available for you to pull from:
The following changes since commit 0f39f7b906dbeabe2ffd8739d5201e890d102ea6:
ARM: dts: AM43xx: add tscadc DT entries for am437x-evm and am43x-epos-evm (2014-11-21 16:25:06 -0800)
are available in the git repository at:
[email protected]:rogerq/linux.git for-v3.19/omap-dts-dcan
for you to fetch changes up to bae6665b8002282a833bf482b242e7df5d63b3d3:
ARM: dts: am335x-evm: Add DCAN1 details (2014-11-24 12:41:17 +0200)
----------------------------------------------------------------
Mugunthan V N (1):
arm: dts: am437x-gp: Add dcan support
Roger Quadros (9):
ARM: dts: dra7: Add syscon regmap for CORE CONTROL area
ARM: dts: DRA7: Add DCAN nodes
ARM: dts: dra7-evm: Add CAN support
ARM: dts: dra72-evm: Add CAN support
ARM: dts: am4372: Add control module syscon node
ARM: dts: am4372: Add DCAN nodes
ARM: dts: am33xx: Add control module syscon node
ARM: dts: am33xx: Update DCAN nodes
ARM: dts: am335x-evm: Add DCAN1 details
arch/arm/boot/dts/am335x-evm.dts | 13 +++++++++++++ arch/arm/boot/dts/am33xx.dtsi | 25 +++++++++++++++++-------- arch/arm/boot/dts/am4372.dtsi | 27 +++++++++++++++++++++++++++ arch/arm/boot/dts/am437x-gp-evm.dts | 26 ++++++++++++++++++++++++++ arch/arm/boot/dts/dra7-evm.dts | 22 ++++++++++++++++++++++ arch/arm/boot/dts/dra7.dtsi | 26 ++++++++++++++++++++++++++ arch/arm/boot/dts/dra72-evm.dts | 23 +++++++++++++++++++++++ 7 files changed, 154 insertions(+), 8 deletions(-)
--
cheers,
-roger
Re: [PATCH v5 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 2 lines · Roger Quadros
I couldn't reproduce the errors on linux-next nor on your branch. Maybe you had a conflict resolution issue?
I guess it must have been a conflict resolution issue at my end then.
Quoted 9 lines
I've rebased the patches on omap-for-v3.19/dt-v2 and are available for you to pull from:
The following changes since commit
0f39f7b906dbeabe2ffd8739d5201e890d102ea6:ARM: dts: AM43xx: add tscadc DT entries for am437x-evm and am43x-epos-evm (2014-11-21 16:25:06 -0800)
are available in the git repository at:
[email protected]:rogerq/linux.git for-v3.19/omap-dts-dcan
Pulling into omap-for-v3.19/dts thanks. Let's also switch into fixes only mode for v3.19 now with -rc6 out.
Regards,
Tony
Re: [PATCH v5 06/10] ARM: dts: am4372: Add DCAN nodes
Quoted 10 lines · Tony Lindgren
Quoted 2 lines · Roger Quadros
I couldn't reproduce the errors on linux-next nor on your branch. Maybe you had a conflict resolution issue?
I guess it must have been a conflict resolution issue at my end then.
Quoted 4 lines
I've rebased the patches on omap-for-v3.19/dt-v2 and are available for you to pull from:
The following changes since commit
0f39f7b906dbeabe2ffd8739d5201e890d102ea6:
Quoted 8 lines
Quoted 5 lines
ARM: dts: AM43xx: add tscadc DT entries for am437x-evm and am43x-epos-evm (2014-11-21 16:25:06 -0800)
are available in the git repository at:
[email protected]:rogerq/linux.git for-v3.19/omap-dts-dcan
Pulling into omap-for-v3.19/dts thanks. Let's also switch into fixes only mode for v3.19 now with -rc6 out.
Knowing you most likely don't have anything else based on this branch, I ended up just picking the patches from your branch to unify the subject line for one of the patches.
Regards,
Tony
PATCH v4 7/10 arm: dts: am437x-gp: Add dcan support
In reply to Roger QuadrosFrom: Mugunthan V N <[email protected]>
Add DCAN support for AM437x GP EVM with both DCAN instances.
[Roger Q] Updated output pin to not use pull up.
--- arch/arm/boot/dts/am437x-gp-evm.dts | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)
arch/arm/boot/dts/am437x-gp-evm.dts +26 -0
@@ -254,6 +254,20 @@ 0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7) >; }; + + dcan0_default: dcan0_default_pins { + pinctrl-single,pins = < + 0x178 (PIN_OUTPUT | MUX_MODE2) /* uart1_ctsn.d_can0_tx */ + 0x17c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.d_can0_rx */ + >; + }; + + dcan1_default: dcan1_default_pins { + pinctrl-single,pins = < + 0x180 (PIN_OUTPUT | MUX_MODE2) /* uart1_rxd.d_can1_tx */ + 0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */ + >; + }; }; &i2c0 {
@@ -511,3 +525,15 @@ }; }; }; + +&dcan0 { + pinctrl-names = "default"; + pinctrl-0 = <&dcan0_default>; + status = "okay"; +}; + +&dcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&dcan1_default>; + status = "okay"; +};
Signature · 1 line
1.8.3.2
PATCH v4 8/10 ARM: dts: am33xx: Add control module syscon node
In reply to Roger QuadrosUse syscon regmap to expose the Control module register space. This register space is shared between many users e.g. DCAN, USB, display, etc.
--- arch/arm/boot/dts/am33xx.dtsi | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/boot/dts/am33xx.dtsi +5 -0
@@ -83,6 +83,11 @@ }; }; + am33xx_control_module: control_module@4a002000 { + compatible = "syscon"; + reg = <0x44e10000 0x7fc>; + }; + am33xx_pinmux: pinmux@44e10800 { compatible = "pinctrl-single"; reg = <0x44e10800 0x0238>;
Signature · 1 line
1.8.3.2
PATCH v4 9/10 ARM: dts: am33xx: Update DCAN nodes
In reply to Roger QuadrosAdd "raminit-syscon" property to specify the RAMINIT register. Add clock information.
Rename can nodes from "d_can" to "can" to be compliant with the ePAPR specs.
--- arch/arm/boot/dts/am33xx.dtsi | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-)
arch/arm/boot/dts/am33xx.dtsi +12 -8
@@ -338,20 +338,24 @@ interrupts = <91>; }; - dcan0: d_can@481cc000 { - compatible = "bosch,d_can"; + dcan0: can@481cc000 { + compatible = "ti,am3352-d_can"; ti,hwmods = "d_can0"; - reg = <0x481cc000 0x2000 - 0x44e10644 0x4>; + reg = <0x481cc000 0x2000>; + clocks = <&dcan0_fck>; + clock-names = "fck"; + syscon-raminit = <&am33xx_control_module 0x644 0>; interrupts = <52>; status = "disabled"; }; - dcan1: d_can@481d0000 { - compatible = "bosch,d_can"; + dcan1: can@481d0000 { + compatible = "ti,am3352-d_can"; ti,hwmods = "d_can1"; - reg = <0x481d0000 0x2000 - 0x44e10644 0x4>; + reg = <0x481d0000 0x2000>; + clocks = <&dcan1_fck>; + clock-names = "fck"; + syscon-raminit = <&am33xx_control_module 0x644 1>; interrupts = <55>; status = "disabled"; };
Signature · 1 line
1.8.3.2
Re: [PATCH v4 09/10] ARM: dts: am33xx: Update DCAN nodes
Quoted 19 lines · Roger Quadros
Add "raminit-syscon" property to specify the RAMINIT register. Add clock information.
Rename can nodes from "d_can" to "can" to be compliant with the ePAPR specs.Signed-off-by Roger Quadros <[email protected]>--- arch/arm/boot/dts/am33xx.dtsi | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-)arch/arm/boot/dts/am33xx.dtsi +0
-1@@ -338,20 +338,24 @@ interrupts = <91>; }; - dcan0: d_can@481cc000 {
arch/arm/boot/dts/am33xx.dtsi line 347
Quoted 10 lines
arch/arm/boot/dts/am33xx.dtsi +6
-3- compatible = "bosch,d_can"; + dcan0: can@481cc000 { + compatible = "ti,am3352-d_can"; ti,hwmods = "d_can0"; - reg = <0x481cc000 0x2000 - 0x44e10644 0x4>; + reg = <0x481cc000 0x2000>; + clocks = <&dcan0_fck>; + clock-names = "fck"; + syscon-raminit = <&am33xx_control_module 0x644 0>;
Yeah, I missed to write the mail that I disagreed with the "dcan_0/1" compatible-properties of V3. The second parameter to syscon here is much better!
PATCH v4 10/10 ARM: dts: am335x-evm: Add DCAN1 details
In reply to Roger QuadrosDCAN1 is routed to CAN port (J11) when Profile 1 is selected on the profile selection switch.
Provide information for DCAN1 pins and node but keep it disabled by default. User has to manually enable it if Profile 1 is chosen.
--- arch/arm/boot/dts/am335x-evm.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+)
arch/arm/boot/dts/am335x-evm.dts +13 -0
@@ -307,6 +307,13 @@ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ >; }; + + dcan1_pins_default: dcan1_pins_default { + pinctrl-single,pins = < + 0x168 (PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */ + 0x16c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */ + >; + }; }; &uart0 {
@@ -664,3 +671,9 @@ &aes { status = "okay"; }; + +&dcan1 { + status = "disabled"; /* Enable only if Profile 1 is selected */ + pinctrl-names = "default"; + pinctrl-0 = <&dcan1_pins_default>; +};
Signature · 1 line
1.8.3.2
Quoted 11 lines · Roger Quadros
Hi Tony,
These patches add CAN support for am33xx, am43xx and dra7 platforms. They can go in independent of [1] but depend on [1] for functionality.
Tested on am335x-evm, am437x-gp-evm and dra7-evm.
NOTE:
- for DCAN to work on DRA7 we need this patch to keep the CAN PHY powered.
https://lkml.org/lkml/2014/10/21/484
Quoted 7 lines
- on DRA7 there is another issue which causes undesired behaviour if WKUPAON and L4CFG clock domains are allowed to
HW_AUTO. Undesired behaviour is in the form of DCAN1 module being stuck-in-transition when disabled and RAMINIT-done bit not getting set as part of RAMINIT mechanism. To address these issues there is a patch to prevent these clockdomains fromHW_AUTO.
https://github.com/rogerq/linux/commit/31d6da939dbbaf8ea2ab96ca5680b81cd5607e51
Even without this second patch DCAN seems to work.
FWIW:
I've send a pull request with the CAN driver changes to David Miller yesterday, the code is supposed to hit mainline in v3.19.
regards,
Marc
Signature · 4 lines
Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions | Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917-5555 | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |