ARM: shmobile: r8a7790 CCI configuration
PATCH v2 1/1 ARM: shmobile: r8a7790 CCI configuration
Add the settings of CCI-400 for enabling ca15/ca7 snoop on r8a7790. Needed to configure the CCI boot cluster port regardless of MCPM.
---
Changes since version 1:
- Fix a way to wait for the register read.
arch/arm/mach-shmobile/smp-r8a7790.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
arch/arm/mach-shmobile/smp-r8a7790.c +19 -0
@@ -25,6 +25,12 @@#include "pm-rcar.h" #include "r8a7790.h" +#define CCI_BASE 0xf0090000 +#define CCI_SLAVE3 0x4000 +#define CCI_SLAVE4 0x5000 +#define CCI_SNOOP 0x0000 +#define CCI_STATUS 0x000c +static struct rcar_sysc_ch r8a7790_ca15_scu = { .chan_offs =0x180 ,/* PWRSR5 .. PWRER5 */ .isr_bit =12 ,/* CA15-SCU */
@@ -48,6 +54,8 @@ static struct rcar_apmu_config r8a7790_apmu_config[] = {static void __init r8a7790_smp_prepare_cpus (unsigned int max_cpus) { +void __iomem *p; +/* let APMU code install data related to shmobile_boot_vector */ shmobile_smp_apmu_prepare_cpus(max_cpus, r8a7790_apmu_config,
@@ -57,6 +65,17 @@ static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)r8a7790_pm_init ();rcar_sysc_power_up (&r8a7790_ca15_scu);rcar_sysc_power_up (&r8a7790_ca7_scu); + +/* enable snoop and DVM */ + p =ioremap_nocache (CCI_BASE ,0x8000 ); +writel_relaxed (readl_relaxed (p +CCI_SLAVE3 +CCI_SNOOP ) |0x3 , + p +CCI_SLAVE3 +CCI_SNOOP );/* ca15 */ +writel_relaxed (readl_relaxed (p +CCI_SLAVE4 +CCI_SNOOP ) |0x3 , + p +CCI_SLAVE4 +CCI_SNOOP );/* ca7 */ +while (readl_relaxed (p +CCI_STATUS )) +cpu_relax (); +/* wait for pending bit low */ +iounmap (p); }struct smp_operations r8a7790_smp_ops__initdata = {
Signature · 1 line
1.7.9.5
PATCH v2 1/1 ARM: shmobile: r8a7790 CCI configuration
Quoted 19 lines · Gaku Inami
Add the settings of CCI-400 for enabling ca15/ca7 snoop on r8a7790. Needed to configure the CCI boot cluster port regardless of MCPM.
Signed-off-by Gaku Inami <[email protected]>Signed-off-by Magnus Damm <[email protected]>Signed-off-by Simon Horman <[email protected]>---
Changes since version 1:
- Fix a way to wait for the register read.arch/arm/mach-shmobile/smp-r8a7790.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)arch/arm/mach-shmobile/smp-r8a7790.c +0
-0
arch/arm/mach-shmobile/smp-r8a7790.c line 33
Quoted 9 lines
arch/arm/mach-shmobile/smp-r8a7790.c +6
-0@@ -25,6 +25,12 @@#include "pm-rcar.h" #include "r8a7790.h" +#define CCI_BASE 0xf0090000 +#define CCI_SLAVE3 0x4000 +#define CCI_SLAVE4 0x5000 +#define CCI_SNOOP 0x0000 +#define CCI_STATUS 0x000c +
I have asked the same question multiple times in the past, why are you not using the DT bindings and the CCI driver for this ? Why are you duplicating the code ? Any limitations to use them ?
Regards,
Sudeep
PATCH v2 1/1 ARM: shmobile: r8a7790 CCI configuration
Hi Sudeep,
Quoted 25 lines · Sudeep Holla
Quoted 22 lines · Gaku Inami
Add the settings of CCI-400 for enabling ca15/ca7 snoop on r8a7790. Needed to configure the CCI boot cluster port regardless of MCPM.
Signed-off-by Gaku Inami <[email protected]>Signed-off-by Magnus Damm <[email protected]>Signed-off-by Simon Horman <[email protected]>---
Changes since version 1:
- Fix a way to wait for the register read.arch/arm/mach-shmobile/smp-r8a7790.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)arch/arm/mach-shmobile/smp-r8a7790.c +0
-0@@ -25,6 +25,12 @@#include "pm-rcar.h" #include "r8a7790.h"
Quoted 11 lines
arch/arm/mach-shmobile/smp-r8a7790.c line 33
Quoted 6 lines
arch/arm/mach-shmobile/smp-r8a7790.c +6
-0+#define CCI_BASE 0xf0090000 +#define CCI_SLAVE3 0x4000 +#define CCI_SLAVE4 0x5000 +#define CCI_SNOOP 0x0000 +#define CCI_STATUS 0x000c +I have asked the same question multiple times in the past, why are you not using the DT bindings and the CCI driver for this ? Why are you duplicating the code ? Any limitations to use them ?
Thank you for your feedback.
I will consider to use the DT bindings and the CCI driver.
Regards,
Inami
Quoted 3 lines
Regards,
Sudeep