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powerpc/c29xpcie: Add secure boot support

PATCH New Mingkai Hu 2 participants 4 messages Nov 25, 2014

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Mingkai Hu

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#0 lore raw

PATCH 1/1 powerpc/c29xpcie: Add secure boot support

From: Po Liu <[email protected]>

Add NOR and SPI flash secure boot target for C29XPCIE board.

Signed-off-by Po Liu <[email protected]>
Signed-off-by Mingkai.Hu <[email protected]>
---
 configs/C29XPCIE_NOR_SECBOOT_defconfig      | 4 ++++
 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++
 include/configs/C29XPCIE.h                  | 2 ++
 3 files changed, 10 insertions(+)
 create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig
 create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
configs/C29XPCIE_NOR_SECBOOT_defconfig new file +4 -0
new file mode 100644
index 0000000..86751cf
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig new file +4 -0
new file mode 100644
index 0000000..d1a42b2
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
include/configs/C29XPCIE.h +2 -0
index 5d11278..1d8dce8 100644
@@ -579,4 +579,6 @@
 
 #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
 
+#include <asm/fsl_secure_boot.h>
+
 #endif	/* __CONFIG_H */
Signature · 1 line
2.1.0.27.g96db324
#1 lore raw

PATCH 1/1 powerpc/c29xpcie: Add secure boot support

Quoted 40 lines · Mingkai Hu

From: Po Liu <[email protected]>

Add NOR and SPI flash secure boot target for C29XPCIE board.

Signed-off-by Po Liu <[email protected]>
Signed-off-by Mingkai.Hu <[email protected]>
---
 configs/C29XPCIE_NOR_SECBOOT_defconfig      | 4 ++++
 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++
 include/configs/C29XPCIE.h                  | 2 ++
 3 files changed, 10 insertions(+)
 create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig
 create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
configs/C29XPCIE_NOR_SECBOOT_defconfig new file +4 -0
new file mode 100644
index 0000000..86751cf
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig new file +4 -0
new file mode 100644
index 0000000..d1a42b2
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
include/configs/C29XPCIE.h +0 -0
index 5d11278..1d8dce8 100644

include/configs/C29XPCIE.h line 584

Quoted 6 lines
include/configs/C29XPCIE.h +2 -0
@@ -579,4 +579,6 @@
 
 #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
 
+#include <asm/fsl_secure_boot.h>
+
 #endif	/* __CONFIG_H */

Mingkai,

I see you sent another patch by mistake. You should add a new version number to this one because their subject are the same.

Please update MAINTAINERS file when you add new targets.

York

author
#2 lore raw

PATCH 1/1 powerpc/c29xpcie: Add secure boot support

Quoted 61 lines

-----Original Message-----
From: York Sun [mailto:yorksun at freescale.com]
Sent: Wednesday, November 26, 2014 12:22 AM
To: Hu Mingkai-B21284; u-boot at lists.denx.de
Cc: Sun York-R58495; Liu Po-B43644
Subject: Re: [PATCH] powerpc/c29xpcie: Add secure boot support

Quoted 42 lines · Mingkai Hu

From: Po Liu <[email protected]>

Add NOR and SPI flash secure boot target for C29XPCIE board.

Signed-off-by Po Liu <[email protected]>
Signed-off-by Mingkai.Hu <[email protected]>
---
 configs/C29XPCIE_NOR_SECBOOT_defconfig      | 4 ++++
 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++
 include/configs/C29XPCIE.h                  | 2 ++
 3 files changed, 10 insertions(+)
 create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig
 create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
configs/C29XPCIE_NOR_SECBOOT_defconfig new file +4 -0
new file mode 100644
index 0000000..86751cf
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig new file +4 -0
new file mode 100644
index 0000000..d1a42b2
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
include/configs/C29XPCIE.h +0 -0
index 5d11278..1d8dce8 100644

include/configs/C29XPCIE.h line 584

Quoted 6 lines
include/configs/C29XPCIE.h +2 -0
@@ -579,4 +579,6 @@
 
 #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
 
+#include <asm/fsl_secure_boot.h>
+
 #endif	/* __CONFIG_H */

Mingkai,

Quoted 6 lines

I see you sent another patch by mistake. You should add a new version number to this one because their subject are the same.

Please update MAINTAINERS file when you add new targets.

York

Hi York,

I will sent version 2 patch.
I didn't find target maintain info in the MAINTAINERS file, it is about sub module maintain info. Do we need to update the MAINTAINERS file for target update?

Thanks,
Mingkai

#3 lore raw

PATCH 1/1 powerpc/c29xpcie: Add secure boot support

Quoted 64 lines · On 11/25/2014 08:40 AM, Hu Mingkai-B21284 wrote:
Quoted 64 lines

-----Original Message-----
From: York Sun [mailto:yorksun at freescale.com]
Sent: Wednesday, November 26, 2014 12:22 AM
To: Hu Mingkai-B21284; u-boot at lists.denx.de
Cc: Sun York-R58495; Liu Po-B43644
Subject: Re: [PATCH] powerpc/c29xpcie: Add secure boot support

Quoted 42 lines · Mingkai Hu

From: Po Liu <[email protected]>

Add NOR and SPI flash secure boot target for C29XPCIE board.

Signed-off-by Po Liu <[email protected]>
Signed-off-by Mingkai.Hu <[email protected]>
---
 configs/C29XPCIE_NOR_SECBOOT_defconfig      | 4 ++++
 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++
 include/configs/C29XPCIE.h                  | 2 ++
 3 files changed, 10 insertions(+)
 create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig
 create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
configs/C29XPCIE_NOR_SECBOOT_defconfig new file +4 -0
new file mode 100644
index 0000000..86751cf
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig new file +4 -0
new file mode 100644
index 0000000..d1a42b2
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
include/configs/C29XPCIE.h +0 -0
index 5d11278..1d8dce8 100644

include/configs/C29XPCIE.h line 584

Quoted 6 lines
include/configs/C29XPCIE.h +2 -0
@@ -579,4 +579,6 @@
 
 #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
 
+#include <asm/fsl_secure_boot.h>
+
 #endif	/* __CONFIG_H */

Mingkai,

I see you sent another patch by mistake. You should add a new version number to this one because their subject are the same.

Quoted 8 lines
Quoted 3 lines

Please update MAINTAINERS file when you add new targets.

York

Hi York,

I will sent version 2 patch.
I didn't find target maintain info in the MAINTAINERS file, it is about sub module maintain info. Do we need to update the MAINTAINERS file for target update?

All you need is to add the new defconfig in board/freescale/c29xpcie/MAINTAINERS.

York