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mx6sxsabresd: Add thermal support

PATCH New Fabio Estevam 4 participants 7 messages Nov 25, 2014 – Dec 1, 2014

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Arm i.MX and Layerscape Char and misc drivers
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Fabio Estevam

author
#0 lore raw

PATCH 2/2 mx6sxsabresd: Add thermal support

Add thermal support so that the temperature of the chip can be displayed on boot:

U-Boot 2015.01-rc1-18268-g1366c05-dirty (Nov 25 2014 - 13:02:42)

CPU:   Freescale i.MX6SX rev1.0 at 792 MHz                                      
CPU:   Temperature 50 C
Signed-off-by Fabio Estevam <[email protected]>
---
 include/configs/mx6sxsabresd.h | 10 ++++++++++
 1 file changed, 10 insertions(+)
include/configs/mx6sxsabresd.h +10 -0
index d8ab291..5e0edab 100644
@@ -208,6 +208,16 @@
 #define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(2, 1)
 #endif
 
+#define CONFIG_DM
+#define CONFIG_DM_THERMAL
+#define CONFIG_SYS_MALLOC_F_LEN	(1 << 10)
+#define CONFIG_IMX6_THERMAL
+
+#define CONFIG_CMD_FUSE
+#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
+#define CONFIG_MXC_OCOTP
+#endif
+
 /* FLASH and environment organization */
 #define CONFIG_SYS_NO_FLASH
Signature · 1 line
1.9.1
author
#1 lore raw

PATCH 1/2 mxc_ocotp: Do not disable the OCOTP clock after every access

Leave the OCOTP turned on, so that we subsequent access do not fail.

After enabling the thermal driver on a mx6sxsabresd board:

U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01)

CPU:   Freescale i.MX6SX rev1.0 at 792 MHz                                     
CPU:   Temperature 48 C                                                        
Reset cause: POR                                                               
Board: MX6SX SABRE SDB                                                         
I2C:   ready                                                                   
DRAM:  1 GiB                                                                   
PMIC:  PFUZE100 ID=0x10                                                        
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2                                   
  00:01.0     - 16c3:abcd - Bridge device                                      
   01:00.0    - 8086:08b1 - Network controller                                 
In:    serial                                                                  
Out:   serial                                                                  
Err:   serial

Net:
(hang)

As the thermal driver accesses the ocotp registers, its clock will be disabled afterwards.

Then when the MAC address is read (also from ocotp registers) it will cause a hang.

Do not disable the ocotp clock to prevent this problem.

Signed-off-by Fabio Estevam <[email protected]>
---
 drivers/misc/mxc_ocotp.c | 2 --
 1 file changed, 2 deletions(-)
drivers/misc/mxc_ocotp.c +0 -2
index 3de1245..67f9429 100644
@@ -81,8 +81,6 @@ static int finish_access(struct ocotp_regs *regs, const char *caller)
 	err = !!(readl(&regs->ctrl) & BM_CTRL_ERROR);
 	clear_error(regs);
 
-	enable_ocotp_clk(0);
-
 	if (err) {
 		printf("mxc_ocotp %s(): Access protect error\n", caller);
 		return -EIO;
Signature · 1 line
1.9.1
#2 lore raw

PATCH 1/2 mxc_ocotp: Do not disable the OCOTP clock after every access

Hi Fabio,

Quoted 40 lines · Fabio Estevam

Leave the OCOTP turned on, so that we subsequent access do not fail.

After enabling the thermal driver on a mx6sxsabresd board:

U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01)

CPU:   Freescale i.MX6SX rev1.0 at 792 MHz
CPU:   Temperature 48 C
Reset cause: POR
Board: MX6SX SABRE SDB
I2C:   ready
DRAM:  1 GiB
PMIC:  PFUZE100 ID=0x10
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
  00:01.0     - 16c3:abcd - Bridge device
   01:00.0    - 8086:08b1 - Network controller
In:    serial
Out:   serial
Err:   serial

Net:
(hang)

As the thermal driver accesses the ocotp registers, its clock will be disabled afterwards.

Then when the MAC address is read (also from ocotp registers) it will cause a hang.

Do not disable the ocotp clock to prevent this problem.

Signed-off-by Fabio Estevam <[email protected]>
---
 drivers/misc/mxc_ocotp.c | 2 --
 1 file changed, 2 deletions(-)
drivers/misc/mxc_ocotp.c +0 -0
index 3de1245..67f9429 100644

drivers/misc/mxc_ocotp.c static int finish_access(struct ocotp_regs *regs, const char *caller) · line 86

Quoted 8 lines
drivers/misc/mxc_ocotp.c +0 -2
@@ -81,8 +81,6 @@ static int finish_access(struct ocotp_regs *regs, const char *caller)
        err = !!(readl(&regs->ctrl) & BM_CTRL_ERROR);
        clear_error(regs);
 
-       enable_ocotp_clk(0);
-
        if (err) {
                printf("mxc_ocotp %s(): Access protect error\n", caller);
                return -EIO;

That, or:
- Make imx_get_mac_from_fuse() call enable_ocotp_clk(1) before
reading the fuses, then call enable_ocotp_clk(0).
- Make enable_ocotp_clk() return the clock initial state and store it
in prepare_access(), then restore it in finish_access(). Same in imx_get_mac_from_fuse().

Which of these 3 choices do you think would be the best?

Regards,
Beno?t

reviewer
#3 lore raw

PATCH 1/2 mxc_ocotp: Do not disable the OCOTP clock after every access

Hi Beno?t,

Quoted 3 lines · Beno?t Th?baudeau

That, or:
- Make imx_get_mac_from_fuse() call enable_ocotp_clk(1) before
reading the fuses, then call enable_ocotp_clk(0).

Yes, I started with this exact same approach as well. It works, but Nitin told me he also had similiar issues with hab.

Other issue I see with such approach is that if people would try to read the ocotp registers manually in the U-boot prompt (via md.l command), then they will also get a hang.

Quoted 3 lines

- Make enable_ocotp_clk() return the clock initial state and store it
in prepare_access(), then restore it in finish_access(). Same in imx_get_mac_from_fuse().

This would work as well, but with some more complexity. Still would cause the hang via manual readings.

Quoted 1 line

Which of these 3 choices do you think would be the best?

I think the simplest one and the one that would be more general would be the one proposed by this patch.

Regards,

Fabio Estevam

#4 lore raw

PATCH 1/2 mxc_ocotp: Do not disable the OCOTP clock after every access

Hi Fabio,

Quoted 7 lines · Fabio Estevam
Quoted 3 lines · Beno?t Th?baudeau

That, or:
- Make imx_get_mac_from_fuse() call enable_ocotp_clk(1) before
reading the fuses, then call enable_ocotp_clk(0).

Quoted 6 lines

Yes, I started with this exact same approach as well. It works, but Nitin told me he also had similiar issues with hab.

Other issue I see with such approach is that if people would try to read the ocotp registers manually in the U-boot prompt (via md.l command), then they will also get a hang.

If users access the OCOTP registers manually, they can also enable the OCOTP clock in the corresponding register beforehand, even if this complicates things.

Quoted 11 lines
Quoted 3 lines

- Make enable_ocotp_clk() return the clock initial state and store it
in prepare_access(), then restore it in finish_access(). Same in imx_get_mac_from_fuse().

This would work as well, but with some more complexity. Still would cause the hang via manual readings.

Quoted 1 line

Which of these 3 choices do you think would be the best?

I think the simplest one and the one that would be more general would be the one proposed by this patch.

The only possible issue that I see with leaving the OCOTP clock enabled is the risk of inadvertently writing the fuses, either in U-Boot or in the booted OS. That being said, Freescale advise against leaving the fuses powered for production boards, in which cases there is no such risk.

Reviewed-by Beno?t Th?baudeau <[email protected]>

Regards,
Beno?t

#5 lore raw

PATCH 1/2 mxc_ocotp: Do not disable the OCOTP clock after every access

In reply to Fabio Estevam
Quoted 41 lines · Fabio Estevam

Leave the OCOTP turned on, so that we subsequent access do not fail.

After enabling the thermal driver on a mx6sxsabresd board:

U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01)

CPU:   Freescale i.MX6SX rev1.0 at 792 MHz                                     
CPU:   Temperature 48 C                                                        
Reset cause: POR                                                               
Board: MX6SX SABRE SDB                                                         
I2C:   ready                                                                   
DRAM:  1 GiB                                                                   
PMIC:  PFUZE100 ID=0x10                                                        
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2                                   
  00:01.0     - 16c3:abcd - Bridge device                                      
   01:00.0    - 8086:08b1 - Network controller                                 
In:    serial                                                                  
Out:   serial                                                                  
Err:   serial

Net:
(hang)

As the thermal driver accesses the ocotp registers, its clock will be disabled afterwards.

Then when the MAC address is read (also from ocotp registers) it will cause a hang.

Do not disable the ocotp clock to prevent this problem.

Signed-off-by Fabio Estevam <[email protected]>
---
 drivers/misc/mxc_ocotp.c | 2 --
 1 file changed, 2 deletions(-)
drivers/misc/mxc_ocotp.c +0 -0
index 3de1245..67f9429 100644

drivers/misc/mxc_ocotp.c static int finish_access(struct ocotp_regs *regs, const char *caller) · line 86

Quoted 8 lines
drivers/misc/mxc_ocotp.c +0 -2
@@ -81,8 +81,6 @@ static int finish_access(struct ocotp_regs *regs, const char *caller)
 	err = !!(readl(&regs->ctrl) & BM_CTRL_ERROR);
 	clear_error(regs);
 
-	enable_ocotp_clk(0);
-
 	if (err) {
 		printf("mxc_ocotp %s(): Access protect error\n", caller);
 		return -EIO;

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#6 lore raw

PATCH 2/2 mx6sxsabresd: Add thermal support

In reply to Fabio Estevam
Quoted 25 lines · Fabio Estevam

Add thermal support so that the temperature of the chip can be displayed on boot:

U-Boot 2015.01-rc1-18268-g1366c05-dirty (Nov 25 2014 - 13:02:42)

CPU:   Freescale i.MX6SX rev1.0 at 792 MHz                                      
CPU:   Temperature 50 C
Signed-off-by Fabio Estevam <[email protected]>
---
 include/configs/mx6sxsabresd.h | 10 ++++++++++
 1 file changed, 10 insertions(+)
include/configs/mx6sxsabresd.h +3 -0
index d8ab291..5e0edab 100644
@@ -208,6 +208,16 @@
 #define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(2, 1)
 #endif
 
+#define CONFIG_DM
+#define CONFIG_DM_THERMAL
+#define CONFIG_SYS_MALLOC_F_LEN	(1 << 10)

include/configs/mx6sxsabresd.h line 223

Quoted 10 lines
include/configs/mx6sxsabresd.h +7 -0
+#define CONFIG_IMX6_THERMAL
+
+#define CONFIG_CMD_FUSE
+#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
+#define CONFIG_MXC_OCOTP
+#endif
+
 /* FLASH and environment organization */
 #define CONFIG_SYS_NO_FLASH

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================