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arm: vf610: improve evaluation of reset source

PATCH New Stefan Agner 2 participants 2 messages Nov 27, 2014 – Dec 1, 2014

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Arm (32-bit) Arm i.MX and Layerscape
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Stefan Agner

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#0 lore raw

PATCH 1/1 arm: vf610: improve evaluation of reset source

Improve the evaluation of the reset source. Bit description according to latest reference manual rev. 7.

Signed-off-by Stefan Agner <[email protected]>
---
 arch/arm/cpu/armv7/vf610/generic.c         | 21 +++++++++++----------
 arch/arm/include/asm/arch-vf610/imx-regs.h |  8 ++++++++
 2 files changed, 19 insertions(+), 10 deletions(-)
arch/arm/cpu/armv7/vf610/generic.c +11 -10
index a26d63e..92aaad9 100644
@@ -265,20 +265,21 @@ static char *get_reset_cause(void)
 
 	cause = readl(&src_regs->srsr);
 	writel(cause, &src_regs->srsr);
-	cause &= 0xff;
 
-	switch (cause) {
-	case 0x08:
-		return "WDOG";
-	case 0x20:
+	if (cause & SRC_SRSR_POR_RST)
+		return "POWER ON RESET";
+	else if (cause & SRC_SRSR_WDOG_A5)
+		return "WDOG A5";
+	else if (cause & SRC_SRSR_WDOG_M4)
+		return "WDOG M4";
+	else if (cause & SRC_SRSR_JTAG_RST)
 		return "JTAG HIGH-Z";
-	case 0x80:
+	else if (cause & SRC_SRSR_SW_RST)
+		return "SW RESET";
+	else if (cause & SRC_SRSR_RESETB)
 		return "EXTERNAL RESET";
-	case 0xfd:
-		return "POR";
-	default:
+	else
 		return "unknown reset";
-	}
 }
 
 int print_cpuinfo(void)
arch/arm/include/asm/arch-vf610/imx-regs.h +8 -0
index 9d797db..6b10bdf 100644
@@ -256,6 +256,14 @@
 #define DDRMC_CR161_TODTH_RD(v)				(((v) & 0xf) << 8)
 #define DDRMC_CR161_TODTH_WR(v)				((v) & 0xf)
 
+/* System Reset Controller (SRC) */
+#define SRC_SRSR_SW_RST					(0x1 << 18)
+#define SRC_SRSR_RESETB					(0x1 << 7)
+#define SRC_SRSR_JTAG_RST				(0x1 << 5)
+#define SRC_SRSR_WDOG_M4				(0x1 << 4)
+#define SRC_SRSR_WDOG_A5				(0x1 << 3)
+#define SRC_SRSR_POR_RST				(0x1 << 0)
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
Signature · 1 line
2.1.3
#1 lore raw

PATCH 1/1 arm: vf610: improve evaluation of reset source

Quoted 55 lines · Stefan Agner

Improve the evaluation of the reset source. Bit description according to latest reference manual rev. 7.

Signed-off-by Stefan Agner <[email protected]>
---
 arch/arm/cpu/armv7/vf610/generic.c         | 21 +++++++++++----------
 arch/arm/include/asm/arch-vf610/imx-regs.h |  8 ++++++++
 2 files changed, 19 insertions(+), 10 deletions(-)
arch/arm/cpu/armv7/vf610/generic.c +11 -10
index a26d63e..92aaad9 100644
@@ -265,20 +265,21 @@ static char *get_reset_cause(void)
 
 	cause = readl(&src_regs->srsr);
 	writel(cause, &src_regs->srsr);
-	cause &= 0xff;
 
-	switch (cause) {
-	case 0x08:
-		return "WDOG";
-	case 0x20:
+	if (cause & SRC_SRSR_POR_RST)
+		return "POWER ON RESET";
+	else if (cause & SRC_SRSR_WDOG_A5)
+		return "WDOG A5";
+	else if (cause & SRC_SRSR_WDOG_M4)
+		return "WDOG M4";
+	else if (cause & SRC_SRSR_JTAG_RST)
 		return "JTAG HIGH-Z";
-	case 0x80:
+	else if (cause & SRC_SRSR_SW_RST)
+		return "SW RESET";
+	else if (cause & SRC_SRSR_RESETB)
 		return "EXTERNAL RESET";
-	case 0xfd:
-		return "POR";
-	default:
+	else
 		return "unknown reset";
-	}
 }
 
 int print_cpuinfo(void)
arch/arm/include/asm/arch-vf610/imx-regs.h +1 -0
index 9d797db..6b10bdf 100644
@@ -256,6 +256,14 @@
 #define DDRMC_CR161_TODTH_RD(v)				(((v) & 0xf) << 8)
 #define DDRMC_CR161_TODTH_WR(v)				((v) & 0xf)
 
+/* System Reset Controller (SRC) */

arch/arm/include/asm/arch-vf610/imx-regs.h line 269

Quoted 10 lines
arch/arm/include/asm/arch-vf610/imx-regs.h +7 -0
+#define SRC_SRSR_SW_RST					(0x1 << 18)
+#define SRC_SRSR_RESETB					(0x1 << 7)
+#define SRC_SRSR_JTAG_RST				(0x1 << 5)
+#define SRC_SRSR_WDOG_M4				(0x1 << 4)
+#define SRC_SRSR_WDOG_A5				(0x1 << 3)
+#define SRC_SRSR_POR_RST				(0x1 << 0)
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

Signature · 5 lines
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