powerpc/mpc85xx:Put errata number for T104x NAND boot issue
PATCH v2 1/2 powerpc/mpc85xx:Put errata number for T104x NAND boot issue
When device is configured to load RCW from NAND flash IFC_A[16:31] are driven low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using IFC_A[16:31] lines are not accessible.
Workaround is already in-place.
Put the errata number to adhere errata handling framework.
---
Changes for v2:
- updated CONFIG_A08044_WORKAROUND to CONFIG_A008044_WORKAROUND
README | 4 ++++ arch/powerpc/cpu/mpc85xx/cmd_errata.c | 5 ++++- arch/powerpc/include/asm/config_mpc85xx.h | 1 + board/freescale/t104xrdb/spl.c | 4 ++-- include/configs/T104xRDB.h | 10 +++++++++- 5 files changed, 20 insertions(+), 4 deletions(-)
README +4 -0
@@ -409,6 +409,10 @@ The following options need to be configured: Enables a workaround for IFC erratum A003399. It is only requred during NOR boot. + CONFIG_A008044_WORKAROUND + Enables a workaround for T1040/T1042 erratum A008044. It is only + requred during NAND boot and valid for Rev 1.0 SoC revision + CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY This is the value to write into CCSR offset 0x18600
arch/powerpc/cpu/mpc85xx/cmd_errata.c +4 -1
@@ -308,7 +308,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])#ifdef CONFIG_SYS_FSL_ERRATUM_A005434 puts ("Work-around for Erratum A-005434 enabled\n" );#endif - +#if defined(CONFIG_SYS_FSL_ERRATUM_A008044 ) && \ + defined(CONFIG_A008044_WORKAROUND ) +puts ("Work-around for Erratum A-008044 enabled\n" ); +#endif return 0 ; }
arch/powerpc/include/asm/config_mpc85xx.h +1 -0
@@ -768,6 +768,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)#define CONFIG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 +#define CONFIG_SYS_FSL_ERRATUM_A008044 #define CONFIG_SYS_FMAN_V3 #define CONFIG_FM_PLAT_CLK_DIV 1#define CONFIG_SYS_FM1_CLK CONFIG_FM_PLAT_CLK_DIV
board/freescale/t104xrdb/spl.c +2 -2
@@ -34,12 +34,12 @@ unsigned long get_board_ddr_clk(void)void board_init_f (ulong bootflag) {u32 plat_ratio, sys_clk, uart_clk; -#ifdef CONFIG_SPL_NAND_BOOT +#if defined(CONFIG_SPL_NAND_BOOT ) && defined(CONFIG_A008044_WORKAROUND )u32 porsr1, pinctl;#endif ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; -#ifdef CONFIG_SPL_NAND_BOOT +#if defined(CONFIG_SPL_NAND_BOOT ) && defined(CONFIG_A008044_WORKAROUND )/* * There is T1040 SoC issue where NOR, FPGA are inaccessible during * NAND boot because IFC signals > IFC_AD7 are not enabled.
include/configs/T104xRDB.h +9 -1
@@ -13,6 +13,9 @@#define CONFIG_T104xRDB#define CONFIG_PHYS_64BIT +#define CONFIG_E500 /* BOOKE e500 family */ +#include <asm/config_mpc85xx.h> +#ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg#ifdef CONFIG_T1040RDB
@@ -93,7 +96,6 @@/* High Level Configuration Options */ #define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */
@@ -386,6 +388,12 @@#define CONFIG_SYS_RAMBOOT #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A008044 +#if defined(CONFIG_NAND ) +#define CONFIG_A008044_WORKAROUND +#endif +#endif +#define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_MISC_INIT_R
Signature · 1 line
1.9.1
PATCH v2 1/2 powerpc/mpc85xx:Put errata number for T104x NAND boot issue
Quoted 4 lines · Prabhakar Kushwaha
When device is configured to load RCW from NAND flash IFC_A[16:31] are driven low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using IFC_A[16:31] lines are not accessible.
Quoted 8 lines
Workaround is already in-place.
Put the errata number to adhere errata handling framework.Signed-off-by Prabhakar Kushwaha <[email protected]>---
Changes for v2:
- updatedCONFIG_A08044_WORKAROUNDtoCONFIG_A008044_WORKAROUND
Applied to u-boot-mpc85xx, awaiting upstream.
York