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arm: ls102xa: clear EPU registers for deep sleep

PATCH New Chenhui Zhao 2 participants 2 messages Oct 22, 2014 – Dec 11, 2014 Arm (32-bit)

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Chenhui Zhao

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#0 lore raw

PATCH 1/1 arm: ls102xa: clear EPU registers for deep sleep

After wakeup from deep sleep, Clear EPU registers as early as possible to prevent from possible issue. It's also safe to clear at normal boot.

Signed-off-by Chenhui Zhao <[email protected]>
---
 arch/arm/cpu/armv7/ls102xa/Makefile        |    1 +
 arch/arm/cpu/armv7/ls102xa/cpu.c           |   16 +++++++
 arch/arm/cpu/armv7/ls102xa/fsl_epu.c       |   57 +++++++++++++++++++++++
 arch/arm/cpu/armv7/ls102xa/fsl_epu.h       |   68 ++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-ls102xa/config.h |    1 +
 5 files changed, 143 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/ls102xa/fsl_epu.c
 create mode 100644 arch/arm/cpu/armv7/ls102xa/fsl_epu.h
arch/arm/cpu/armv7/ls102xa/Makefile +1 -0
index d82ce8d..ae4f25d 100644
@@ -7,6 +7,7 @@
 obj-y	+= cpu.o
 obj-y	+= clock.o
 obj-y	+= timer.o
+obj-y	+= fsl_epu.o
 
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 obj-$(CONFIG_SYS_HAS_SERDES) += fsl_ls1_serdes.o ls102xa_serdes.o
arch/arm/cpu/armv7/ls102xa/cpu.c +16 -0
index b7dde45..fae6c68 100644
@@ -12,6 +12,8 @@
 #include <netdev.h>
 #include <fsl_esdhc.h>
 
+#include "fsl_epu.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_DISPLAY_CPUINFO)

@@ -101,3 +103,17 @@ int cpu_eth_init(bd_t *bis)
 
 	return 0;
 }
+
+int arch_cpu_init(void)
+{
+	void *epu_base = (void *)(CONFIG_SYS_DCSRBAR + EPU_BLOCK_OFFSET);
+
+	/*
+	 * After wakeup from deep sleep, Clear EPU registers
+	 * as early as possible to prevent from possible issue.
+	 * It's also safe to clear at normal boot.
+	 */
+	fsl_epu_clean(epu_base);
+
+	return 0;
+}
arch/arm/cpu/armv7/ls102xa/fsl_epu.c new file +57 -0

57 lines not on this page · raw message

arch/arm/cpu/armv7/ls102xa/fsl_epu.h new file +68 -0

68 lines not on this page · raw message

arch/arm/include/asm/arch-ls102xa/config.h +1 -0
index f2c9687..6fff74c 100644
@@ -13,6 +13,7 @@
 #define OCRAM_SIZE				0x00020000
 
 #define CONFIG_SYS_IMMR				0x01000000
+#define CONFIG_SYS_DCSRBAR			0x20000000
 
 #define CONFIG_SYS_FSL_DDR_ADDR			(CONFIG_SYS_IMMR + 0x00080000)
 #define CONFIG_SYS_CCI400_ADDR			(CONFIG_SYS_IMMR + 0x00180000)
Signature · 1 line
1.7.3
#1 lore raw

PATCH 1/1 arm: ls102xa: clear EPU registers for deep sleep

Quoted 5 lines · Chenhui Zhao

After wakeup from deep sleep, Clear EPU registers as early as possible to prevent from possible issue. It's also safe to clear at normal boot.

Signed-off-by Chenhui Zhao <[email protected]>

---

Applied to u-boot-fsl-qoriq master, awaiting upstream.

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