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arm: ls102xa: Update PCIe dts node status

PATCH New Minghuan Lian 2 participants 2 messages Oct 31, 2014 – Dec 11, 2014

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Arm (32-bit) PCI
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Minghuan Lian

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PATCH 1/1 arm: ls102xa: Update PCIe dts node status

The patch changes PCIe dts node status to 'disabled' if the corresponding controller is disabled according to serdes protocol.

Signed-off-by Minghuan Lian <[email protected]>
---
 arch/arm/include/asm/arch-ls102xa/config.h |  3 ++
 arch/arm/include/asm/pcie_layerscape.h     | 13 ++++++++
 board/freescale/ls1021aqds/ls1021aqds.c    |  5 +++
 board/freescale/ls1021atwr/ls1021atwr.c    |  5 +++
 drivers/pci/Makefile                       |  1 +
 drivers/pci/pcie_layerscape.c              | 51 ++++++++++++++++++++++++++++++
 include/configs/ls1021aqds.h               |  8 +++++
 include/configs/ls1021atwr.h               |  7 ++++
 8 files changed, 93 insertions(+)
 create mode 100644 arch/arm/include/asm/pcie_layerscape.h
 create mode 100644 drivers/pci/pcie_layerscape.c
arch/arm/include/asm/arch-ls102xa/config.h +3 -0
index f2c9687..9fd0b2c 100644
@@ -49,6 +49,9 @@
 
 #define LPUART_BASE				(CONFIG_SYS_IMMR + 0x01950000)
 
+#define CONFIG_SYS_PCIE1_ADDR			(CONFIG_SYS_IMMR + 0x2400000)
+#define CONFIG_SYS_PCIE2_ADDR			(CONFIG_SYS_IMMR + 0x2500000)
+
 #ifdef CONFIG_DDR_SPD
 #define CONFIG_SYS_FSL_DDR_BE
 #define CONFIG_VERY_BIG_RAM
arch/arm/include/asm/pcie_layerscape.h new file +13 -0
new file mode 100644
index 0000000..fb08578
@@ -0,0 +1,13 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __PCIE_LAYERSCAPE_H_
+#define __PCIE_LAYERSCAPE_H_
+
+void pci_init_board(void);
+void ft_pcie_setup(void *blob, bd_t *bd);
+
+#endif
board/freescale/ls1021aqds/ls1021aqds.c +5 -0
index 5fafc85..fccf6b6 100644
@@ -10,6 +10,7 @@
 #include <asm/arch/immap_ls102xa.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
+#include <asm/pcie_layerscape.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <fsl_ifc.h>

@@ -243,6 +244,10 @@ int board_init(void)
 void ft_board_setup(void *blob, bd_t *bd)
 {
 	ft_cpu_setup(blob, bd);
+
+#ifdef CONFIG_PCIE_LAYERSCAPE
+	ft_pcie_setup(blob, bd);
+#endif
 }
 
 u8 flash_read8(void *addr)
board/freescale/ls1021atwr/ls1021atwr.c +5 -0
index 50d5640..0b548eb 100644
@@ -10,6 +10,7 @@
 #include <asm/arch/immap_ls102xa.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
+#include <asm/pcie_layerscape.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <fsl_ifc.h>

@@ -293,6 +294,10 @@ int misc_init_r(void)
 void ft_board_setup(void *blob, bd_t *bd)
 {
 	ft_cpu_setup(blob, bd);
+
+#ifdef CONFIG_PCIE_LAYERSCAPE
+	ft_pcie_setup(blob, bd);
+#endif
 }
 
 u8 flash_read8(void *addr)
drivers/pci/Makefile +1 -0
index e73a498..e525ceb 100644
@@ -17,3 +17,4 @@ obj-$(CONFIG_SH7751_PCI) +=pci_sh7751.o
 obj-$(CONFIG_SH7780_PCI) +=pci_sh7780.o
 obj-$(CONFIG_TSI108_PCI) += tsi108_pci.o
 obj-$(CONFIG_WINBOND_83C553) += w83c553f.o
+obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
drivers/pci/pcie_layerscape.c new file +51 -0

51 lines not on this page · raw message

include/configs/ls1021aqds.h +8 -0
index d1f6ea7..5544b81 100644
@@ -318,6 +318,14 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 #endif
+
+/* PCIe */
+#define CONFIG_PCI		/* Enable PCI/PCIE */
+#define CONFIG_PCIE1		/* PCIE controler 1 */
+#define CONFIG_PCIE2		/* PCIE controler 2 */
+#define CONFIG_PCIE_LAYERSCAPE	/* Use common FSL Layerscape PCIe code */
+#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
+
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_MII
include/configs/ls1021atwr.h +7 -0
index 3c73af8..15873a9 100644
@@ -220,6 +220,13 @@
 #define CONFIG_HAS_ETH2
 #endif
 
+/* PCIe */
+#define CONFIG_PCI		/* Enable PCI/PCIE */
+#define CONFIG_PCIE1		/* PCIE controler 1 */
+#define CONFIG_PCIE2		/* PCIE controler 2 */
+#define CONFIG_PCIE_LAYERSCAPE	/* Use common FSL Layerscape PCIe code */
+#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
+
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_MII
Signature · 1 line
1.9.1
#1 lore raw

PATCH 1/1 arm: ls102xa: Update PCIe dts node status

Quoted 5 lines · Minghuan Lian

The patch changes PCIe dts node status to 'disabled' if the corresponding controller is disabled according to serdes protocol.

Signed-off-by Minghuan Lian <[email protected]>

---

Applied to u-boot-fsl-qoriq master, awaiting upstream.

York